|
@ -250,7 +250,7 @@ |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
// all the others
|
|
|
// all the others
|
|
|
static uint32_t spiDelayCyclesX4 = (F_CPU/1000000); // 4uS => 125khz
|
|
|
static uint32_t spiDelayCyclesX4 = (F_CPU) / 1000000; // 4uS => 125khz
|
|
|
|
|
|
|
|
|
static uint8_t spiTransferX(uint8_t b) { // using Mode 0
|
|
|
static uint8_t spiTransferX(uint8_t b) { // using Mode 0
|
|
|
int bits = 8; |
|
|
int bits = 8; |
|
@ -451,77 +451,48 @@ |
|
|
static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX; |
|
|
static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX; |
|
|
static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX; |
|
|
static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX; |
|
|
|
|
|
|
|
|
#if MB(ALLIGATOR) // control SDSS pin
|
|
|
#if MB(ALLIGATOR) |
|
|
void spiBegin() { |
|
|
#define _SS_WRITE(S) WRITE(SS_PIN, S) |
|
|
SET_OUTPUT(SS_PIN); |
|
|
#else |
|
|
WRITE(SS_PIN, HIGH); |
|
|
#define _SS_WRITE(S) NOOP |
|
|
SET_OUTPUT(SCK_PIN); |
|
|
#endif |
|
|
SET_INPUT(MISO_PIN); |
|
|
|
|
|
SET_OUTPUT(MOSI_PIN); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
uint8_t spiRec() { |
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
|
|
uint8_t b = spiTransferRx(0xFF); |
|
|
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
return b; |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
|
|
|
uint32_t todo = nbyte; |
|
|
|
|
|
if (todo == 0) return; |
|
|
|
|
|
|
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
|
|
spiRxBlock(buf,nbyte); |
|
|
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
void spiSend(uint8_t b) { |
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
|
|
(void) spiTransferTx(b); |
|
|
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
|
|
(void) spiTransferTx(token); |
|
|
|
|
|
spiTxBlock(buf,512); |
|
|
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
|
|
|
|
|
|
#else // let calling routine control SDSS
|
|
|
|
|
|
void spiBegin() { |
|
|
void spiBegin() { |
|
|
SET_OUTPUT(SS_PIN); |
|
|
SET_OUTPUT(SS_PIN); |
|
|
|
|
|
_SS_WRITE(HIGH); |
|
|
SET_OUTPUT(SCK_PIN); |
|
|
SET_OUTPUT(SCK_PIN); |
|
|
SET_INPUT(MISO_PIN); |
|
|
SET_INPUT(MISO_PIN); |
|
|
SET_OUTPUT(MOSI_PIN); |
|
|
SET_OUTPUT(MOSI_PIN); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
uint8_t spiRec() { |
|
|
uint8_t spiRec() { |
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
_SS_WRITE(LOW); |
|
|
|
|
|
WRITE(MOSI_PIN, HIGH); // Output 1s 1
|
|
|
uint8_t b = spiTransferRx(0xFF); |
|
|
uint8_t b = spiTransferRx(0xFF); |
|
|
|
|
|
_SS_WRITE(HIGH); |
|
|
return b; |
|
|
return b; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
uint32_t todo = nbyte; |
|
|
if (nbyte) { |
|
|
if (todo == 0) return; |
|
|
_SS_WRITE(LOW); |
|
|
|
|
|
WRITE(MOSI_PIN, HIGH); // Output 1s 1
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
|
|
spiRxBlock(buf, nbyte); |
|
|
spiRxBlock(buf, nbyte); |
|
|
|
|
|
_SS_WRITE(HIGH); |
|
|
|
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiSend(uint8_t b) { |
|
|
void spiSend(uint8_t b) { |
|
|
|
|
|
_SS_WRITE(LOW); |
|
|
(void)spiTransferTx(b); |
|
|
(void)spiTransferTx(b); |
|
|
|
|
|
_SS_WRITE(HIGH); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
|
|
|
_SS_WRITE(LOW); |
|
|
(void)spiTransferTx(token); |
|
|
(void)spiTransferTx(token); |
|
|
spiTxBlock(buf, 512); |
|
|
spiTxBlock(buf, 512); |
|
|
|
|
|
_SS_WRITE(HIGH); |
|
|
#endif |
|
|
|
|
|
|
|
|
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/**
|
|
|
/**
|
|
@ -549,7 +520,7 @@ |
|
|
spiRxBlock = (pfnSpiRxBlock)spiRxBlockX; |
|
|
spiRxBlock = (pfnSpiRxBlock)spiRxBlockX; |
|
|
break; |
|
|
break; |
|
|
default: |
|
|
default: |
|
|
spiDelayCyclesX4 = (F_CPU/1000000) >> (6 - spiRate); |
|
|
spiDelayCyclesX4 = ((F_CPU) / 1000000) >> (6 - spiRate); |
|
|
spiTransferTx = (pfnSpiTransfer)spiTransferX; |
|
|
spiTransferTx = (pfnSpiTransfer)spiTransferX; |
|
|
spiTransferRx = (pfnSpiTransfer)spiTransferX; |
|
|
spiTransferRx = (pfnSpiTransfer)spiTransferX; |
|
|
spiTxBlock = (pfnSpiTxBlock)spiTxBlockX; |
|
|
spiTxBlock = (pfnSpiTxBlock)spiTxBlockX; |
|
@ -557,9 +528,7 @@ |
|
|
break; |
|
|
break; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
#if MB(ALLIGATOR) |
|
|
_SS_WRITE(HIGH); |
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
#endif |
|
|
|
|
|
WRITE(MOSI_PIN, HIGH); |
|
|
WRITE(MOSI_PIN, HIGH); |
|
|
WRITE(SCK_PIN, LOW); |
|
|
WRITE(SCK_PIN, LOW); |
|
|
} |
|
|
} |
|
@ -573,6 +542,10 @@ |
|
|
|
|
|
|
|
|
#else // !SOFTWARE_SPI
|
|
|
#else // !SOFTWARE_SPI
|
|
|
|
|
|
|
|
|
|
|
|
#define WHILE_TX(N) while ((SPI0->SPI_SR & SPI_SR_TDRE) == (N)) |
|
|
|
|
|
#define WHILE_RX(N) while ((SPI0->SPI_SR & SPI_SR_RDRF) == (N)) |
|
|
|
|
|
#define FLUSH_TX() do{ WHILE_RX(1) SPI0->SPI_RDR; }while(0) |
|
|
|
|
|
|
|
|
#if MB(ALLIGATOR) |
|
|
#if MB(ALLIGATOR) |
|
|
|
|
|
|
|
|
// slave selects controlled by SPI controller
|
|
|
// slave selects controlled by SPI controller
|
|
@ -645,13 +618,14 @@ |
|
|
WRITE(SPI_FLASH_CS, HIGH); |
|
|
WRITE(SPI_FLASH_CS, HIGH); |
|
|
WRITE(SS_PIN, HIGH); |
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
|
|
|
|
|
OUT_WRITE(SDSS,0); |
|
|
OUT_WRITE(SDSS, LOW); |
|
|
|
|
|
|
|
|
PIO_Configure( |
|
|
PIO_Configure( |
|
|
g_APinDescription[SPI_PIN].pPort, |
|
|
g_APinDescription[SPI_PIN].pPort, |
|
|
g_APinDescription[SPI_PIN].ulPinType, |
|
|
g_APinDescription[SPI_PIN].ulPinType, |
|
|
g_APinDescription[SPI_PIN].ulPin, |
|
|
g_APinDescription[SPI_PIN].ulPin, |
|
|
g_APinDescription[SPI_PIN].ulPinConfiguration); |
|
|
g_APinDescription[SPI_PIN].ulPinConfiguration |
|
|
|
|
|
); |
|
|
|
|
|
|
|
|
spiInit(1); |
|
|
spiInit(1); |
|
|
} |
|
|
} |
|
@ -660,30 +634,23 @@ |
|
|
uint8_t spiRec() { |
|
|
uint8_t spiRec() { |
|
|
// write dummy byte with address and end transmission flag
|
|
|
// write dummy byte with address and end transmission flag
|
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER; |
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER; |
|
|
// wait for transmit register empty
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
|
|
|
|
|
|
|
|
|
// wait for receive register
|
|
|
WHILE_TX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
WHILE_RX(0); |
|
|
// get byte from receive register
|
|
|
|
|
|
//DELAY_US(1U);
|
|
|
//DELAY_US(1U);
|
|
|
return SPI0->SPI_RDR; |
|
|
return SPI0->SPI_RDR; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
uint8_t spiRec(uint32_t chan) { |
|
|
uint8_t spiRec(uint32_t chan) { |
|
|
uint8_t spirec_tmp; |
|
|
|
|
|
// wait for transmit register empty
|
|
|
WHILE_TX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
FLUSH_RX(); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1) |
|
|
|
|
|
spirec_tmp = SPI0->SPI_RDR; |
|
|
|
|
|
UNUSED(spirec_tmp); |
|
|
|
|
|
|
|
|
|
|
|
// write dummy byte with address and end transmission flag
|
|
|
// write dummy byte with address and end transmission flag
|
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER; |
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER; |
|
|
|
|
|
WHILE_RX(0); |
|
|
|
|
|
|
|
|
// wait for receive register
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
|
|
|
// get byte from receive register
|
|
|
|
|
|
return SPI0->SPI_RDR; |
|
|
return SPI0->SPI_RDR; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
@ -692,9 +659,9 @@ |
|
|
if (nbyte-- == 0) return; |
|
|
if (nbyte-- == 0) return; |
|
|
|
|
|
|
|
|
for (int i = 0; i < nbyte; i++) { |
|
|
for (int i = 0; i < nbyte; i++) { |
|
|
//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
|
//WHILE_TX(0);
|
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN); |
|
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
WHILE_RX(0); |
|
|
buf[i] = SPI0->SPI_RDR; |
|
|
buf[i] = SPI0->SPI_RDR; |
|
|
//DELAY_US(1U);
|
|
|
//DELAY_US(1U);
|
|
|
} |
|
|
} |
|
@ -705,11 +672,8 @@ |
|
|
void spiSend(byte b) { |
|
|
void spiSend(byte b) { |
|
|
// write byte with address and end transmission flag
|
|
|
// write byte with address and end transmission flag
|
|
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER; |
|
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER; |
|
|
// wait for transmit register empty
|
|
|
WHILE_TX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
WHILE_RX(0); |
|
|
// wait for receive register
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
|
|
|
// clear status
|
|
|
|
|
|
SPI0->SPI_RDR; |
|
|
SPI0->SPI_RDR; |
|
|
//DELAY_US(1U);
|
|
|
//DELAY_US(1U);
|
|
|
} |
|
|
} |
|
@ -718,8 +682,8 @@ |
|
|
if (n == 0) return; |
|
|
if (n == 0) return; |
|
|
for (size_t i = 0; i < n - 1; i++) { |
|
|
for (size_t i = 0; i < n - 1; i++) { |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN); |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
WHILE_TX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
WHILE_RX(0); |
|
|
SPI0->SPI_RDR; |
|
|
SPI0->SPI_RDR; |
|
|
//DELAY_US(1U);
|
|
|
//DELAY_US(1U);
|
|
|
} |
|
|
} |
|
@ -727,29 +691,20 @@ |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiSend(uint32_t chan, byte b) { |
|
|
void spiSend(uint32_t chan, byte b) { |
|
|
uint8_t dummy_read = 0; |
|
|
WHILE_TX(0); |
|
|
// wait for transmit register empty
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
|
|
|
// write byte with address and end transmission flag
|
|
|
// write byte with address and end transmission flag
|
|
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER; |
|
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER; |
|
|
// wait for receive register
|
|
|
WHILE_RX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
FLUSH_RX(); |
|
|
// clear status
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1) |
|
|
|
|
|
dummy_read = SPI0->SPI_RDR; |
|
|
|
|
|
UNUSED(dummy_read); |
|
|
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiSend(uint32_t chan, const uint8_t* buf, size_t n) { |
|
|
void spiSend(uint32_t chan, const uint8_t* buf, size_t n) { |
|
|
uint8_t dummy_read = 0; |
|
|
|
|
|
if (n == 0) return; |
|
|
if (n == 0) return; |
|
|
for (int i = 0; i < (int)n - 1; i++) { |
|
|
for (int i = 0; i < (int)n - 1; i++) { |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
WHILE_TX(0); |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan); |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
WHILE_RX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1) |
|
|
FLUSH_RX(); |
|
|
dummy_read = SPI0->SPI_RDR; |
|
|
|
|
|
UNUSED(dummy_read); |
|
|
|
|
|
} |
|
|
} |
|
|
spiSend(chan, buf[n - 1]); |
|
|
spiSend(chan, buf[n - 1]); |
|
|
} |
|
|
} |
|
@ -757,13 +712,13 @@ |
|
|
// Write from buffer to SPI
|
|
|
// Write from buffer to SPI
|
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN); |
|
|
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
WHILE_TX(0); |
|
|
//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
|
//WHILE_RX(0);
|
|
|
//SPI0->SPI_RDR;
|
|
|
//SPI0->SPI_RDR;
|
|
|
for (int i = 0; i < 511; i++) { |
|
|
for (int i = 0; i < 511; i++) { |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN); |
|
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
WHILE_TX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
WHILE_RX(0); |
|
|
SPI0->SPI_RDR; |
|
|
SPI0->SPI_RDR; |
|
|
//DELAY_US(1U);
|
|
|
//DELAY_US(1U);
|
|
|
} |
|
|
} |
|
@ -792,7 +747,7 @@ |
|
|
|
|
|
|
|
|
// Disable PIO on A26 and A27
|
|
|
// Disable PIO on A26 and A27
|
|
|
REG_PIOA_PDR = 0x0C000000; |
|
|
REG_PIOA_PDR = 0x0C000000; |
|
|
OUT_WRITE(SDSS, 1); |
|
|
OUT_WRITE(SDSS, HIGH); |
|
|
|
|
|
|
|
|
// Reset SPI0 (from sam lib)
|
|
|
// Reset SPI0 (from sam lib)
|
|
|
SPI0->SPI_CR = SPI_CR_SPIDIS; |
|
|
SPI0->SPI_CR = SPI_CR_SPIDIS; |
|
@ -807,44 +762,29 @@ |
|
|
SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
|
|
|
SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiBegin() { |
|
|
void spiBegin() { spiInit(); } |
|
|
spiInit(); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
static uint8_t spiTransfer(uint8_t data) { |
|
|
static uint8_t spiTransfer(uint8_t data) { |
|
|
|
|
|
WHILE_TX(0); |
|
|
// Wait until tx register is empty
|
|
|
|
|
|
while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 ); |
|
|
|
|
|
// Send data
|
|
|
|
|
|
SPI0->SPI_TDR = (uint32_t)data | 0x00070000UL; // Add TMC2130 PCS bits to every byte
|
|
|
SPI0->SPI_TDR = (uint32_t)data | 0x00070000UL; // Add TMC2130 PCS bits to every byte
|
|
|
|
|
|
WHILE_TX(0); |
|
|
// wait for transmit register empty
|
|
|
WHILE_RX(0); |
|
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0); |
|
|
|
|
|
|
|
|
|
|
|
// wait for receive register
|
|
|
|
|
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0); |
|
|
|
|
|
// get byte from receive register
|
|
|
|
|
|
return SPI0->SPI_RDR; |
|
|
return SPI0->SPI_RDR; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
uint8_t spiRec() { |
|
|
uint8_t spiRec() { return (uint8_t)spiTransfer(0xFF); } |
|
|
uint8_t data = spiTransfer(0xFF); |
|
|
|
|
|
return data; |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
if (nbyte == 0) return; |
|
|
if (nbyte) |
|
|
for (int i = 0; i < nbyte; i++) |
|
|
for (int i = 0; i < nbyte; i++) |
|
|
buf[i] = spiTransfer(0xFF); |
|
|
buf[i] = spiTransfer(0xFF); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void spiSend(uint8_t data) { |
|
|
void spiSend(uint8_t data) { spiTransfer(data); } |
|
|
spiTransfer(data); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
void spiSend(const uint8_t* buf, size_t n) { |
|
|
void spiSend(const uint8_t* buf, size_t nbyte) { |
|
|
if (n == 0) return; |
|
|
if (nbyte) |
|
|
for (uint16_t i = 0; i < n; i++) |
|
|
for (uint16_t i = 0; i < nbyte; i++) |
|
|
spiTransfer(buf[i]); |
|
|
spiTransfer(buf[i]); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|