Sergey
3 years ago
204 changed files with 31265 additions and 1345 deletions
@ -0,0 +1,101 @@ |
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#!/usr/bin/env bash |
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# |
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# build_all_examples base_branch [resume_point] |
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# |
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|
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GITREPO=https://github.com/MarlinFirmware/Configurations.git |
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STAT_FILE=./.pio/.buildall |
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|
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# Check dependencies |
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which curl 1>/dev/null 2>&1 || { echo "curl not found! Please install it."; exit ; } |
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which git 1>/dev/null 2>&1 || { echo "git not found! Please install it."; exit ; } |
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|
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SED=$(command -v gsed 2>/dev/null || command -v sed 2>/dev/null) |
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[[ -z "$SED" ]] && { echo "No sed found, please install sed" ; exit 1 ; } |
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|
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SELF=`basename "$0"` |
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HERE=`dirname "$0"` |
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|
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# Check if called in the right location |
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[[ -e "Marlin/src" ]] || { echo -e "This script must be called from a Marlin working copy with:\n ./buildroot/bin/$SELF $1" ; exit ; } |
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|
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if [[ $# -lt 1 || $# -gt 2 ]]; then |
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echo "Usage: $SELF base_branch [resume_point] |
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base_branch - Configuration branch to download and build |
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resume_point - Configuration path to start from" |
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exit |
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fi |
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|
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echo "This script downloads all Configurations and builds Marlin with each one." |
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echo "On failure the last-built configs will be left in your working copy." |
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echo "Restore your configs with 'git checkout -f' or 'git reset --hard HEAD'." |
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|
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unset BRANCH |
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unset FIRST_CONF |
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if [[ -f "$STAT_FILE" ]]; then |
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IFS='*' read BRANCH FIRST_CONF <"$STAT_FILE" |
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fi |
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|
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# If -c is given start from the last attempted build |
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if [[ $1 == '-c' ]]; then |
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if [[ -z $BRANCH || -z $FIRST_CONF ]]; then |
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echo "Nothing to continue" |
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exit |
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fi |
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elif [[ $1 == '-s' ]]; then |
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if [[ -n $BRANCH && -n $FIRST_CONF ]]; then |
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SKIP_CONF=1 |
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else |
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echo "Nothing to skip" |
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exit |
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fi |
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else |
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BRANCH=${1:-"import-2.0.x"} |
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FIRST_CONF=$2 |
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fi |
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|
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# Check if the current repository has unmerged changes |
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if [[ $SKIP_CONF ]]; then |
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echo "Skipping $FIRST_CONF" |
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elif [[ $FIRST_CONF ]]; then |
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echo "Resuming from $FIRST_CONF" |
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else |
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git diff --quiet || { echo "The working copy is modified. Commit or stash changes before proceeding."; exit ; } |
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fi |
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|
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# Create a temporary folder inside .pio |
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TMP=./.pio/build-$BRANCH |
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[[ -d "$TMP" ]] || mkdir -p $TMP |
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|
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# Download Configurations into the temporary folder |
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if [[ ! -e "$TMP/README.md" ]]; then |
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echo "Downloading Configurations from GitHub into $TMP" |
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git clone --depth=1 --single-branch --branch "$BRANCH" $GITREPO "$TMP" || { echo "Failed to clone the configuration repository"; exit ; } |
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else |
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echo "Using previously downloaded Configurations at $TMP" |
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fi |
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|
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echo -e "Start building now...\n=====================" |
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shopt -s nullglob |
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IFS=' |
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' |
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CONF_TREE=$( ls -d "$TMP"/config/examples/*/ "$TMP"/config/examples/*/*/ "$TMP"/config/examples/*/*/*/ "$TMP"/config/examples/*/*/*/*/ | grep -vE ".+\.(\w+)$" ) |
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DOSKIP=0 |
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for CONF in $CONF_TREE ; do |
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# Get a config's directory name |
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DIR=$( echo $CONF | sed "s|$TMP/config/examples/||" ) |
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# If looking for a config, skip others |
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[[ $FIRST_CONF ]] && [[ $FIRST_CONF != $DIR && "$FIRST_CONF/" != $DIR ]] && continue |
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# Once found, stop looking |
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unset FIRST_CONF |
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# If skipping, don't build the found one |
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[[ $SKIP_CONF ]] && { unset SKIP_CONF ; continue ; } |
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# ...if skipping, don't build this one |
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compgen -G "${CONF}Con*.h" > /dev/null || continue |
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echo "${BRANCH}*${DIR}" >"$STAT_FILE" |
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"$HERE/build_example" "internal" "$TMP" "$DIR" || { echo "Failed to build $DIR"; exit ; } |
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done |
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|
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# Delete the temp folder and build state |
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[[ -e "$TMP/config/examples" ]] && rm -rf "$TMP" |
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rm "$STAT_FILE" |
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@ -0,0 +1,29 @@ |
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#!/usr/bin/env bash |
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# |
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# build_example |
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# |
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# Usage: build_example internal config-home config-folder |
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# |
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|
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# Require 'internal' as the first argument |
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[[ "$1" == "internal" ]] || { echo "Don't call this script directly, use build_all_examples instead." ; exit 1 ; } |
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echo "Testing $3:" |
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SUB=$2/config/examples/$3 |
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[[ -d "$SUB" ]] || { echo "$SUB is not a good path" ; exit 1 ; } |
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compgen -G "${SUB}Con*.h" > /dev/null || { echo "No configuration files found in $SUB" ; exit 1 ; } |
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echo "Getting configuration files from $SUB" |
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cp "$2/config/default"/*.h Marlin/ |
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cp "$SUB"/Configuration.h Marlin/ 2>/dev/null |
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cp "$SUB"/Configuration_adv.h Marlin/ 2>/dev/null |
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cp "$SUB"/_Bootscreen.h Marlin/ 2>/dev/null |
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cp "$SUB"/_Statusscreen.h Marlin/ 2>/dev/null |
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echo "Building the firmware now..." |
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HERE=`dirname "$0"` |
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$HERE/mftest -a -n1 || { echo "Failed"; exit 1; } |
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echo "Success" |
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@ -0,0 +1,311 @@ |
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#!/usr/bin/env bash |
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# |
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# mftest Select a test to apply and build |
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# mftest -b [#] Build the auto-detected environment |
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# mftest -u [#] Upload the auto-detected environment |
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# mftest [name] [index] [-y] Set config options and optionally build a test |
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# |
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|
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[[ -d Marlin/src ]] || { echo "Please 'cd' to the Marlin repo root." ; exit 1 ; } |
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perror() { echo -e "$0: \033[0;31m$1 -- $2\033[0m" ; } |
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errout() { echo -e "\033[0;31m$1\033[0m" ; } |
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bugout() { ((DEBUG)) && echo -e "\033[0;32m$1\033[0m" ; } |
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|
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usage() { |
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echo " |
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Usage: mftest [-t|--env=<env>] [-n|--num=<num>] [-m|--make] [-y|--build=<Y|n>] |
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mftest [-a|--autobuild] |
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mftest [-r|--rebuild] |
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mftest [-u|--autoupload] [-n|--num=<num>] |
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OPTIONS |
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-t --env The environment of the test to apply / run. (As named in platformio.ini.) |
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-n --num The index of the test to run. (In file order.) |
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-m --make Use the make / Docker method for the build. |
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-y --build Skip 'Do you want to build this test?' and assume YES. |
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-h --help Print this help. |
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-a --autobuild PIO Build using the MOTHERBOARD environment. |
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-u --autoupload PIO Upload using the MOTHERBOARD environment. |
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-v --verbose Extra output for debugging. |
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env shortcuts: tree due esp lin lpc|lpc8 lpc9 m128 m256|mega stm|f1 f4 f7 s6 teensy|t31|t32 t35|t36 t40|t41 |
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" |
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} |
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TESTPATH=buildroot/tests |
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STATE_FILE="./.pio/.mftestrc" |
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SED=$(which gsed || which sed) |
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shopt -s extglob nocasematch |
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|
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# Matching patterns |
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ISNUM='^[0-9]+$' |
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ISCMD='^(restore|opt|exec|use|pins|env)_' |
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ISEXEC='^exec_' |
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ISCONT='\\ *$' |
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# Get environment, test number, etc. from the command |
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TESTENV='-' |
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CHOICE=0 |
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DEBUG=0 |
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while getopts 'abhmruvyn:t:-:' OFLAG; do |
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case "${OFLAG}" in |
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a) AUTO_BUILD=1 ; bugout "Auto-Build target..." ;; |
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h) EXIT_USAGE=1 ;; |
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m) USE_MAKE=1 ; bugout "Using make with Docker..." ;; |
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n) case "$OPTARG" in |
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*[!0-9]*) perror "option requires a number" $OFLAG ; EXIT_USAGE=2 ;; |
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*) CHOICE="$OPTARG" ; bugout "Got a number: $CHOICE" ;; |
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esac |
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;; |
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r) REBUILD=1 ; bugout "Rebuilding previous..." ;; |
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t) TESTENV="$OPTARG" ; bugout "Got a target: $TESTENV" ;; |
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u) AUTO_BUILD=2 ; bugout "Auto-Upload target..." ;; |
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v) DEBUG=1 ; bugout "Debug ON" ;; |
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y) BUILD_YES='Y' ; bugout "Build will initiate..." ;; |
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-) IFS="=" read -r ONAM OVAL <<< "$OPTARG" |
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case "$ONAM" in |
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help) [[ -z "$OVAL" ]] || perror "option can't take value $OVAL" $ONAM ; EXIT_USAGE=1 ;; |
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autobuild) AUTO_BUILD=1 ; bugout "Auto-Build target..." ;; |
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autoupload) AUTO_BUILD=2 ; bugout "Auto-Upload target..." ;; |
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env) case "$OVAL" in |
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'') perror "option requires a value" $ONAM ; EXIT_USAGE=2 ;; |
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*) TESTENV="$OVAL" ; bugout "Got a target: $TESTENV" ;; |
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esac |
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;; |
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num) case "$OVAL" in |
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[0-9]+) CHOICE="$OVAL" ; bugout "Got a number: $CHOICE" ;; |
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*) perror "option requires a value" $ONAM ; EXIT_USAGE=2 ;; |
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esac |
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;; |
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rebuild) REBUILD=1 ; bugout "Rebuilding previous..." ;; |
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make) USE_MAKE=1 ; bugout "Using make with Docker..." ;; |
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debug|verbose) DEBUG=1 ; bugout "Debug ON" ;; |
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build) case "$OVAL" in |
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''|y|yes) BUILD_YES='Y' ;; |
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n|no) BUILD_YES='N' ;; |
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*) perror "option value must be y, n, yes, or no" $ONAM ; EXIT_USAGE=2 ;; |
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esac |
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bugout "Build will initiate? ($BUILD_YES)" |
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;; |
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*) perror "Unknown flag" "$OPTARG" ; EXIT_USAGE=2 ;; |
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esac |
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;; |
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*) EXIT_USAGE=2 ;; |
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esac |
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done |
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((EXIT_USAGE)) && { usage ; let EXIT_USAGE-- ; exit $EXIT_USAGE ; } |
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if ((REBUILD)); then |
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bugout "Rebuilding previous..." |
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# Build with the last-built env |
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[[ -f "$STATE_FILE" ]] || { errout "No previous (-r) build state found." ; exit 1 ; } |
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read TESTENV <"$STATE_FILE" |
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pio run -s -d . -e $TESTENV |
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exit |
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fi |
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|
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case $TESTENV in |
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tree) pio run -d . -e include_tree ; exit 1 ;; |
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due) TESTENV='DUE' ;; |
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esp) TESTENV='esp32' ;; |
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lin*) TESTENV='linux_native' ;; |
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lp8|lpc8) TESTENV='LPC1768' ;; |
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lp9|lpc9) TESTENV='LPC1769' ;; |
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m128) TESTENV='mega1280' ;; |
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m256) TESTENV='mega2560' ;; |
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mega) TESTENV='mega2560' ;; |
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stm) TESTENV='STM32F103RE' ;; |
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f1) TESTENV='STM32F103RE' ;; |
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f4) TESTENV='STM32F4' ;; |
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f7) TESTENV='STM32F7' ;; |
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s6) TESTENV='FYSETC_S6' ;; |
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teensy) TESTENV='teensy31' ;; |
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t31) TESTENV='teensy31' ;; |
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t32) TESTENV='teensy31' ;; |
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t35) TESTENV='teensy35' ;; |
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t36) TESTENV='teensy35' ;; |
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t40) TESTENV='teensy41' ;; |
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t41) TESTENV='teensy41' ;; |
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[1-9][1-9]|[1-9]) TESTNUM=$TESTENV ; TESTENV=- ;; |
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esac |
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|
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if ((AUTO_BUILD)); then |
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# |
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# List environments that apply to the current MOTHERBOARD. |
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# |
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case $(uname | tr '[:upper:]' '[:lower:]') in |
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darwin) SYS='mac' ;; |
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*linux) SYS='lin' ;; |
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win*) SYS='win' ;; |
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msys*) SYS='win' ;; |
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cygwin*) SYS='win' ;; |
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mingw*) SYS='win' ;; |
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*) SYS='uni' ;; |
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esac |
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echo ; echo -n "Auto " ; ((AUTO_BUILD == 2)) && echo "Upload..." || echo "Build..." |
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MB=$( grep -E "^\s*#define MOTHERBOARD" Marlin/Configuration.h | awk '{ print $3 }' | $SED 's/BOARD_//' ) |
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[[ -z $MB ]] && { echo "Error - Can't read MOTHERBOARD setting." ; exit 1 ; } |
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BLINE=$( grep -E "define\s+BOARD_$MB\b" Marlin/src/core/boards.h ) |
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BNUM=$( $SED -E 's/^.+BOARD_[^ ]+ +([0-9]+).+$/\1/' <<<"$BLINE" ) |
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BDESC=$( $SED -E 's/^.+\/\/ *(.+)$/\1/' <<<"$BLINE" ) |
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[[ -z $BNUM ]] && { echo "Error - Can't find $MB in boards list." ; exit 1 ; } |
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ENVS=( $( grep -EA1 "MB\(.*\b$MB\b.*\)" Marlin/src/pins/pins.h | grep -E "#include.+//.+(env|$SYS):[^ ]+" | grep -oE "(env|$SYS):[^ ]+" | $SED -E "s/(env|$SYS)://" ) ) |
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[[ -z $ENVS ]] && { errout "Error - Can't find target(s) for $MB ($BNUM)." ; exit 1 ; } |
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ECOUNT=${#ENVS[*]} |
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if [[ $ECOUNT == 1 ]]; then |
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TARGET=$ENVS |
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else |
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if [[ $CHOICE == 0 ]]; then |
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# List env names and numbers. Get selection. |
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echo "Available targets for \"$BDESC\" | $MB ($BNUM):" |
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IND=0 ; for ENV in "${ENVS[@]}"; do let IND++ ; echo " $IND) $ENV" ; done |
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if [[ $ECOUNT > 1 ]]; then |
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for (( ; ; )) |
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do |
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read -p "Select a target for '$MB' (1-$ECOUNT) : " CHOICE |
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[[ -z "$CHOICE" ]] && { echo '(canceled)' ; exit 1 ; } |
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[[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= ECOUNT)) && break |
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errout ">>> Invalid environment choice '$CHOICE'." |
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done |
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echo |
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fi |
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else |
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echo "Detected \"$BDESC\" | $MB ($BNUM)." |
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[[ $CHOICE > $ECOUNT ]] && { echo "Environment selection out of range." ; exit 1 ; } |
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fi |
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TARGET="${ENVS[$CHOICE-1]}" |
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echo "Selected $TARGET" |
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fi |
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echo "$TARGET" >"$STATE_FILE" |
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|
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if ((AUTO_BUILD == 2)); then |
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echo "Uploading environment $TARGET for board $MB ($BNUM)..." ; echo |
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pio run -t upload -e $TARGET |
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else |
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echo "Building environment $TARGET for board $MB ($BNUM)..." ; echo |
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pio run -s -e $TARGET |
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fi |
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exit |
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fi |
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|
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# |
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# List available tests and ask for selection |
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# |
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|
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if [[ $TESTENV == '-' ]]; then |
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IND=0 |
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NAMES=() |
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for FILE in $( ls -1 $TESTPATH/* ) |
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do |
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let IND++ |
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TNAME=${FILE/$TESTPATH\//} |
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NAMES+=($TNAME) |
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(( IND < 10 )) && echo -n " " |
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echo " $IND) $TNAME" |
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done |
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|
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echo |
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for (( ; ; )) |
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do |
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if [[ $TESTNUM -gt 0 ]]; then |
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NAMEIND=$TESTNUM |
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else |
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read -p "Select a test to apply (1-$IND) : " NAMEIND |
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fi |
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[[ -z $NAMEIND ]] && { errout "(canceled)" ; exit 1 ; } |
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TESTENV=${NAMES[$NAMEIND-1]} |
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[[ $TESTNUM -gt 0 ]] && { echo "Preselected test $TESTNUM ... ($TESTENV)" ; TESTNUM='' ; } |
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[[ $NAMEIND =~ $ISNUM ]] && ((NAMEIND >= 1 && NAMEIND <= IND)) && { TESTENV=${NAMES[$NAMEIND-1]} ; echo ; break ; } |
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errout "Invalid selection." |
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done |
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fi |
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|
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# Get the contents of the test file |
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OUT=$( cat $TESTPATH/$TESTENV 2>/dev/null ) || { errout "Can't find test '$TESTENV'." ; exit 1 ; } |
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|
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# Count up the number of tests |
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TESTCOUNT=$( awk "/$ISEXEC/{a++}END{print a}" <<<"$OUT" ) |
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|
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# User entered a number? |
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(( CHOICE && CHOICE > TESTCOUNT )) && { errout "Invalid test selection '$CHOICE' (1-$TESTCOUNT)." ; exit 1 ; } |
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|
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if [[ $CHOICE == 0 ]]; then |
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# |
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# List test descriptions with numbers and get selection |
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# |
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echo "Available '$TESTENV' tests:" ; echo "$OUT" | { |
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IND=0 |
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while IFS= read -r LINE |
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do |
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if [[ $LINE =~ $ISEXEC ]]; then |
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DESC=$( "$SED" -E 's/^exec_test \$1 \$2 "([^"]+)".*$/\1/g' <<<"$LINE" ) |
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(( ++IND < 10 )) && echo -n " " |
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echo " $IND) $DESC" |
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fi |
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done |
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} |
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CHOICE=1 |
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if [[ $TESTCOUNT > 1 ]]; then |
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for (( ; ; )) |
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do |
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read -p "Select a '$TESTENV' test (1-$TESTCOUNT) : " CHOICE |
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[[ -z "$CHOICE" ]] && { errout "(canceled)" ; exit 1 ; } |
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[[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= TESTCOUNT)) && break |
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errout ">>> Invalid test selection '$CHOICE'." |
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done |
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fi |
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fi |
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|
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# |
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# Run the specified test lines |
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# |
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echo -ne "\033[0;33m" |
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echo "$OUT" | { |
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IND=0 |
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GOTX=0 |
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CMD="" |
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while IFS= read -r LINE |
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do |
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if [[ $LINE =~ $ISCMD || $GOTX == 1 ]]; then |
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((!IND)) && let IND++ |
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if [[ $LINE =~ $ISEXEC ]]; then |
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((IND++ > CHOICE)) && break |
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else |
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((!HEADER)) && { |
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HEADER=1 |
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echo -e "\n#\n# Test $TESTENV ($CHOICE) $DESC\n#" |
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} |
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((IND == CHOICE)) && { |
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GOTX=1 |
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[[ $CMD == "" ]] && CMD="$LINE" || CMD=$( echo -e "$CMD$LINE" | $SED -e 's/\\//g' | $SED -E 's/ +/ /g' ) |
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[[ $LINE =~ $ISCONT ]] || { echo "$CMD" ; eval "$CMD" ; CMD="" ; } |
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} |
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fi |
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fi |
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done |
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} |
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echo -ne "\033[0m" |
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|
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# Make clear it's a TEST |
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opt_set CUSTOM_MACHINE_NAME "\"Test $TESTENV ($CHOICE)\"" |
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|
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# Build the test too? |
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if [[ -z "$BUILD_YES" ]]; then |
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echo |
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read -p "Build $TESTENV test #$CHOICE (y/N) ? " BUILD_YES |
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fi |
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|
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[[ $BUILD_YES == 'Y' || $BUILD_YES == 'Yes' ]] && { |
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((USE_MAKE)) && make tests-single-local TEST_TARGET=$TESTENV ONLY_TEST=$CHOICE |
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((USE_MAKE)) || pio run -s -d . -e $TESTENV |
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echo "$TESTENV" >"$STATE_FILE" |
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} |
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@ -0,0 +1,77 @@ |
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#!/usr/bin/env bash |
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# |
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# run_tests |
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# |
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HERE="$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P )" |
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TESTS="$HERE/../tests" |
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export PATH="$HERE:$TESTS:$PATH" |
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|
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# exit on first failure |
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set -e |
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|
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exec_test () { |
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printf "\n\033[0;32m[Test $2] \033[0m$3...\n" |
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# Check to see if we should skip tests |
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if [[ -n "$4" ]] ; then |
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if [[ ! "$3" =~ $4 ]] ; then |
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printf "\033[1;33mSkipped\033[0m\n" |
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return 0 |
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fi |
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fi |
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if [[ -z "$VERBOSE_PLATFORMIO" ]] ; then |
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silent="--silent" |
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else |
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silent="-v" |
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fi |
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if platformio run --project-dir $1 -e $2 $silent; then |
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printf "\033[0;32mPassed\033[0m\n" |
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return 0 |
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else |
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if [[ -n $GIT_RESET_HARD ]]; then |
|||
git reset --hard HEAD |
|||
else |
|||
restore_configs |
|||
fi |
|||
printf "\033[0;31mFailed!\033[0m\n" |
|||
return 1 |
|||
fi |
|||
} |
|||
export -f exec_test |
|||
|
|||
printf "Running \033[0;32m$2\033[0m Tests\n" |
|||
|
|||
if [[ $2 = "ALL" ]]; then |
|||
tests=("$TESTS"/*) |
|||
for f in "${tests[@]}"; do |
|||
testenv=$(basename $f) |
|||
printf "Running \033[0;32m$f\033[0m Tests\n" |
|||
exec_test $1 "$testenv --target clean" "Setup Build Environment" |
|||
if [[ $GIT_RESET_HARD == "true" ]]; then |
|||
git reset --hard HEAD |
|||
else |
|||
restore_configs |
|||
fi |
|||
done |
|||
else |
|||
exec_test $1 "$2 --target clean" "Setup Build Environment" |
|||
test_name="$3" |
|||
# If the test name is 1 or 2 digits, treat it as an index |
|||
if [[ "$test_name" =~ ^[0-9][0-9]?$ ]] ; then |
|||
# Find the test name that corresponds to that index |
|||
test_name="$(cat $TESTS/$2 | grep -e '^exec_test' | sed -n "$3p" | sed "s/.*\$1 \$2 \"\([^\"]*\).*/\1/g")" |
|||
if [[ -z "$test_name" ]] ; then |
|||
# Fail if none matches |
|||
printf "\033[0;31mCould not find test \033[0m#$3\033[0;31m in \033[0mbuildroot/tests/$2\n" |
|||
exit 1 |
|||
else |
|||
printf "\033[0;32mMatching test \033[0m#$3\033[0;32m: '\033[0m$test_name\033[0;32m'\n" |
|||
fi |
|||
fi |
|||
$TESTS/$2 $1 $2 "$test_name" |
|||
if [[ $GIT_RESET_HARD == "true" ]]; then |
|||
git reset --hard HEAD |
|||
else |
|||
restore_configs |
|||
fi |
|||
fi |
|||
printf "\033[0;32mAll tests completed successfully\033[0m\n" |
|||
@ -0,0 +1,66 @@ |
|||
{ |
|||
"build": { |
|||
"core": "stm32", |
|||
"cpu": "cortex-m4", |
|||
"extra_flags": "-DSTM32F401xx", |
|||
"f_cpu": "84000000L", |
|||
"hwids": [ |
|||
[ |
|||
"0x1EAF", |
|||
"0x0003" |
|||
], |
|||
[ |
|||
"0x0483", |
|||
"0x3748" |
|||
] |
|||
], |
|||
"ldscript": "stm32f401rc.ld", |
|||
"mcu": "stm32f401rct6", |
|||
"variant": "FYSETC_CHEETAH_V20" |
|||
}, |
|||
"debug": { |
|||
"jlink_device": "STM32F401RC", |
|||
"openocd_target": "stm32f4x", |
|||
"svd_path": "STM32F40x.svd", |
|||
"tools": { |
|||
"stlink": { |
|||
"server": { |
|||
"arguments": [ |
|||
"-f", |
|||
"scripts/interface/stlink.cfg", |
|||
"-c", |
|||
"transport select hla_swd", |
|||
"-f", |
|||
"scripts/target/stm32f4x.cfg", |
|||
"-c", |
|||
"reset_config none" |
|||
], |
|||
"executable": "bin/openocd", |
|||
"package": "tool-openocd" |
|||
} |
|||
} |
|||
} |
|||
}, |
|||
"frameworks": [ |
|||
"arduino", |
|||
"stm32cube" |
|||
], |
|||
"name": "STM32F401RC (64k RAM. 256k Flash)", |
|||
"upload": { |
|||
"disable_flushing": false, |
|||
"maximum_ram_size": 65536, |
|||
"maximum_size": 262144, |
|||
"protocol": "stlink", |
|||
"protocols": [ |
|||
"stlink", |
|||
"dfu", |
|||
"jlink" |
|||
], |
|||
"offset_address": "0x800C000", |
|||
"require_upload_port": true, |
|||
"use_1200bps_touch": false, |
|||
"wait_for_upload_port": false |
|||
}, |
|||
"url": "https://www.fysetc.com", |
|||
"vendor": "Generic" |
|||
} |
|||
@ -0,0 +1,59 @@ |
|||
{ |
|||
"build": { |
|||
"core": "arduino", |
|||
"cpu": "cortex-m3", |
|||
"extra_flags": "-D__SAM3X8E__ -DARDUINO_ARCH_SAM -DARDUINO_SAM_DUE", |
|||
"f_cpu": "84000000L", |
|||
"hwids": [ |
|||
[ |
|||
"0x27B1", |
|||
"0x0001" |
|||
], |
|||
[ |
|||
"0x2341", |
|||
"0x003E" |
|||
], |
|||
[ |
|||
"0x2341", |
|||
"0x003D" |
|||
] |
|||
], |
|||
"ldscript": "linker_scripts/gcc/flash.ld", |
|||
"mcu": "at91sam3x8e", |
|||
"usb_product": "Archim", |
|||
"variant": "archim" |
|||
}, |
|||
"connectivity": [ |
|||
"can" |
|||
], |
|||
"debug": { |
|||
"jlink_device": "ATSAM3X8E", |
|||
"openocd_chipname": "at91sam3X8E", |
|||
"openocd_target": "at91sam3XXX", |
|||
"svd_path": "ATSAM3X8E.svd" |
|||
}, |
|||
"frameworks": [ |
|||
"arduino", |
|||
"simba" |
|||
], |
|||
"name": "Archim", |
|||
"upload": { |
|||
"disable_flushing": true, |
|||
"maximum_ram_size": 98304, |
|||
"maximum_size": 524288, |
|||
"native_usb": true, |
|||
"protocol": "sam-ba", |
|||
"protocols": [ |
|||
"sam-ba", |
|||
"jlink", |
|||
"blackmagic", |
|||
"atmel-ice", |
|||
"stlink" |
|||
], |
|||
"require_upload_port": true, |
|||
"use_1200bps_touch": true, |
|||
"wait_for_upload_port": true |
|||
}, |
|||
"url": "https://ultimachine.com", |
|||
"vendor": "UltiMachine" |
|||
} |
|||
@ -0,0 +1,34 @@ |
|||
{ |
|||
"build": { |
|||
"core": "arduino", |
|||
"extra_flags": "-DARDUINO_AVR_MEGA2560", |
|||
"f_cpu": "16000000L", |
|||
"hwids": [ |
|||
[ |
|||
"0x27b2", |
|||
"0x0002" |
|||
] |
|||
], |
|||
"mcu": "atmega2560", |
|||
"variant": "fysetcf6" |
|||
}, |
|||
"debug": { |
|||
"simavr_target": "atmega2560", |
|||
"avr-stub": { |
|||
"speed": 115200 |
|||
} |
|||
}, |
|||
"frameworks": [ |
|||
"arduino" |
|||
], |
|||
"name": "FYSETC F6", |
|||
"upload": { |
|||
"maximum_ram_size": 8192, |
|||
"maximum_size": 258048, |
|||
"protocol": "wiring", |
|||
"require_upload_port": true, |
|||
"speed": 115200 |
|||
}, |
|||
"url": "https://www.fysetc.com/", |
|||
"vendor": "FYSETC" |
|||
} |
|||
@ -0,0 +1,56 @@ |
|||
{ |
|||
"build": { |
|||
"core": "stm32", |
|||
"cpu": "cortex-m4", |
|||
"extra_flags": "-DSTM32F407xx -DSTM32F4", |
|||
"f_cpu": "168000000L", |
|||
"hwids": [ |
|||
[ |
|||
"0x1EAF", |
|||
"0x0003" |
|||
], |
|||
[ |
|||
"0x0483", |
|||
"0x3748" |
|||
] |
|||
], |
|||
"mcu": "stm32f407vgt6", |
|||
"product_line": "STM32F407xx", |
|||
"variant": "Generic_F4x7Vx" |
|||
}, |
|||
"debug": { |
|||
"default_tools": [ |
|||
"stlink" |
|||
], |
|||
"jlink_device": "STM32F407VG", |
|||
"openocd_extra_args": [ |
|||
"-c", |
|||
"reset_config none" |
|||
], |
|||
"openocd_target": "stm32f4x", |
|||
"svd_path": "STM32F40x.svd" |
|||
}, |
|||
"frameworks": [ |
|||
"arduino", |
|||
"cmsis", |
|||
"stm32cube", |
|||
"libopencm3" |
|||
], |
|||
"name": "STM32F407VG (128k RAM, 64k CCM RAM, 1024k Flash", |
|||
"upload": { |
|||
"disable_flushing": false, |
|||
"maximum_ram_size": 131072, |
|||
"maximum_size": 1048576, |
|||
"protocol": "stlink", |
|||
"protocols": [ |
|||
"stlink", |
|||
"dfu", |
|||
"jlink" |
|||
], |
|||
"require_upload_port": true, |
|||
"use_1200bps_touch": false, |
|||
"wait_for_upload_port": false |
|||
}, |
|||
"url": "https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f4-series/stm32f407-417/stm32f407vg.html", |
|||
"vendor": "Generic" |
|||
} |
|||
@ -0,0 +1,35 @@ |
|||
{ |
|||
"build": { |
|||
"cpu": "cortex-m4", |
|||
"extra_flags": "-DSTM32F446xx", |
|||
"f_cpu": "180000000L", |
|||
"mcu": "stm32f446ret6", |
|||
"variant": "MARLIN_FYSETC_S6" |
|||
}, |
|||
"connectivity": [ |
|||
"can" |
|||
], |
|||
"debug": { |
|||
"jlink_device": "STM32F446RE", |
|||
"openocd_target": "stm32f4x", |
|||
"svd_path": "STM32F446x.svd" |
|||
}, |
|||
"frameworks": [ |
|||
"arduino", |
|||
"stm32cube" |
|||
], |
|||
"name": "3D Printer control board", |
|||
"upload": { |
|||
"maximum_ram_size": 131072, |
|||
"maximum_size": 524288, |
|||
"protocol": "stlink", |
|||
"protocols": [ |
|||
"jlink", |
|||
"stlink", |
|||
"blackmagic", |
|||
"serial" |
|||
] |
|||
}, |
|||
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html", |
|||
"vendor": "FYSETC" |
|||
} |
|||
@ -0,0 +1,14 @@ |
|||
MEMORY |
|||
{ |
|||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40 |
|||
rom (rx) : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K |
|||
} |
|||
|
|||
/* Provide memory region aliases for common.inc */ |
|||
REGION_ALIAS("REGION_TEXT", rom); |
|||
REGION_ALIAS("REGION_DATA", ram); |
|||
REGION_ALIAS("REGION_BSS", ram); |
|||
REGION_ALIAS("REGION_RODATA", rom); |
|||
|
|||
/* Let common.inc handle the real work. */ |
|||
INCLUDE common.inc |
|||
@ -0,0 +1,14 @@ |
|||
MEMORY |
|||
{ |
|||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40 |
|||
rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K |
|||
} |
|||
|
|||
/* Provide memory region aliases for common.inc */ |
|||
REGION_ALIAS("REGION_TEXT", rom); |
|||
REGION_ALIAS("REGION_DATA", ram); |
|||
REGION_ALIAS("REGION_BSS", ram); |
|||
REGION_ALIAS("REGION_RODATA", rom); |
|||
|
|||
/* Let common.inc handle the real work. */ |
|||
INCLUDE common.inc |
|||
@ -0,0 +1,19 @@ |
|||
# |
|||
# SAMD51_grandcentral_m4.py |
|||
# Customizations for env:SAMD51_grandcentral_m4 |
|||
# |
|||
from os.path import join, isfile |
|||
import shutil |
|||
from pprint import pprint |
|||
|
|||
Import("env") |
|||
|
|||
mf = env["MARLIN_FEATURES"] |
|||
rxBuf = mf["RX_BUFFER_SIZE"] if "RX_BUFFER_SIZE" in mf else "0" |
|||
txBuf = mf["TX_BUFFER_SIZE"] if "TX_BUFFER_SIZE" in mf else "0" |
|||
|
|||
serialBuf = str(max(int(rxBuf), int(txBuf), 350)) |
|||
|
|||
build_flags = env.get('BUILD_FLAGS') |
|||
build_flags.append("-DSERIAL_BUFFER_SIZE=" + serialBuf) |
|||
env.Replace(BUILD_FLAGS=build_flags) |
|||
@ -1,3 +1,6 @@ |
|||
# |
|||
# STM32F103RET6_creality.py |
|||
# |
|||
import os |
|||
Import("env") |
|||
|
|||
@ -1,3 +1,7 @@ |
|||
# |
|||
# STM32F401VE_STEVAL.py |
|||
# Customizations for env:STM32F401VE_STEVAL |
|||
# |
|||
import os |
|||
Import("env") |
|||
|
|||
@ -0,0 +1,5 @@ |
|||
# |
|||
# add_nanolib.py |
|||
# |
|||
Import("env") |
|||
env.Append(LINKFLAGS=["--specs=nano.specs"]) |
|||
@ -0,0 +1,16 @@ |
|||
# |
|||
# common-dependencies-post.py |
|||
# Convenience script to add build flags for Marlin Enabled Features |
|||
# |
|||
|
|||
Import("env") |
|||
Import("projenv") |
|||
|
|||
def apply_board_build_flags(): |
|||
if not 'BOARD_CUSTOM_BUILD_FLAGS' in env['MARLIN_FEATURES']: |
|||
return |
|||
projenv.Append(CCFLAGS=env['MARLIN_FEATURES']['BOARD_CUSTOM_BUILD_FLAGS'].split()) |
|||
|
|||
# We need to add the board build flags in a post script |
|||
# so the platform build script doesn't overwrite the custom CCFLAGS |
|||
apply_board_build_flags() |
|||
@ -0,0 +1,104 @@ |
|||
/* ***************************************************************************** |
|||
* The MIT License |
|||
* |
|||
* Copyright (c) 2010 Perry Hung. |
|||
* |
|||
* Permission is hereby granted, free of charge, to any person obtaining a copy |
|||
* of this software and associated documentation files (the "Software"), to deal |
|||
* in the Software without restriction, including without limitation the rights |
|||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
|||
* copies of the Software, and to permit persons to whom the Software is |
|||
* furnished to do so, subject to the following conditions: |
|||
* |
|||
* The above copyright notice and this permission notice shall be included in |
|||
* all copies or substantial portions of the Software. |
|||
* |
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
|||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
|||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
|||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
|||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
|||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
|||
* THE SOFTWARE. |
|||
* ****************************************************************************/ |
|||
|
|||
# On an exception, push a fake stack thread mode stack frame and redirect |
|||
# thread execution to a thread mode error handler |
|||
|
|||
# From RM008: |
|||
# The SP is decremented by eight words by the completion of the stack push. |
|||
# Figure 5-1 shows the contents of the stack after an exception pre-empts the |
|||
# current program flow. |
|||
# |
|||
# Old SP--> <previous> |
|||
# xPSR |
|||
# PC |
|||
# LR |
|||
# r12 |
|||
# r3 |
|||
# r2 |
|||
# r1 |
|||
# SP--> r0 |
|||
|
|||
.text |
|||
.globl __exc_nmi |
|||
.weak __exc_nmi |
|||
.globl __exc_hardfault |
|||
.weak __exc_hardfault |
|||
.globl __exc_memmanage |
|||
.weak __exc_memmanage |
|||
.globl __exc_busfault |
|||
.weak __exc_busfault |
|||
.globl __exc_usagefault |
|||
.weak __exc_usagefault |
|||
|
|||
.code 16 |
|||
.thumb_func |
|||
__exc_nmi: |
|||
mov r0, #1 |
|||
b __default_exc |
|||
|
|||
.thumb_func |
|||
__exc_hardfault: |
|||
mov r0, #2 |
|||
b __default_exc |
|||
|
|||
.thumb_func |
|||
__exc_memmanage: |
|||
mov r0, #3 |
|||
b __default_exc |
|||
|
|||
.thumb_func |
|||
__exc_busfault: |
|||
mov r0, #4 |
|||
b __default_exc |
|||
|
|||
.thumb_func |
|||
__exc_usagefault: |
|||
mov r0, #5 |
|||
b __default_exc |
|||
|
|||
.thumb_func |
|||
__default_exc: |
|||
ldr r2, NVIC_CCR @ Enable returning to thread mode even if there are |
|||
mov r1 ,#1 @ pending exceptions. See flag NONEBASETHRDENA. |
|||
str r1, [r2] |
|||
cpsid i @ Disable global interrupts |
|||
ldr r2, SYSTICK_CSR @ Disable systick handler |
|||
mov r1, #0 |
|||
str r1, [r2] |
|||
ldr r1, CPSR_MASK @ Set default CPSR |
|||
push {r1} |
|||
ldr r1, TARGET_PC @ Set target pc |
|||
push {r1} |
|||
sub sp, sp, #24 @ Don't care |
|||
ldr r1, EXC_RETURN @ Return to thread mode |
|||
mov lr, r1 |
|||
bx lr @ Exception exit |
|||
|
|||
.align 4 |
|||
CPSR_MASK: .word 0x61000000 |
|||
EXC_RETURN: .word 0xFFFFFFF9 |
|||
TARGET_PC: .word __error |
|||
NVIC_CCR: .word 0xE000ED14 @ NVIC configuration control register |
|||
SYSTICK_CSR: .word 0xE000E010 @ Systick control register |
|||
@ -0,0 +1,44 @@ |
|||
# |
|||
# fix_framework_weakness.py |
|||
# |
|||
from os.path import join, isfile |
|||
import shutil |
|||
from pprint import pprint |
|||
|
|||
Import("env") |
|||
|
|||
if env.MarlinFeatureIsEnabled("POSTMORTEM_DEBUGGING"): |
|||
FRAMEWORK_DIR = env.PioPlatform().get_package_dir("framework-arduinoststm32-maple") |
|||
patchflag_path = join(FRAMEWORK_DIR, ".exc-patching-done") |
|||
|
|||
# patch file only if we didn't do it before |
|||
if not isfile(patchflag_path): |
|||
print("Patching libmaple exception handlers") |
|||
original_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S") |
|||
backup_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S.bak") |
|||
src_file = join("buildroot", "share", "PlatformIO", "scripts", "exc.S") |
|||
|
|||
assert isfile(original_file) and isfile(src_file) |
|||
shutil.copyfile(original_file, backup_file) |
|||
shutil.copyfile(src_file, original_file); |
|||
|
|||
def _touch(path): |
|||
with open(path, "w") as fp: |
|||
fp.write("") |
|||
|
|||
env.Execute(lambda *args, **kwargs: _touch(patchflag_path)) |
|||
print("Done patching exception handler") |
|||
|
|||
print("Libmaple modified and ready for post mortem debugging") |
|||
|
|||
mf = env["MARLIN_FEATURES"] |
|||
rxBuf = mf["RX_BUFFER_SIZE"] if "RX_BUFFER_SIZE" in mf else "0" |
|||
txBuf = mf["TX_BUFFER_SIZE"] if "TX_BUFFER_SIZE" in mf else "0" |
|||
if int(rxBuf) < 64: |
|||
rxBuf = "64" |
|||
if int(txBuf) < 64: |
|||
txBuf = "64" |
|||
|
|||
build_flags = env.get('BUILD_FLAGS') |
|||
build_flags.append("-DUSART_RX_BUF_SIZE=" + rxBuf + " -DUSART_TX_BUF_SIZE=" + txBuf) |
|||
env.Replace(BUILD_FLAGS=build_flags) |
|||
@ -0,0 +1,20 @@ |
|||
# |
|||
# fly_mini.py |
|||
# Customizations for env:FLY_MINI |
|||
# |
|||
import os |
|||
Import("env") |
|||
|
|||
# Relocate firmware from 0x08000000 to 0x08005000 |
|||
for define in env['CPPDEFINES']: |
|||
if define[0] == "VECT_TAB_ADDR": |
|||
env['CPPDEFINES'].remove(define) |
|||
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000")) |
|||
|
|||
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/fly_mini.ld") |
|||
for i, flag in enumerate(env["LINKFLAGS"]): |
|||
if "-Wl,-T" in flag: |
|||
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script |
|||
elif flag == "-T": |
|||
env["LINKFLAGS"][i + 1] = custom_ld_script |
|||
|
|||
@ -0,0 +1,13 @@ |
|||
# |
|||
# STM32F401VE_STEVAL.py |
|||
# Customizations for env:STM32F401VE_STEVAL |
|||
# |
|||
import os |
|||
Import("env") |
|||
|
|||
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/ldscript.ld") |
|||
for i, flag in enumerate(env["LINKFLAGS"]): |
|||
if "-Wl,-T" in flag: |
|||
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script |
|||
elif flag == "-T": |
|||
env["LINKFLAGS"][i + 1] = custom_ld_script |
|||
@ -0,0 +1,32 @@ |
|||
import os,sys |
|||
Import("env") |
|||
|
|||
from SCons.Script import DefaultEnvironment |
|||
board = DefaultEnvironment().BoardConfig() |
|||
|
|||
# Encrypt ${PROGNAME}.bin and save it as build.firmware ('Robin.bin') |
|||
def encrypt(source, target, env): |
|||
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] |
|||
|
|||
firmware = open(target[0].path, "rb") |
|||
robin = open(target[0].dir.path +'/'+ board.get("build.firmware"), "wb") |
|||
length = os.path.getsize(target[0].path) |
|||
position = 0 |
|||
try: |
|||
while position < length: |
|||
byte = firmware.read(1) |
|||
if position >= 320 and position < 31040: |
|||
byte = chr(ord(byte) ^ key[position & 31]) |
|||
if sys.version_info[0] > 2: |
|||
byte = bytes(byte, 'latin1') |
|||
robin.write(byte) |
|||
position += 1 |
|||
finally: |
|||
firmware.close() |
|||
robin.close() |
|||
|
|||
if 'firmware' in board.get("build").keys(): |
|||
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt); |
|||
else: |
|||
print("You need to define output file via board_build.firmware = 'filename' parameter", file=sys.stderr) |
|||
exit(1); |
|||
@ -0,0 +1,40 @@ |
|||
import os |
|||
Import("env") |
|||
|
|||
# Relocate firmware from 0x08000000 to 0x08007000 |
|||
for define in env['CPPDEFINES']: |
|||
if define[0] == "VECT_TAB_ADDR": |
|||
env['CPPDEFINES'].remove(define) |
|||
env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000")) |
|||
|
|||
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld") |
|||
for i, flag in enumerate(env["LINKFLAGS"]): |
|||
if "-Wl,-T" in flag: |
|||
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script |
|||
elif flag == "-T": |
|||
env["LINKFLAGS"][i + 1] = custom_ld_script |
|||
|
|||
|
|||
# Encrypt ${PROGNAME}.bin and save it as 'mks_robin_e3p.bin' |
|||
def encrypt(source, target, env): |
|||
import sys |
|||
|
|||
key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] |
|||
|
|||
firmware = open(target[0].path, "rb") |
|||
robin = open(target[0].dir.path +'/Robin_e3p.bin', "wb") |
|||
length = os.path.getsize(target[0].path) |
|||
position = 0 |
|||
try: |
|||
while position < length: |
|||
byte = firmware.read(1) |
|||
if position >= 320 and position < 31040: |
|||
byte = chr(ord(byte) ^ key[position & 31]) |
|||
if sys.version_info[0] > 2: |
|||
byte = bytes(byte, 'latin1') |
|||
robin.write(byte) |
|||
position += 1 |
|||
finally: |
|||
firmware.close() |
|||
robin.close() |
|||
env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt); |
|||
@ -0,0 +1,14 @@ |
|||
# Generate the firmware as OpenBLT needs |
|||
|
|||
import os,sys |
|||
from os.path import join |
|||
|
|||
Import("env") |
|||
|
|||
env.AddPostAction( |
|||
"$BUILD_DIR/${PROGNAME}.elf", |
|||
env.VerboseAction(" ".join([ |
|||
"$OBJCOPY", "-O", "srec", |
|||
"\"$BUILD_DIR/${PROGNAME}.elf\"", "\"$BUILD_DIR/${PROGNAME}.srec\"" |
|||
]), "Building " + join("$BUILD_DIR","${PROGNAME}.srec")) |
|||
) |
|||
@ -0,0 +1,75 @@ |
|||
# |
|||
# preflight-checks.py |
|||
# Check for common issues prior to compiling |
|||
# |
|||
import os,re,sys |
|||
Import("env") |
|||
|
|||
def get_envs_for_board(board): |
|||
with open(os.path.join("Marlin", "src", "pins", "pins.h"), "r") as file: |
|||
|
|||
if sys.platform == 'win32': |
|||
envregex = r"(?:env|win):" |
|||
elif sys.platform == 'darwin': |
|||
envregex = r"(?:env|mac|uni):" |
|||
elif sys.platform == 'linux': |
|||
envregex = r"(?:env|lin|uni):" |
|||
else: |
|||
envregex = r"(?:env):" |
|||
|
|||
r = re.compile(r"if\s+MB\((.+)\)") |
|||
if board.startswith("BOARD_"): |
|||
board = board[6:] |
|||
|
|||
for line in file: |
|||
mbs = r.findall(line) |
|||
if mbs and board in re.split(r",\s*", mbs[0]): |
|||
line = file.readline() |
|||
found_envs = re.match(r"\s*#include .+" + envregex, line) |
|||
if found_envs: |
|||
envlist = re.findall(envregex + r"(\w+)", line) |
|||
return [ "env:"+s for s in envlist ] |
|||
return [] |
|||
|
|||
def check_envs(build_env, board_envs, config): |
|||
if build_env in board_envs: |
|||
return True |
|||
ext = config.get(build_env, 'extends', default=None) |
|||
if ext: |
|||
if isinstance(ext, str): |
|||
return check_envs(ext, board_envs, config) |
|||
elif isinstance(ext, list): |
|||
for ext_env in ext: |
|||
if check_envs(ext_env, board_envs, config): |
|||
return True |
|||
return False |
|||
|
|||
# Sanity checks: |
|||
if 'PIOENV' not in env: |
|||
raise SystemExit("Error: PIOENV is not defined. This script is intended to be used with PlatformIO") |
|||
|
|||
if 'MARLIN_FEATURES' not in env: |
|||
raise SystemExit("Error: this script should be used after common Marlin scripts") |
|||
|
|||
if 'MOTHERBOARD' not in env['MARLIN_FEATURES']: |
|||
raise SystemExit("Error: MOTHERBOARD is not defined in Configuration.h") |
|||
|
|||
build_env = env['PIOENV'] |
|||
motherboard = env['MARLIN_FEATURES']['MOTHERBOARD'] |
|||
board_envs = get_envs_for_board(motherboard) |
|||
config = env.GetProjectConfig() |
|||
result = check_envs("env:"+build_env, board_envs, config) |
|||
|
|||
if not result: |
|||
err = "Error: Build environment '%s' is incompatible with %s. Use one of these: %s" % \ |
|||
( build_env, motherboard, ", ".join([ e[4:] for e in board_envs if e.startswith("env:") ]) ) |
|||
raise SystemExit(err) |
|||
|
|||
# |
|||
# Check for Config files in two common incorrect places |
|||
# |
|||
for p in [ env['PROJECT_DIR'], os.path.join(env['PROJECT_DIR'], "config") ]: |
|||
for f in [ "Configuration.h", "Configuration_adv.h" ]: |
|||
if os.path.isfile(os.path.join(p, f)): |
|||
err = "ERROR: Config files found in directory %s. Please move them into the Marlin subfolder." % p |
|||
raise SystemExit(err) |
|||
@ -0,0 +1,266 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* Redistribution and use in source and binary forms, with or without |
|||
* modification, are permitted provided that the following conditions are met: |
|||
* |
|||
* 1. Redistributions of source code must retain the above copyright notice, |
|||
* this list of conditions and the following disclaimer. |
|||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
* this list of conditions and the following disclaimer in the documentation |
|||
* and/or other materials provided with the distribution. |
|||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
|||
* may be used to endorse or promote products derived from this software |
|||
* without specific prior written permission. |
|||
* |
|||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
******************************************************************************* |
|||
* Automatically generated from STM32F401R[(B-C)|(D-E)]Tx.xml |
|||
*/ |
|||
#include "Arduino.h" |
|||
#include "PeripheralPins.h" |
|||
|
|||
/* =====
|
|||
* Note: Commented lines are alternative possibilities which are not used per default. |
|||
* If you change them, you will have to know what you do |
|||
* ===== |
|||
*/ |
|||
|
|||
//*** ADC ***
|
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_ADC[] = { |
|||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
|||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
|||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
|||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
|||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
|||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
|||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
|||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
|||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
|||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
|||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
|||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
|||
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
|||
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
|||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
|||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No DAC ***
|
|||
|
|||
//*** I2C ***
|
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SDA[] = { |
|||
{PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)}, |
|||
{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, |
|||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SCL[] = { |
|||
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
|||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** PWM ***
|
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_PWM[] = { |
|||
// {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
|||
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
|||
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
|||
{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
|||
// {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
|||
{PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
|||
// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
|||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
|||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
|||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
|||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
|||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
|||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
|||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
|||
// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
|
|||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
|||
// {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
|
|||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
|||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SERIAL ***
|
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_TX[] = { |
|||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PA_11, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RX[] = { |
|||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PA_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RTS[] = { |
|||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_CTS[] = { |
|||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SPI ***
|
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MOSI[] = { |
|||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MISO[] = { |
|||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SCLK[] = { |
|||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SSEL[] = { |
|||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No CAN ***
|
|||
|
|||
//*** No ETHERNET ***
|
|||
|
|||
//*** No QUADSPI ***
|
|||
|
|||
//*** USB ***
|
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_USB_OTG_FS[] = { |
|||
#ifndef ARDUINO_CoreBoard_F401RC |
|||
{PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
|||
{PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
|
|||
{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
|
|||
#endif |
|||
{PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
|
|||
{PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No USB_OTG_HS ***
|
|||
|
|||
//*** SD ***
|
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SD[] = { |
|||
{PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
|
|||
{PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
|
|||
{PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
|
|||
{PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
|
|||
{PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
|
|||
{PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
|
|||
{PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
|
|||
{PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
|
|||
{PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
|
|||
{PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
@ -0,0 +1,33 @@ |
|||
/* SYS_WKUP */ |
|||
#ifdef PWR_WAKEUP_PIN1 |
|||
SYS_WKUP1 = PA_0, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN2 |
|||
SYS_WKUP2 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN3 |
|||
SYS_WKUP3 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN4 |
|||
SYS_WKUP4 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN5 |
|||
SYS_WKUP5 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN6 |
|||
SYS_WKUP6 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN7 |
|||
SYS_WKUP7 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN8 |
|||
SYS_WKUP8 = NC, |
|||
#endif |
|||
/* USB */ |
|||
#ifdef USBCON |
|||
USB_OTG_FS_SOF = PA_8, |
|||
USB_OTG_FS_VBUS = PA_9, |
|||
USB_OTG_FS_ID = PA_10, |
|||
USB_OTG_FS_DM = PA_11, |
|||
USB_OTG_FS_DP = PA_12, |
|||
#endif |
|||
@ -0,0 +1,496 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_conf.h |
|||
* @brief HAL configuration file. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2017 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef __STM32F4xx_HAL_CONF_CUSTOM |
|||
#define __STM32F4xx_HAL_CONF_CUSTOM |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/* Exported constants --------------------------------------------------------*/ |
|||
|
|||
/* ########################## Module Selection ############################## */ |
|||
/**
|
|||
* @brief This is the list of modules to be used in the HAL driver |
|||
*/ |
|||
#define HAL_MODULE_ENABLED |
|||
#define HAL_ADC_MODULE_ENABLED |
|||
/* #define HAL_CAN_MODULE_ENABLED */ |
|||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ |
|||
#define HAL_CRC_MODULE_ENABLED |
|||
/* #define HAL_CEC_MODULE_ENABLED */ |
|||
/* #define HAL_CRYP_MODULE_ENABLED */ |
|||
//#define HAL_DAC_MODULE_ENABLED
|
|||
/* #define HAL_DCMI_MODULE_ENABLED */ |
|||
#define HAL_DMA_MODULE_ENABLED |
|||
/* #define HAL_DMA2D_MODULE_ENABLED */ |
|||
/* #define HAL_ETH_MODULE_ENABLED */ |
|||
#define HAL_FLASH_MODULE_ENABLED |
|||
/* #define HAL_NAND_MODULE_ENABLED */ |
|||
/* #define HAL_NOR_MODULE_ENABLED */ |
|||
/* #define HAL_PCCARD_MODULE_ENABLED */ |
|||
/* #define HAL_SRAM_MODULE_ENABLED */ |
|||
/* #define HAL_SDRAM_MODULE_ENABLED */ |
|||
/* #define HAL_HASH_MODULE_ENABLED */ |
|||
#define HAL_GPIO_MODULE_ENABLED |
|||
/* #define HAL_EXTI_MODULE_ENABLED */ |
|||
#define HAL_I2C_MODULE_ENABLED |
|||
/* #define HAL_SMBUS_MODULE_ENABLED */ |
|||
/* #define HAL_I2S_MODULE_ENABLED */ |
|||
#define HAL_IWDG_MODULE_ENABLED |
|||
/* #define HAL_LTDC_MODULE_ENABLED */ |
|||
/* #define HAL_DSI_MODULE_ENABLED */ |
|||
#define HAL_PWR_MODULE_ENABLED |
|||
/* #define HAL_QSPI_MODULE_ENABLED */ |
|||
#define HAL_RCC_MODULE_ENABLED |
|||
/* #define HAL_RNG_MODULE_ENABLED */ |
|||
#define HAL_RTC_MODULE_ENABLED |
|||
/* #define HAL_SAI_MODULE_ENABLED */ |
|||
//#define HAL_SD_MODULE_ENABLED
|
|||
#define HAL_SPI_MODULE_ENABLED |
|||
#define HAL_TIM_MODULE_ENABLED |
|||
/* #define HAL_UART_MODULE_ENABLED */ |
|||
/* #define HAL_USART_MODULE_ENABLED */ |
|||
/* #define HAL_IRDA_MODULE_ENABLED */ |
|||
/* #define HAL_SMARTCARD_MODULE_ENABLED */ |
|||
/* #define HAL_WWDG_MODULE_ENABLED */ |
|||
#define HAL_CORTEX_MODULE_ENABLED |
|||
#ifndef HAL_PCD_MODULE_ENABLED |
|||
#define HAL_PCD_MODULE_ENABLED //Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
|
|||
#endif |
|||
/* #define HAL_HCD_MODULE_ENABLED */ |
|||
/* #define HAL_FMPI2C_MODULE_ENABLED */ |
|||
/* #define HAL_SPDIFRX_MODULE_ENABLED */ |
|||
/* #define HAL_DFSDM_MODULE_ENABLED */ |
|||
/* #define HAL_LPTIM_MODULE_ENABLED */ |
|||
/* #define HAL_MMC_MODULE_ENABLED */ |
|||
|
|||
/* ########################## HSE/HSI Values adaptation ##################### */ |
|||
/**
|
|||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSE is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#ifndef HSE_VALUE |
|||
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ |
|||
#endif /* HSE_VALUE */ |
|||
|
|||
#ifndef HSE_STARTUP_TIMEOUT |
|||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ |
|||
#endif /* HSE_STARTUP_TIMEOUT */ |
|||
|
|||
/**
|
|||
* @brief Internal High Speed oscillator (HSI) value. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSI is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#ifndef HSI_VALUE |
|||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ |
|||
#endif /* HSI_VALUE */ |
|||
|
|||
/**
|
|||
* @brief Internal Low Speed oscillator (LSI) value. |
|||
*/ |
|||
#ifndef LSI_VALUE |
|||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ |
|||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
|||
The real value may vary depending on the variations |
|||
in voltage and temperature. */ |
|||
/**
|
|||
* @brief External Low Speed oscillator (LSE) value. |
|||
*/ |
|||
#ifndef LSE_VALUE |
|||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ |
|||
#endif /* LSE_VALUE */ |
|||
|
|||
#ifndef LSE_STARTUP_TIMEOUT |
|||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ |
|||
#endif /* LSE_STARTUP_TIMEOUT */ |
|||
|
|||
/**
|
|||
* @brief External clock source for I2S peripheral |
|||
* This value is used by the I2S HAL module to compute the I2S clock source |
|||
* frequency, this source is inserted directly through I2S_CKIN pad. |
|||
*/ |
|||
#ifndef EXTERNAL_CLOCK_VALUE |
|||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ |
|||
#endif /* EXTERNAL_CLOCK_VALUE */ |
|||
|
|||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
|||
=== you can define the HSE value in your toolchain compiler preprocessor. */ |
|||
|
|||
/* ########################### System Configuration ######################### */ |
|||
/**
|
|||
* @brief This is the HAL system configuration section |
|||
*/ |
|||
#if !defined (VDD_VALUE) |
|||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */ |
|||
#endif |
|||
#if !defined (TICK_INT_PRIORITY) |
|||
#define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ |
|||
#endif |
|||
#if !defined (USE_RTOS) |
|||
#define USE_RTOS 0U |
|||
#endif |
|||
#if !defined (PREFETCH_ENABLE) |
|||
#define PREFETCH_ENABLE 1U |
|||
#endif |
|||
#if !defined (INSTRUCTION_CACHE_ENABLE) |
|||
#define INSTRUCTION_CACHE_ENABLE 1U |
|||
#endif |
|||
#if !defined (DATA_CACHE_ENABLE) |
|||
#define DATA_CACHE_ENABLE 1U |
|||
#endif |
|||
|
|||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ |
|||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ |
|||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ |
|||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ |
|||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ |
|||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ |
|||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ |
|||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ |
|||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ |
|||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ |
|||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ |
|||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ |
|||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ |
|||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ |
|||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ |
|||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ |
|||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ |
|||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ |
|||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ |
|||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ |
|||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ |
|||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ |
|||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ |
|||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ |
|||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ |
|||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ |
|||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ |
|||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ |
|||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ |
|||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ |
|||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ |
|||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ |
|||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ |
|||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ |
|||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ |
|||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ |
|||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ |
|||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ |
|||
|
|||
/* ########################## Assert Selection ############################## */ |
|||
/**
|
|||
* @brief Uncomment the line below to expanse the "assert_param" macro in the |
|||
* HAL drivers code |
|||
*/ |
|||
/* #define USE_FULL_ASSERT 1U */ |
|||
|
|||
/* ################## Ethernet peripheral configuration ##################### */ |
|||
|
|||
/* Section 1 : Ethernet peripheral configuration */ |
|||
|
|||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ |
|||
#define MAC_ADDR0 2U |
|||
#define MAC_ADDR1 0U |
|||
#define MAC_ADDR2 0U |
|||
#define MAC_ADDR3 0U |
|||
#define MAC_ADDR4 0U |
|||
#define MAC_ADDR5 0U |
|||
|
|||
/* Definition of the Ethernet driver buffers size and count */ |
|||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ |
|||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ |
|||
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ |
|||
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ |
|||
|
|||
/* Section 2: PHY configuration section */ |
|||
|
|||
/* DP83848_PHY_ADDRESS Address*/ |
|||
#define DP83848_PHY_ADDRESS 0x01U |
|||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ |
|||
#define PHY_RESET_DELAY 0x000000FFU |
|||
/* PHY Configuration delay */ |
|||
#define PHY_CONFIG_DELAY 0x00000FFFU |
|||
|
|||
#define PHY_READ_TO 0x0000FFFFU |
|||
#define PHY_WRITE_TO 0x0000FFFFU |
|||
|
|||
/* Section 3: Common PHY Registers */ |
|||
|
|||
#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ |
|||
#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ |
|||
|
|||
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ |
|||
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ |
|||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ |
|||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ |
|||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ |
|||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ |
|||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ |
|||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ |
|||
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ |
|||
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ |
|||
|
|||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ |
|||
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ |
|||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ |
|||
|
|||
/* Section 4: Extended PHY Registers */ |
|||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ |
|||
|
|||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ |
|||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ |
|||
|
|||
/* ################## SPI peripheral configuration ########################## */ |
|||
|
|||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
|||
* Activated: CRC code is present inside driver |
|||
* Deactivated: CRC code cleaned from driver |
|||
*/ |
|||
#ifndef USE_SPI_CRC |
|||
#define USE_SPI_CRC 0U |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
/**
|
|||
* @brief Include module's header file |
|||
*/ |
|||
|
|||
#ifdef HAL_RCC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rcc.h" |
|||
#endif /* HAL_RCC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_GPIO_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_gpio.h" |
|||
#endif /* HAL_GPIO_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_EXTI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_exti.h" |
|||
#endif /* HAL_EXTI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DMA_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dma.h" |
|||
#endif /* HAL_DMA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CORTEX_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cortex.h" |
|||
#endif /* HAL_CORTEX_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_adc.h" |
|||
#endif /* HAL_ADC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_can.h" |
|||
#endif /* HAL_CAN_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_can_legacy.h" |
|||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CRC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_crc.h" |
|||
#endif /* HAL_CRC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CRYP_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cryp.h" |
|||
#endif /* HAL_CRYP_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DMA2D_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dma2d.h" |
|||
#endif /* HAL_DMA2D_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dac.h" |
|||
#endif /* HAL_DAC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DCMI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dcmi.h" |
|||
#endif /* HAL_DCMI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ETH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_eth.h" |
|||
#endif /* HAL_ETH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_FLASH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_flash.h" |
|||
#endif /* HAL_FLASH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SRAM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sram.h" |
|||
#endif /* HAL_SRAM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NOR_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_nor.h" |
|||
#endif /* HAL_NOR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NAND_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_nand.h" |
|||
#endif /* HAL_NAND_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCCARD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pccard.h" |
|||
#endif /* HAL_PCCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SDRAM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sdram.h" |
|||
#endif /* HAL_SDRAM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_HASH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_hash.h" |
|||
#endif /* HAL_HASH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_i2c.h" |
|||
#endif /* HAL_I2C_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SMBUS_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_smbus.h" |
|||
#endif /* HAL_SMBUS_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2S_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_i2s.h" |
|||
#endif /* HAL_I2S_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IWDG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_iwdg.h" |
|||
#endif /* HAL_IWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_LTDC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_ltdc.h" |
|||
#endif /* HAL_LTDC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PWR_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pwr.h" |
|||
#endif /* HAL_PWR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_RNG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rng.h" |
|||
#endif /* HAL_RNG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_RTC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rtc.h" |
|||
#endif /* HAL_RTC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SAI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sai.h" |
|||
#endif /* HAL_SAI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sd.h" |
|||
#endif /* HAL_SD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_spi.h" |
|||
#endif /* HAL_SPI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_tim.h" |
|||
#endif /* HAL_TIM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_uart.h" |
|||
#endif /* HAL_UART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_USART_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_usart.h" |
|||
#endif /* HAL_USART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IRDA_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_irda.h" |
|||
#endif /* HAL_IRDA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SMARTCARD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_smartcard.h" |
|||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_WWDG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_wwdg.h" |
|||
#endif /* HAL_WWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pcd.h" |
|||
#endif /* HAL_PCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_HCD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_hcd.h" |
|||
#endif /* HAL_HCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DSI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dsi.h" |
|||
#endif /* HAL_DSI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_QSPI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_qspi.h" |
|||
#endif /* HAL_QSPI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CEC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cec.h" |
|||
#endif /* HAL_CEC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_FMPI2C_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_fmpi2c.h" |
|||
#endif /* HAL_FMPI2C_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SPDIFRX_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_spdifrx.h" |
|||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DFSDM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dfsdm.h" |
|||
#endif /* HAL_DFSDM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_LPTIM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_lptim.h" |
|||
#endif /* HAL_LPTIM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_MMC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_mmc.h" |
|||
#endif /* HAL_MMC_MODULE_ENABLED */ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
#ifdef USE_FULL_ASSERT |
|||
/**
|
|||
* @brief The assert_param macro is used for function's parameters check. |
|||
* @param expr If expr is false, it calls assert_failed function |
|||
* which reports the name of the source file and the source |
|||
* line number of the call that failed. |
|||
* If expr is true, it returns no value. |
|||
* @retval None |
|||
*/ |
|||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
|||
/* Exported functions ------------------------------------------------------- */ |
|||
void assert_failed(uint8_t *file, uint32_t line); |
|||
#else |
|||
#define assert_param(expr) ((void)0U) |
|||
#endif /* USE_FULL_ASSERT */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* __STM32F4xx_HAL_CONF_CUSTOM_H */ |
|||
|
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -0,0 +1,187 @@ |
|||
/* |
|||
***************************************************************************** |
|||
** |
|||
|
|||
** File : LinkerScript.ld |
|||
** |
|||
** Abstract : Linker script for STM32F401RETx Device with |
|||
** 512KByte FLASH, 96KByte RAM |
|||
** |
|||
** Set heap size, stack size and stack location according |
|||
** to application requirements. |
|||
** |
|||
** Set memory bank area and size if external memory is used. |
|||
** |
|||
** Target : STMicroelectronics STM32 |
|||
** |
|||
** |
|||
** Distribution: The file is distributed as is, without any warranty |
|||
** of any kind. |
|||
** |
|||
***************************************************************************** |
|||
** @attention |
|||
** |
|||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2> |
|||
** |
|||
** Redistribution and use in source and binary forms, with or without modification, |
|||
** are permitted provided that the following conditions are met: |
|||
** 1. Redistributions of source code must retain the above copyright notice, |
|||
** this list of conditions and the following disclaimer. |
|||
** 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
** this list of conditions and the following disclaimer in the documentation |
|||
** and/or other materials provided with the distribution. |
|||
** 3. Neither the name of Ac6 nor the names of its contributors |
|||
** may be used to endorse or promote products derived from this software |
|||
** without specific prior written permission. |
|||
** |
|||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
** |
|||
***************************************************************************** |
|||
*/ |
|||
|
|||
/* Entry Point */ |
|||
ENTRY(Reset_Handler) |
|||
|
|||
/* Highest address of the user mode stack */ |
|||
_estack = 0x20010000; /* end of RAM */ |
|||
|
|||
/* Generate a link error if heap and stack don't fit into RAM */ |
|||
_Min_Heap_Size = 0x200;; /* required amount of heap */ |
|||
_Min_Stack_Size = 0x400;; /* required amount of stack */ |
|||
|
|||
/* Specify the memory areas */ |
|||
MEMORY |
|||
{ |
|||
FLASH (rx) : ORIGIN = 0x800C000, LENGTH = 256K |
|||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K |
|||
} |
|||
|
|||
/* Define output sections */ |
|||
SECTIONS |
|||
{ |
|||
/* The startup code goes first into FLASH */ |
|||
.isr_vector : |
|||
{ |
|||
. = ALIGN(4); |
|||
KEEP(*(.isr_vector)) /* Startup code */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* The program code and other data goes into FLASH */ |
|||
.text ALIGN(4): |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.text) /* .text sections (code) */ |
|||
*(.text*) /* .text* sections (code) */ |
|||
*(.glue_7) /* glue arm to thumb code */ |
|||
*(.glue_7t) /* glue thumb to arm code */ |
|||
*(.eh_frame) |
|||
|
|||
KEEP (*(.init)) |
|||
KEEP (*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; /* define a global symbols at end of code */ |
|||
} >FLASH |
|||
|
|||
/* Constant data goes into FLASH */ |
|||
.rodata : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
|||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH |
|||
.ARM : { |
|||
__exidx_start = .; |
|||
*(.ARM.exidx*) |
|||
__exidx_end = .; |
|||
} >FLASH |
|||
|
|||
.preinit_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__preinit_array_start = .); |
|||
KEEP (*(.preinit_array*)) |
|||
PROVIDE_HIDDEN (__preinit_array_end = .); |
|||
} >FLASH |
|||
.init_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__init_array_start = .); |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array*)) |
|||
PROVIDE_HIDDEN (__init_array_end = .); |
|||
} >FLASH |
|||
.fini_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__fini_array_start = .); |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
KEEP (*(.fini_array*)) |
|||
PROVIDE_HIDDEN (__fini_array_end = .); |
|||
} >FLASH |
|||
|
|||
/* used by the startup to initialize data */ |
|||
_sidata = LOADADDR(.data); |
|||
|
|||
/* Initialized data sections goes into RAM, load LMA copy after code */ |
|||
.data : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sdata = .; /* create a global symbol at data start */ |
|||
*(.data) /* .data sections */ |
|||
*(.data*) /* .data* sections */ |
|||
|
|||
. = ALIGN(4); |
|||
_edata = .; /* define a global symbol at data end */ |
|||
} >RAM AT> FLASH |
|||
|
|||
|
|||
/* Uninitialized data section */ |
|||
. = ALIGN(4); |
|||
.bss : |
|||
{ |
|||
/* This is used by the startup in order to initialize the .bss secion */ |
|||
_sbss = .; /* define a global symbol at bss start */ |
|||
__bss_start__ = _sbss; |
|||
*(.bss) |
|||
*(.bss*) |
|||
*(COMMON) |
|||
|
|||
. = ALIGN(4); |
|||
_ebss = .; /* define a global symbol at bss end */ |
|||
__bss_end__ = _ebss; |
|||
} >RAM |
|||
|
|||
/* User_heap_stack section, used to check that there is enough RAM left */ |
|||
._user_heap_stack : |
|||
{ |
|||
. = ALIGN(8); |
|||
PROVIDE ( end = . ); |
|||
PROVIDE ( _end = . ); |
|||
. = . + _Min_Heap_Size; |
|||
. = . + _Min_Stack_Size; |
|||
. = ALIGN(8); |
|||
} >RAM |
|||
|
|||
|
|||
|
|||
/* Remove information from the standard libraries */ |
|||
/DISCARD/ : |
|||
{ |
|||
libc.a ( * ) |
|||
libm.a ( * ) |
|||
libgcc.a ( * ) |
|||
} |
|||
|
|||
.ARM.attributes 0 : { *(.ARM.attributes) } |
|||
} |
|||
@ -0,0 +1,238 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#include "pins_arduino.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
// Digital PinName array
|
|||
const PinName digitalPin[] = { |
|||
PA_0, // Digital pin 0
|
|||
PA_1, // Digital pin 1
|
|||
PA_2, // Digital pin 2
|
|||
PA_3, // Digital pin 3
|
|||
PA_4, // Digital pin 4
|
|||
PA_5, // Digital pin 5
|
|||
PA_6, // Digital pin 6
|
|||
PA_7, // Digital pin 7
|
|||
PA_8, // Digital pin 8
|
|||
PA_9, // Digital pin 9
|
|||
PA_10, // Digital pin 10
|
|||
PA_11, // Digital pin 11
|
|||
PA_12, // Digital pin 12
|
|||
PA_13, // Digital pin 13
|
|||
PA_14, // Digital pin 14
|
|||
PA_15, // Digital pin 15
|
|||
|
|||
PB_0, // Digital pin 16
|
|||
PB_1, // Digital pin 17
|
|||
PB_2, // Digital pin 18
|
|||
PB_3, // Digital pin 19
|
|||
PB_4, // Digital pin 20
|
|||
PB_5, // Digital pin 21
|
|||
PB_6, // Digital pin 22
|
|||
PB_7, // Digital pin 23
|
|||
PB_8, // Digital pin 24
|
|||
PB_9, // Digital pin 25
|
|||
PB_10, // Digital pin 26
|
|||
PB_12, // Digital pin 27
|
|||
PB_13, // Digital pin 28
|
|||
PB_14, // Digital pin 29
|
|||
PB_15, // Digital pin 30
|
|||
|
|||
PC_0, // Digital pin 31
|
|||
PC_1, // Digital pin 32
|
|||
PC_2, // Digital pin 33
|
|||
PC_3, // Digital pin 34
|
|||
PC_4, // Digital pin 35
|
|||
PC_5, // Digital pin 36
|
|||
PC_6, // Digital pin 37
|
|||
PC_7, // Digital pin 38
|
|||
PC_8, // Digital pin 39
|
|||
PC_9, // Digital pin 40
|
|||
PC_10, // Digital pin 41
|
|||
PC_11, // Digital pin 42
|
|||
PC_12, // Digital pin 43
|
|||
PC_13, // Digital pin 44
|
|||
PC_14, // Digital pin 45
|
|||
PC_15, // Digital pin 46
|
|||
|
|||
PD_2, // Digital pin 47
|
|||
|
|||
PH_0, // Digital pin 48, used by the external oscillator
|
|||
PH_1 // Digital pin 49, used by the external oscillator
|
|||
}; |
|||
|
|||
// Analog (Ax) pin number array
|
|||
const uint32_t analogInputPin[] = { |
|||
0, // A0, PA0
|
|||
1, // A1, PA1
|
|||
2, // A2, PA2
|
|||
3, // A3, PA3
|
|||
4, // A4, PA4
|
|||
5, // A5, PA5
|
|||
6, // A6, PA6
|
|||
7, // A7, PA7
|
|||
16, // A8, PB0
|
|||
17, // A9, PB1
|
|||
31, // A10, PC0
|
|||
32, // A11, PC1
|
|||
33, // A12, PC2
|
|||
34, // A13, PC3
|
|||
35, // A14, PC4
|
|||
36 // A15, PC5
|
|||
}; |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
// ----------------------------------------------------------------------------
|
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/*
|
|||
* @brief Configures the System clock source, PLL Multiplier and Divider factors, |
|||
* AHB/APBx prescalers and Flash settings |
|||
* @note This function should be called only once the RCC clock configuration |
|||
* is reset to the default reset state (done in SystemInit() function). |
|||
* @param None |
|||
* @retval None |
|||
*/ |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSE) used as System clock source */ |
|||
/******************************************************************************/ |
|||
static uint8_t SetSysClock_PLL_HSE(uint8_t bypass) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct; |
|||
|
|||
/* The voltage scaling allows optimizing the power consumption when the device is
|
|||
clocked below the maximum system frequency, to update the voltage scaling value |
|||
regarding system frequency refer to product datasheet. */ |
|||
__HAL_RCC_PWR_CLK_ENABLE(); |
|||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); |
|||
|
|||
// Enable HSE oscillator and activate PLL with HSE as source
|
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
|||
if (bypass == 0) { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|||
} else { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|||
} |
|||
|
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
|||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not
|
|||
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
|||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
|
|||
RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
|
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
|||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz
|
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz
|
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz
|
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Output clock on MCO1 pin(PA8) for debugging purpose */ |
|||
/*
|
|||
if (bypass == 0) |
|||
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
|
|||
else |
|||
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
|
|||
*/ |
|||
|
|||
return 1; // OK
|
|||
} |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSI) used as System clock source */ |
|||
/******************************************************************************/ |
|||
uint8_t SetSysClock_PLL_HSI(void) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct; |
|||
|
|||
/* The voltage scaling allows optimizing the power consumption when the device is
|
|||
clocked below the maximum system frequency, to update the voltage scaling value |
|||
regarding system frequency refer to product datasheet. */ |
|||
__HAL_RCC_PWR_CLK_ENABLE(); |
|||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); |
|||
|
|||
// Enable HSI oscillator and activate PLL with HSI as source
|
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; |
|||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
|||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
|||
RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16)
|
|||
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
|||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
|
|||
RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> freq is ok but not precise enough
|
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
|||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz
|
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz
|
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz
|
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Output clock on MCO1 pin(PA8) for debugging purpose */ |
|||
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
|||
|
|||
return 1; // OK
|
|||
} |
|||
|
|||
WEAK void SystemClock_Config(void) |
|||
{ |
|||
/* 1- If fail try to start with HSE and external xtal */ |
|||
if (SetSysClock_PLL_HSE(0) == 0) { |
|||
/* 2- Try to start with HSE and external clock */ |
|||
if (SetSysClock_PLL_HSE(1) == 0) { |
|||
/* 3- If fail start with HSI clock */ |
|||
if (SetSysClock_PLL_HSI() == 0) { |
|||
Error_Handler(); |
|||
} |
|||
} |
|||
} |
|||
/* Output clock on MCO2 pin(PC9) for debugging purpose */ |
|||
//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
|
|||
} |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,151 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#ifndef _VARIANT_ARDUINO_STM32_ |
|||
#define _VARIANT_ARDUINO_STM32_ |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif // __cplusplus
|
|||
|
|||
|
|||
// | DIGITAL | ANALOG | USART | TWI | SPI | SPECIAL |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
#define PA0 A0 // | 0 | A0 | | | | |
|
|||
#define PA1 A1 // | 1 | A1 | | | | |
|
|||
#define PA2 A2 // | 2 | A2 | USART2_TX | | | |
|
|||
#define PA3 A3 // | 3 | A3 | USART2_RX | | | |
|
|||
#define PA4 A4 // | 4 | A4 | | | SPI1_SS, (SPI3_SS) | |
|
|||
#define PA5 A5 // | 5 | A5 | | | SPI1_SCK | |
|
|||
#define PA6 A6 // | 6 | A6 | | | SPI1_MISO | |
|
|||
#define PA7 A7 // | 7 | A7 | | | SPI1_MOSI | |
|
|||
#define PA8 8 // | 8 | | | TWI3_SCL | | |
|
|||
#define PA9 9 // | 9 | | USART1_TX | | | |
|
|||
#define PA10 10 // | 10 | | USART1_RX | | | |
|
|||
#define PA11 11 // | 11 | | USART6_TX | | | |
|
|||
#define PA12 12 // | 12 | | USART6_RX | | | |
|
|||
#define PA13 13 // | 13 | | | | | SWD_SWDIO |
|
|||
#define PA14 14 // | 14 | | | | | SWD_SWCLK |
|
|||
#define PA15 15 // | 15 | | | | SPI3_SS, (SPI1_SS) | |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
#define PB0 A8 // | 16 | A8 | | | | |
|
|||
#define PB1 A9 // | 17 | A9 | | | | |
|
|||
#define PB2 18 // | 18 | | | | | BOOT1 |
|
|||
#define PB3 19 // | 19 | | | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | |
|
|||
#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | |
|
|||
#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | |
|
|||
#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | |
|
|||
#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | |
|
|||
#define PB8 24 // | 24 | | | TWI1_SCL | | |
|
|||
#define PB9 25 // | 25 | | | TWI1_SDA | SPI2_SS | |
|
|||
#define PB10 26 // | 26 | | | TWI2_SCL | SPI2_SCK | |
|
|||
#define PB12 27 // | 27 | | | | SPI2_SS | |
|
|||
#define PB13 28 // | 28 | | | | SPI2_SCK | |
|
|||
#define PB14 29 // | 29 | | | | SPI2_MISO | |
|
|||
#define PB15 30 // | 30 | | | | SPI2_MOSI | |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
#define PC0 A10 // | 31 | A10 | | | | |
|
|||
#define PC1 A11 // | 32 | A11 | | | | |
|
|||
#define PC2 A12 // | 33 | A12 | | | SPI2_MISO | |
|
|||
#define PC3 A13 // | 34 | A13 | | | SPI2_MOSI | |
|
|||
#define PC4 A14 // | 35 | A14 | | | | |
|
|||
#define PC5 A15 // | 36 | A15 | | | | |
|
|||
#define PC6 37 // | 37 | | USART6_TX | | | |
|
|||
#define PC7 38 // | 38 | | USART6_RX | | | |
|
|||
#define PC8 39 // | 39 | | | | | |
|
|||
#define PC9 40 // | 40 | | | TWI3_SDA | | |
|
|||
#define PC10 41 // | 41 | | | | SPI3_SCK | |
|
|||
#define PC11 42 // | 42 | | | | SPI3_MISO | |
|
|||
#define PC12 43 // | 43 | | | | SPI3_MOSI | |
|
|||
#define PC13 44 // | 44 | | | | | |
|
|||
#define PC14 45 // | 45 | | | | | OSC32_IN |
|
|||
#define PC15 46 // | 46 | | | | | OSC32_OUT |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
#define PD2 47 // | 47 | | | | | |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
#define PH0 48 // | 48 | | | | | OSC_IN |
|
|||
#define PH1 49 // | 49 | | | | | OSC_OUT |
|
|||
// |---------|--------|-----------|----------|------------------------|-----------|
|
|||
|
|||
// This must be a literal
|
|||
#define NUM_DIGITAL_PINS 50 |
|||
#define NUM_ANALOG_INPUTS 16 |
|||
|
|||
// SPI definitions
|
|||
#define PIN_SPI_SS PA4 |
|||
#define PIN_SPI_SS1 PA4 |
|||
#define PIN_SPI_MOSI PA7 |
|||
#define PIN_SPI_MISO PA6 |
|||
#define PIN_SPI_SCK PA5 |
|||
|
|||
|
|||
// Timer Definitions
|
|||
#define TIMER_TONE TIM2 |
|||
#define TIMER_SERVO TIM5 |
|||
#define TIMER_SERIAL TIM11 |
|||
|
|||
// UART Definitions
|
|||
//#define ENABLE_HWSERIAL1 done automatically by the #define SERIAL_UART_INSTANCE below
|
|||
#define ENABLE_HWSERIAL2 |
|||
|
|||
|
|||
// Define here Serial instance number to map on Serial generic name (if not already used by SerialUSB)
|
|||
#define SERIAL_UART_INSTANCE 1 //1 for Serial = Serial1 (USART1)
|
|||
|
|||
// Default pin used for 'Serial' instance
|
|||
// Mandatory for Firmata
|
|||
#define PIN_SERIAL_RX PA10 |
|||
#define PIN_SERIAL_TX PA9 |
|||
|
|||
// Used when user instanciate a hardware Serial using its peripheral name.
|
|||
// Example: HardwareSerial mySerial(USART3);
|
|||
// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
|
|||
#define PIN_SERIAL1_RX PA10 |
|||
#define PIN_SERIAL1_TX PA9 |
|||
#define PIN_SERIAL2_RX PA3 |
|||
#define PIN_SERIAL2_TX PA2 |
|||
|
|||
#ifdef __cplusplus |
|||
} // extern "C"
|
|||
#endif |
|||
/*----------------------------------------------------------------------------
|
|||
* Arduino objects - C++ only |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
#ifdef __cplusplus |
|||
// These serial port names are intended to allow libraries and architecture-neutral
|
|||
// sketches to automatically default to the correct port name for a particular type
|
|||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
|||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
|||
//
|
|||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
|||
//
|
|||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
|||
//
|
|||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
|||
// pins are NOT connected to anything by default.
|
|||
#define SERIAL_PORT_MONITOR Serial |
|||
#define SERIAL_PORT_HARDWARE Serial1 |
|||
#define SERIAL_PORT_HARDWARE_OPEN Serial2 |
|||
#endif |
|||
|
|||
#endif /* _VARIANT_ARDUINO_STM32_ */ |
|||
@ -0,0 +1,425 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2020, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
* Automatically generated from STM32F103V(F-G)Tx.xml |
|||
*/ |
|||
#include "Arduino.h" |
|||
#include "PeripheralPins.h" |
|||
|
|||
/* =====
|
|||
* Note: Commented lines are alternative possibilities which are not used per default. |
|||
* If you change them, you will have to know what you do |
|||
* ===== |
|||
*/ |
|||
|
|||
//*** ADC ***
|
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_ADC[] = { |
|||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
|||
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
|
|||
#endif |
|||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
|||
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
|||
#endif |
|||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
|||
// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
|||
#endif |
|||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
|||
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
|||
#endif |
|||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
|||
// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
|
|||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
|||
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
|
|||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
|||
// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
|
|||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
|||
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
|
|||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
|||
// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
|
|||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
|||
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
|
|||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
|||
// {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
|
|||
#endif |
|||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
|||
// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
|
|||
#endif |
|||
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
|||
// {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
|
|||
#endif |
|||
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
|||
// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
|
|||
#endif |
|||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
|||
// {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
|
|||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
|||
// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** DAC ***
|
|||
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_DAC[] = { |
|||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
|
|||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
#endif |
|||
|
|||
//*** I2C ***
|
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SDA[] = { |
|||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, |
|||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SCL[] = { |
|||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, |
|||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** PWM ***
|
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_PWM[] = { |
|||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
|
|||
// {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1
|
|||
#endif |
|||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2
|
|||
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2
|
|||
#endif |
|||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
|
|||
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3
|
|||
#endif |
|||
#ifdef STM32F103xG |
|||
// {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1
|
|||
#endif |
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
|
|||
{PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4
|
|||
#else |
|||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
|
|||
#endif |
|||
#if defined(STM32F103xG) |
|||
// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
|
|||
#endif |
|||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
|
|||
#if defined(STM32F103xG) |
|||
// {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
|
|||
#endif |
|||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
|
|||
// {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
|
|||
// {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N
|
|||
#if defined(STM32F103xG) |
|||
// {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
|
|||
#endif |
|||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
|
|||
// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
|
|||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2
|
|||
// {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
|
|||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3
|
|||
// {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
|
|||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4
|
|||
// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
|
|||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
|
|||
// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
|
|||
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
|
|||
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3
|
|||
// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N
|
|||
#endif |
|||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N
|
|||
#endif |
|||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
|
|||
// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
|
|||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
|
|||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
|
|||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
|
|||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
|
|||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
|
|||
#if defined(STM32F103xG) |
|||
// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
|
|||
#endif |
|||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
|
|||
#if defined(STM32F103xG) |
|||
// {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
|
|||
#endif |
|||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
|
|||
// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
|
|||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
|
|||
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
|
|||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
|
|||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
|
|||
#if defined(STM32F103xG) |
|||
// {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
|
|||
#endif |
|||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
|
|||
#if defined(STM32F103xG) |
|||
// {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
|
|||
#endif |
|||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1
|
|||
#endif |
|||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2
|
|||
#endif |
|||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3
|
|||
// {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3
|
|||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4
|
|||
#endif |
|||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1
|
|||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2
|
|||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3
|
|||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4
|
|||
#if defined(STM32F103xG) |
|||
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1
|
|||
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2
|
|||
#endif |
|||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N
|
|||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1
|
|||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N
|
|||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2
|
|||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N
|
|||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3
|
|||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SERIAL ***
|
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_TX[] = { |
|||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, |
|||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, |
|||
#endif |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#endif |
|||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RX[] = { |
|||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, |
|||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, |
|||
#endif |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
#endif |
|||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RTS[] = { |
|||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_CTS[] = { |
|||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SPI ***
|
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MOSI[] = { |
|||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, |
|||
#endif |
|||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MISO[] = { |
|||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, |
|||
#endif |
|||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SCLK[] = { |
|||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, |
|||
#endif |
|||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SSEL[] = { |
|||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
#else |
|||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, |
|||
#endif |
|||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** CAN ***
|
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_RD[] = { |
|||
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, |
|||
{PD_0, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_TD[] = { |
|||
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, |
|||
{PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No ETHERNET ***
|
|||
|
|||
//*** No QUADSPI ***
|
|||
|
|||
//*** USB ***
|
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_USB[] = { |
|||
{PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
|
|||
{PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No USB_OTG_FS ***
|
|||
|
|||
//*** No USB_OTG_HS ***
|
|||
|
|||
//*** SD ***
|
|||
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SD[] = { |
|||
{PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4
|
|||
{PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5
|
|||
{PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6
|
|||
{PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7
|
|||
{PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0
|
|||
{PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1
|
|||
{PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2
|
|||
{PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3
|
|||
{PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK
|
|||
{PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
#endif |
|||
@ -0,0 +1,30 @@ |
|||
/* SYS_WKUP */ |
|||
#ifdef PWR_WAKEUP_PIN1 |
|||
SYS_WKUP1 = PA_0, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN2 |
|||
SYS_WKUP2 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN3 |
|||
SYS_WKUP3 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN4 |
|||
SYS_WKUP4 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN5 |
|||
SYS_WKUP5 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN6 |
|||
SYS_WKUP6 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN7 |
|||
SYS_WKUP7 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN8 |
|||
SYS_WKUP8 = NC, |
|||
#endif |
|||
/* USB */ |
|||
#ifdef USBCON |
|||
USB_DM = PA_11, |
|||
USB_DP = PA_12, |
|||
#endif |
|||
@ -0,0 +1,200 @@ |
|||
/* |
|||
****************************************************************************** |
|||
** |
|||
|
|||
** File : LinkerScript.ld |
|||
** |
|||
** Author : Auto-generated by STM32CubeIDE |
|||
** |
|||
** Abstract : Linker script for STM32F103V(8/B/C/E/F/GTx Device from STM32F1 series |
|||
** 64/128/256/512/768/1024Kbytes FLASH |
|||
** 20/20/48/64/64/96/96Kbytes RAM |
|||
** |
|||
** Set heap size, stack size and stack location according |
|||
** to application requirements. |
|||
** |
|||
** Set memory bank area and size if external memory is used. |
|||
** |
|||
** Target : STMicroelectronics STM32 |
|||
** |
|||
** Distribution: The file is distributed as is without any warranty |
|||
** of any kind. |
|||
** |
|||
***************************************************************************** |
|||
** @attention |
|||
** |
|||
** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> |
|||
** |
|||
** Redistribution and use in source and binary forms, with or without modification, |
|||
** are permitted provided that the following conditions are met: |
|||
** 1. Redistributions of source code must retain the above copyright notice, |
|||
** this list of conditions and the following disclaimer. |
|||
** 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
** this list of conditions and the following disclaimer in the documentation |
|||
** and/or other materials provided with the distribution. |
|||
** 3. Neither the name of STMicroelectronics nor the names of its contributors |
|||
** may be used to endorse or promote products derived from this software |
|||
** without specific prior written permission. |
|||
** |
|||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
** |
|||
***************************************************************************** |
|||
*/ |
|||
|
|||
/* Entry Point */ |
|||
ENTRY(Reset_Handler) |
|||
|
|||
/* Highest address of the user mode stack */ |
|||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */ |
|||
_Min_Heap_Size = 0x200; /* required amount of heap */ |
|||
_Min_Stack_Size = 0x400; /* required amount of stack */ |
|||
|
|||
/* Memories definition */ |
|||
MEMORY |
|||
{ |
|||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE |
|||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET |
|||
} |
|||
|
|||
/* Sections */ |
|||
SECTIONS |
|||
{ |
|||
/* The startup code into "FLASH" Rom type memory */ |
|||
.isr_vector : |
|||
{ |
|||
. = ALIGN(4); |
|||
KEEP(*(.isr_vector)) /* Startup code */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* The program code and other data into "FLASH" Rom type memory */ |
|||
.text : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.text) /* .text sections (code) */ |
|||
*(.text*) /* .text* sections (code) */ |
|||
*(.glue_7) /* glue arm to thumb code */ |
|||
*(.glue_7t) /* glue thumb to arm code */ |
|||
*(.eh_frame) |
|||
|
|||
KEEP (*(.init)) |
|||
KEEP (*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; /* define a global symbols at end of code */ |
|||
} >FLASH |
|||
|
|||
/* Constant data into "FLASH" Rom type memory */ |
|||
.rodata : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
|||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.ARM.extab : { |
|||
. = ALIGN(4); |
|||
*(.ARM.extab* .gnu.linkonce.armextab.*) |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.ARM : { |
|||
. = ALIGN(4); |
|||
__exidx_start = .; |
|||
*(.ARM.exidx*) |
|||
__exidx_end = .; |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.preinit_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__preinit_array_start = .); |
|||
KEEP (*(.preinit_array*)) |
|||
PROVIDE_HIDDEN (__preinit_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.init_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__init_array_start = .); |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array*)) |
|||
PROVIDE_HIDDEN (__init_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.fini_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__fini_array_start = .); |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
KEEP (*(.fini_array*)) |
|||
PROVIDE_HIDDEN (__fini_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* Used by the startup to initialize data */ |
|||
_sidata = LOADADDR(.data); |
|||
|
|||
/* Initialized data sections into "RAM" Ram type memory */ |
|||
.data : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sdata = .; /* create a global symbol at data start */ |
|||
*(.data) /* .data sections */ |
|||
*(.data*) /* .data* sections */ |
|||
|
|||
. = ALIGN(4); |
|||
_edata = .; /* define a global symbol at data end */ |
|||
} >RAM AT> FLASH |
|||
|
|||
|
|||
/* Uninitialized data section into "RAM" Ram type memory */ |
|||
. = ALIGN(4); |
|||
.bss : |
|||
{ |
|||
/* This is used by the startup in order to initialize the .bss secion */ |
|||
_sbss = .; /* define a global symbol at bss start */ |
|||
__bss_start__ = _sbss; |
|||
*(.bss) |
|||
*(.bss*) |
|||
*(COMMON) |
|||
|
|||
. = ALIGN(4); |
|||
_ebss = .; /* define a global symbol at bss end */ |
|||
__bss_end__ = _ebss; |
|||
} >RAM |
|||
|
|||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ |
|||
._user_heap_stack : |
|||
{ |
|||
. = ALIGN(8); |
|||
PROVIDE ( end = . ); |
|||
PROVIDE ( _end = . ); |
|||
. = . + _Min_Heap_Size; |
|||
. = . + _Min_Stack_Size; |
|||
. = ALIGN(8); |
|||
} >RAM |
|||
|
|||
|
|||
|
|||
/* Remove information from the compiler libraries */ |
|||
/DISCARD/ : |
|||
{ |
|||
libc.a ( * ) |
|||
libm.a ( * ) |
|||
libgcc.a ( * ) |
|||
} |
|||
|
|||
.ARM.attributes 0 : { *(.ARM.attributes) } |
|||
} |
|||
|
|||
@ -0,0 +1,235 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
*/ |
|||
|
|||
#include "pins_arduino.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
// Digital PinName array
|
|||
const PinName digitalPin[] = { |
|||
PA_0, //D0
|
|||
PA_1, //D1
|
|||
PA_2, //D2
|
|||
PA_3, //D3
|
|||
PA_4, //D4
|
|||
PA_5, //D5
|
|||
PA_6, //D6
|
|||
PA_7, //D7
|
|||
PA_8, //D8
|
|||
PA_9, //D9
|
|||
PA_10, //D10
|
|||
PA_11, //D11
|
|||
PA_12, //D12
|
|||
PA_13, //D13
|
|||
PA_14, //D14
|
|||
PA_15, //D15
|
|||
|
|||
PB_0, //D16
|
|||
PB_1, //D17
|
|||
PB_2, //D18
|
|||
PB_3, //D19
|
|||
PB_4, //D20
|
|||
PB_5, //D21
|
|||
PB_6, //D22
|
|||
PB_7, //D23
|
|||
PB_8, //D24
|
|||
PB_9, //D25
|
|||
PB_10, //D26
|
|||
PB_11, //D27
|
|||
PB_12, //D28
|
|||
PB_13, //D29
|
|||
PB_14, //D30
|
|||
PB_15, //D31
|
|||
|
|||
PC_0, //D32
|
|||
PC_1, //D33
|
|||
PC_2, //D34
|
|||
PC_3, //D35
|
|||
PC_4, //D36
|
|||
PC_5, //D37
|
|||
PC_6, //D38
|
|||
PC_7, //D39
|
|||
PC_8, //D40
|
|||
PC_9, //D41
|
|||
PC_10, //D42
|
|||
PC_11, //D43
|
|||
PC_12, //D44
|
|||
PC_13, //D45
|
|||
PC_14, //D46
|
|||
PC_15, //D47
|
|||
|
|||
PD_0, //D48
|
|||
PD_1, //D49
|
|||
PD_2, //D50
|
|||
PD_3, //D51
|
|||
PD_4, //D52
|
|||
PD_5, //D53
|
|||
PD_6, //D54
|
|||
PD_7, //D55
|
|||
PD_8, //D56
|
|||
PD_9, //D57
|
|||
PD_10, //D58
|
|||
PD_11, //D59
|
|||
PD_12, //D60
|
|||
PD_13, //D61
|
|||
PD_14, //D62
|
|||
PD_15, //D63
|
|||
|
|||
PE_0, //D64
|
|||
PE_1, //D65
|
|||
PE_2, //D66
|
|||
PE_3, //D67
|
|||
PE_4, //D68
|
|||
PE_5, //D69
|
|||
PE_6, //D70
|
|||
PE_7, //D71
|
|||
PE_8, //D72
|
|||
PE_9, //D73
|
|||
PE_10, //D74
|
|||
PE_11, //D75
|
|||
PE_12, //D76
|
|||
PE_13, //D77
|
|||
PE_14, //D78
|
|||
PE_15, //D79
|
|||
}; |
|||
|
|||
// Analog (Ax) pin number array
|
|||
const uint32_t analogInputPin[] = { |
|||
0, // A0, PA0
|
|||
1, // A1, PA1
|
|||
2, // A2, PA2
|
|||
3, // A3, PA3
|
|||
4, // A4, PA4
|
|||
5, // A5, PA5
|
|||
6, // A6, PA6
|
|||
7, // A7, PA7
|
|||
16, // A8, PB0
|
|||
17, // A9, PB1
|
|||
32, // A10, PC0
|
|||
33, // A11, PC1
|
|||
34, // A12, PC2
|
|||
35, // A13, PC3
|
|||
36, // A14, PC4
|
|||
37, // A15, PC5
|
|||
}; |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSE) used as System clock source */ |
|||
/******************************************************************************/ |
|||
static bool SetSysClock_PLL_HSE(bool bypass) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
|||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; |
|||
bool ret = false; |
|||
|
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
|||
if (bypass == false) { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
|||
} else { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; |
|||
} |
|||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; |
|||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
|||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; |
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { |
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
|||
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; |
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
|||
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) { |
|||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; |
|||
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; |
|||
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; |
|||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { |
|||
ret = true; |
|||
} |
|||
} |
|||
} |
|||
return ret; |
|||
} |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSI) used as System clock source */ |
|||
/******************************************************************************/ |
|||
bool SetSysClock_PLL_HSI(void) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
|||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; |
|||
bool ret = false; |
|||
|
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; |
|||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
|||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; |
|||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; |
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { |
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
|||
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; |
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
|||
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) { |
|||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; |
|||
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; |
|||
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; |
|||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { |
|||
ret = true; |
|||
} |
|||
} |
|||
} |
|||
return ret; |
|||
} |
|||
|
|||
WEAK void SystemClock_Config(void) |
|||
{ |
|||
/*
|
|||
* If HSE_VALUE is not 8MHz and you want use it, then: |
|||
* - Redefine HSE_VALUE to the correct HSE_VALUE |
|||
* - Redefine SystemClock_Config() with the correct settings |
|||
*/ |
|||
#if HSE_VALUE == 8000000U |
|||
/* 1- Try to start with HSE and external 8MHz xtal */ |
|||
if (SetSysClock_PLL_HSE(false) == false) { |
|||
/* 2- If fail try to start with HSE and external clock */ |
|||
if (SetSysClock_PLL_HSE(true) == false) { |
|||
#endif |
|||
/* 3- If fail start with HSI clock */ |
|||
if (SetSysClock_PLL_HSI() == false) { |
|||
Error_Handler(); |
|||
} |
|||
#if HSE_VALUE == 8000000U |
|||
} |
|||
} |
|||
#endif |
|||
} |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,181 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
*/ |
|||
|
|||
#ifndef _VARIANT_ARDUINO_STM32_ |
|||
#define _VARIANT_ARDUINO_STM32_ |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif // __cplusplus
|
|||
|
|||
/*----------------------------------------------------------------------------
|
|||
* Pins |
|||
*----------------------------------------------------------------------------*/ |
|||
#define PA0 0 |
|||
#define PA1 1 |
|||
#define PA2 2 |
|||
#define PA3 3 |
|||
#define PA4 4 |
|||
#define PA5 5 |
|||
#define PA6 6 |
|||
#define PA7 7 |
|||
#define PA8 8 |
|||
#define PA9 9 |
|||
#define PA10 10 |
|||
#define PA11 11 |
|||
#define PA12 12 |
|||
#define PA13 13 |
|||
#define PA14 14 |
|||
#define PA15 15 |
|||
|
|||
#define PB0 16 |
|||
#define PB1 17 |
|||
#define PB2 18 |
|||
#define PB3 19 |
|||
#define PB4 20 |
|||
#define PB5 21 |
|||
#define PB6 22 |
|||
#define PB7 23 |
|||
#define PB8 24 |
|||
#define PB9 25 |
|||
#define PB10 26 |
|||
#define PB11 27 |
|||
#define PB12 28 |
|||
#define PB13 29 |
|||
#define PB14 30 |
|||
#define PB15 31 |
|||
|
|||
#define PC0 32 |
|||
#define PC1 33 |
|||
#define PC2 34 |
|||
#define PC3 35 |
|||
#define PC4 36 |
|||
#define PC5 37 |
|||
#define PC6 38 |
|||
#define PC7 39 |
|||
#define PC8 40 |
|||
#define PC9 41 |
|||
#define PC10 42 |
|||
#define PC11 43 |
|||
#define PC12 44 |
|||
#define PC13 45 |
|||
#define PC14 46 |
|||
#define PC15 47 |
|||
|
|||
#define PD0 48 |
|||
#define PD1 49 |
|||
#define PD2 50 |
|||
#define PD3 51 |
|||
#define PD4 52 |
|||
#define PD5 53 |
|||
#define PD6 54 |
|||
#define PD7 55 |
|||
#define PD8 56 |
|||
#define PD9 57 |
|||
#define PD10 58 |
|||
#define PD11 59 |
|||
#define PD12 60 |
|||
#define PD13 61 |
|||
#define PD14 62 |
|||
#define PD15 63 |
|||
|
|||
#define PE0 64 |
|||
#define PE1 65 |
|||
#define PE2 66 |
|||
#define PE3 67 |
|||
#define PE4 68 |
|||
#define PE5 69 |
|||
#define PE6 70 |
|||
#define PE7 71 |
|||
#define PE8 72 |
|||
#define PE9 73 |
|||
#define PE10 74 |
|||
#define PE11 75 |
|||
#define PE12 76 |
|||
#define PE13 77 |
|||
#define PE14 78 |
|||
#define PE15 79 |
|||
|
|||
// This must be a literal
|
|||
#define NUM_DIGITAL_PINS 80 |
|||
#define NUM_ANALOG_INPUTS 16 |
|||
|
|||
// On-board LED pin number
|
|||
#ifndef LED_BUILTIN |
|||
#define LED_BUILTIN PB11 |
|||
#endif |
|||
|
|||
// On-board user button
|
|||
#ifndef USER_BTN |
|||
#define USER_BTN PC13 |
|||
#endif |
|||
|
|||
// SPI Definitions
|
|||
#define PIN_SPI_SS PC4 |
|||
#define PIN_SPI_MOSI PA7 |
|||
#define PIN_SPI_MISO PA6 |
|||
#define PIN_SPI_SCK PA5 |
|||
|
|||
// I2C Definitions
|
|||
#define PIN_WIRE_SDA PB7 |
|||
#define PIN_WIRE_SCL PB6 |
|||
|
|||
// Timer Definitions (optional)
|
|||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
|||
#define TIMER_TONE TIM3 |
|||
#define TIMER_SERVO TIM2 |
|||
|
|||
// UART Definitions
|
|||
// Define here Serial instance number to map on Serial generic name
|
|||
#define SERIAL_UART_INSTANCE 1 |
|||
|
|||
// Extra HAL modules
|
|||
#if defined(STM32F103xE) || defined(STM32F103xG) |
|||
#define HAL_DAC_MODULE_ENABLED |
|||
#define HAL_SD_MODULE_ENABLED |
|||
#define HAL_SRAM_MODULE_ENABLED |
|||
#endif |
|||
|
|||
// Default pin used for 'Serial' instance (ex: ST-Link)
|
|||
// Mandatory for Firmata
|
|||
#define PIN_SERIAL_RX PA10 |
|||
#define PIN_SERIAL_TX PA9 |
|||
|
|||
#ifdef __cplusplus |
|||
} // extern "C"
|
|||
#endif |
|||
/*----------------------------------------------------------------------------
|
|||
* Arduino objects - C++ only |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
#ifdef __cplusplus |
|||
// These serial port names are intended to allow libraries and architecture-neutral
|
|||
// sketches to automatically default to the correct port name for a particular type
|
|||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
|||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
|||
//
|
|||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
|||
//
|
|||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
|||
//
|
|||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
|||
// pins are NOT connected to anything by default.
|
|||
#define SERIAL_PORT_MONITOR Serial |
|||
#define SERIAL_PORT_HARDWARE Serial1 |
|||
#endif |
|||
|
|||
#endif /* _VARIANT_ARDUINO_STM32_ */ |
|||
@ -0,0 +1,368 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
* Automatically generated from STM32F103Z(C-D-E|F-G))Tx.xml |
|||
*/ |
|||
#include "Arduino.h" |
|||
#include "PeripheralPins.h" |
|||
|
|||
/* =====
|
|||
* Note: Commented lines are alternative possibilities which are not used per default. |
|||
* If you change them, you will have to know what you do |
|||
* ===== |
|||
*/ |
|||
|
|||
//*** ADC ***
|
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_ADC[] = { |
|||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
|||
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
|
|||
// {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
|
|||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
|||
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
|||
// {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
|||
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
|||
{PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
|
|||
// {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
|||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
|||
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
|||
// {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
|||
// {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
|||
{PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
|
|||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
|||
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
|
|||
// {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
|||
{PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
|
|||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
|||
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
|
|||
// {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
|||
{PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
|
|||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
|||
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
|
|||
// {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
|||
{PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
|
|||
// {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
|
|||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
|||
// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
|
|||
// {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
|
|||
// {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
|||
{PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
|
|||
// {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
|
|||
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
|||
// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
|
|||
// {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
|
|||
// {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
|||
{PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
|
|||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
|||
// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
|
|||
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
|
|||
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
|
|||
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
|
|||
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
|
|||
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** DAC ***
|
|||
|
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_DAC[] = { |
|||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
|
|||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** I2C ***
|
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SDA[] = { |
|||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, |
|||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_I2C_SCL[] = { |
|||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, |
|||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** PWM ***
|
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_PWM[] = { |
|||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
|
|||
// {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
|
|||
// {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1
|
|||
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2
|
|||
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
|
|||
{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2
|
|||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
|
|||
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
|
|||
// {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3
|
|||
#ifdef STM32F103xG |
|||
// {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1
|
|||
#endif |
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
|
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
|
|||
{PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4
|
|||
#ifdef STM32F103xG |
|||
// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
|
|||
#endif |
|||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
|
|||
#ifdef STM32F103xG |
|||
// {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
|
|||
#endif |
|||
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
|
|||
// {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
|
|||
{PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N
|
|||
#ifdef STM32F103xG |
|||
// {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
|
|||
#endif |
|||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
|
|||
// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
|
|||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2
|
|||
// {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
|
|||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3
|
|||
// {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
|
|||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4
|
|||
// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
|
|||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
|
|||
// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
|
|||
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
|
|||
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3
|
|||
// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
|
|||
{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N
|
|||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
|
|||
// {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N
|
|||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
|
|||
// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
|
|||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
|
|||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
|
|||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
|
|||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
|
|||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
|
|||
#ifdef STM32F103xG |
|||
// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
|
|||
#endif |
|||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
|
|||
#ifdef STM32F103xG |
|||
// {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
|
|||
#endif |
|||
// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
|
|||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
|
|||
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
|
|||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
|
|||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
|
|||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
|
|||
#ifdef STM32F103xG |
|||
// {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
|
|||
#endif |
|||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
|
|||
#ifdef STM32F103xG |
|||
// {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
|
|||
#endif |
|||
// {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
|
|||
{PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1
|
|||
// {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2
|
|||
{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2
|
|||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3
|
|||
// {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3
|
|||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4
|
|||
// {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4
|
|||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1
|
|||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2
|
|||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3
|
|||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4
|
|||
#ifdef STM32F103xG |
|||
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1
|
|||
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2
|
|||
#endif |
|||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N
|
|||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1
|
|||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N
|
|||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2
|
|||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N
|
|||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3
|
|||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4
|
|||
#ifdef STM32F103xG |
|||
{PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM10_ENABLE, 1, 0)}, // TIM10_CH1
|
|||
{PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM11_ENABLE, 1, 0)}, // TIM11_CH1
|
|||
{PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM13_ENABLE, 1, 0)}, // TIM13_CH1
|
|||
{PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM14_ENABLE, 1, 0)}, // TIM14_CH1
|
|||
#endif |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SERIAL ***
|
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_TX[] = { |
|||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, |
|||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RX[] = { |
|||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, |
|||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RTS[] = { |
|||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_CTS[] = { |
|||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
|
|||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, |
|||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SPI ***
|
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MOSI[] = { |
|||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MISO[] = { |
|||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SCLK[] = { |
|||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SSEL[] = { |
|||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
|
|||
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** CAN ***
|
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_RD[] = { |
|||
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, |
|||
{PD_0, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_TD[] = { |
|||
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, |
|||
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, |
|||
{PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No ETHERNET ***
|
|||
|
|||
//*** No QUADSPI ***
|
|||
|
|||
//*** USB ***
|
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_USB[] = { |
|||
{PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
|
|||
{PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No USB_OTG_FS ***
|
|||
|
|||
//*** No USB_OTG_HS ***
|
|||
|
|||
//*** SD ***
|
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SD[] = { |
|||
// {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4
|
|||
// {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5
|
|||
// {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6
|
|||
// {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7
|
|||
{PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0
|
|||
{PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1
|
|||
{PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2
|
|||
{PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3
|
|||
{PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK
|
|||
{PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
@ -0,0 +1,30 @@ |
|||
/* SYS_WKUP */ |
|||
#ifdef PWR_WAKEUP_PIN1 |
|||
SYS_WKUP1 = PA_0, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN2 |
|||
SYS_WKUP2 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN3 |
|||
SYS_WKUP3 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN4 |
|||
SYS_WKUP4 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN5 |
|||
SYS_WKUP5 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN6 |
|||
SYS_WKUP6 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN7 |
|||
SYS_WKUP7 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN8 |
|||
SYS_WKUP8 = NC, |
|||
#endif |
|||
/* USB */ |
|||
#ifdef USBCON |
|||
USB_DM = PA_11, |
|||
USB_DP = PA_12, |
|||
#endif |
|||
@ -0,0 +1,412 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f1xx_hal_conf_default.h |
|||
* @brief HAL default configuration file. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2017 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef __STM32F1xx_HAL_CONF_DEFAULT_H |
|||
#define __STM32F1xx_HAL_CONF_DEFAULT_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/* Exported constants --------------------------------------------------------*/ |
|||
|
|||
/* ########################## Module Selection ############################## */ |
|||
/**
|
|||
* @brief Include the default list of modules to be used in the HAL driver |
|||
* and manage module deactivation |
|||
*/ |
|||
#include "stm32yyxx_hal_conf.h" |
|||
#if 0 |
|||
/**
|
|||
* @brief This is the list of modules to be used in the HAL driver |
|||
*/ |
|||
#define HAL_MODULE_ENABLED |
|||
#define HAL_ADC_MODULE_ENABLED |
|||
#define HAL_CAN_MODULE_ENABLED |
|||
/*#define HAL_CAN_LEGACY_MODULE_ENABLED*/ |
|||
#define HAL_CEC_MODULE_ENABLED |
|||
#define HAL_CORTEX_MODULE_ENABLED |
|||
#define HAL_CRC_MODULE_ENABLED |
|||
#define HAL_DAC_MODULE_ENABLED |
|||
#define HAL_DMA_MODULE_ENABLED |
|||
#define HAL_ETH_MODULE_ENABLED |
|||
#define HAL_EXTI_MODULE_ENABLED |
|||
#define HAL_FLASH_MODULE_ENABLED |
|||
#define HAL_GPIO_MODULE_ENABLED |
|||
#define HAL_HCD_MODULE_ENABLED |
|||
#define HAL_I2C_MODULE_ENABLED |
|||
#define HAL_I2S_MODULE_ENABLED |
|||
#define HAL_IRDA_MODULE_ENABLED |
|||
#define HAL_IWDG_MODULE_ENABLED |
|||
#define HAL_NAND_MODULE_ENABLED |
|||
#define HAL_NOR_MODULE_ENABLED |
|||
#define HAL_PCCARD_MODULE_ENABLED |
|||
#define HAL_PCD_MODULE_ENABLED |
|||
#define HAL_PWR_MODULE_ENABLED |
|||
#define HAL_RCC_MODULE_ENABLED |
|||
#define HAL_RTC_MODULE_ENABLED |
|||
#define HAL_SD_MODULE_ENABLED |
|||
#define HAL_SMARTCARD_MODULE_ENABLED |
|||
#define HAL_SPI_MODULE_ENABLED |
|||
#define HAL_SRAM_MODULE_ENABLED |
|||
#define HAL_TIM_MODULE_ENABLED |
|||
#define HAL_UART_MODULE_ENABLED |
|||
#define HAL_USART_MODULE_ENABLED |
|||
#define HAL_WWDG_MODULE_ENABLED |
|||
#define HAL_MMC_MODULE_ENABLED |
|||
#endif |
|||
|
|||
/* ########################## Oscillator Values adaptation ####################*/ |
|||
/**
|
|||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSE is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#if !defined (HSE_VALUE) |
|||
#if defined(USE_STM3210C_EVAL) |
|||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ |
|||
#else |
|||
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ |
|||
#endif |
|||
#endif /* HSE_VALUE */ |
|||
|
|||
#if !defined (HSE_STARTUP_TIMEOUT) |
|||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ |
|||
#endif /* HSE_STARTUP_TIMEOUT */ |
|||
|
|||
/**
|
|||
* @brief Internal High Speed oscillator (HSI) value. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSI is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#if !defined (HSI_VALUE) |
|||
#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ |
|||
#endif /* HSI_VALUE */ |
|||
|
|||
/**
|
|||
* @brief Internal Low Speed oscillator (LSI) value. |
|||
*/ |
|||
#if !defined (LSI_VALUE) |
|||
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ |
|||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
|||
The real value may vary depending on the variations |
|||
in voltage and temperature. */ |
|||
/**
|
|||
* @brief External Low Speed oscillator (LSE) value. |
|||
* This value is used by the UART, RTC HAL module to compute the system frequency |
|||
*/ |
|||
#if !defined (LSE_VALUE) |
|||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ |
|||
#endif /* LSE_VALUE */ |
|||
|
|||
#if !defined (LSE_STARTUP_TIMEOUT) |
|||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ |
|||
#endif /* LSE_STARTUP_TIMEOUT */ |
|||
|
|||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
|||
=== you can define the HSE value in your toolchain compiler preprocessor. */ |
|||
|
|||
/* ########################### System Configuration ######################### */ |
|||
/**
|
|||
* @brief This is the HAL system configuration section |
|||
*/ |
|||
#if !defined(VDD_VALUE) |
|||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */ |
|||
#endif |
|||
#if !defined (TICK_INT_PRIORITY) |
|||
#define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ |
|||
#endif |
|||
#if !defined (USE_RTOS) |
|||
#define USE_RTOS 0U |
|||
#endif |
|||
#if !defined (PREFETCH_ENABLE) |
|||
#define PREFETCH_ENABLE 1U |
|||
#endif |
|||
|
|||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ |
|||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ |
|||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ |
|||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ |
|||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ |
|||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ |
|||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ |
|||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ |
|||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ |
|||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ |
|||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ |
|||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ |
|||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ |
|||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ |
|||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ |
|||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ |
|||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ |
|||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ |
|||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ |
|||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ |
|||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ |
|||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ |
|||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ |
|||
|
|||
/* ########################## Assert Selection ############################## */ |
|||
/**
|
|||
* @brief Uncomment the line below to expanse the "assert_param" macro in the |
|||
* HAL drivers code |
|||
*/ |
|||
/* #define USE_FULL_ASSERT 1U */ |
|||
|
|||
/* ################## Ethernet peripheral configuration ##################### */ |
|||
|
|||
/* Section 1 : Ethernet peripheral configuration */ |
|||
|
|||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ |
|||
#define MAC_ADDR0 2U |
|||
#define MAC_ADDR1 0U |
|||
#define MAC_ADDR2 0U |
|||
#define MAC_ADDR3 0U |
|||
#define MAC_ADDR4 0U |
|||
#define MAC_ADDR5 0U |
|||
|
|||
/* Definition of the Ethernet driver buffers size and count */ |
|||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ |
|||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ |
|||
#define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ |
|||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ |
|||
|
|||
/* Section 2: PHY configuration section */ |
|||
|
|||
/* DP83848 PHY Address*/ |
|||
#define DP83848_PHY_ADDRESS 0x01U |
|||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ |
|||
#define PHY_RESET_DELAY 0x000000FFU |
|||
/* PHY Configuration delay */ |
|||
#define PHY_CONFIG_DELAY 0x00000FFFU |
|||
|
|||
#define PHY_READ_TO 0x0000FFFFU |
|||
#define PHY_WRITE_TO 0x0000FFFFU |
|||
|
|||
/* Section 3: Common PHY Registers */ |
|||
|
|||
#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ |
|||
#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ |
|||
|
|||
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ |
|||
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ |
|||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ |
|||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ |
|||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ |
|||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ |
|||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ |
|||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ |
|||
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ |
|||
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ |
|||
|
|||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ |
|||
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ |
|||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ |
|||
|
|||
/* Section 4: Extended PHY Registers */ |
|||
|
|||
#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ |
|||
#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ |
|||
#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ |
|||
|
|||
#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ |
|||
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ |
|||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ |
|||
|
|||
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ |
|||
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ |
|||
|
|||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ |
|||
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ |
|||
|
|||
/* ################## SPI peripheral configuration ########################## */ |
|||
|
|||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
|||
* Activated: CRC code is present inside driver |
|||
* Deactivated: CRC code cleaned from driver |
|||
*/ |
|||
#if !defined (USE_SPI_CRC) |
|||
#define USE_SPI_CRC 0U |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
/**
|
|||
* @brief Include module's header file |
|||
*/ |
|||
|
|||
#ifdef HAL_RCC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_rcc.h" |
|||
#endif /* HAL_RCC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_GPIO_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_gpio.h" |
|||
#endif /* HAL_GPIO_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_EXTI_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_exti.h" |
|||
#endif /* HAL_EXTI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DMA_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_dma.h" |
|||
#endif /* HAL_DMA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ETH_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_eth.h" |
|||
#endif /* HAL_ETH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_can.h" |
|||
#endif /* HAL_CAN_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
|||
#include "Legacy/stm32f1xx_hal_can_legacy.h" |
|||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CEC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_cec.h" |
|||
#endif /* HAL_CEC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CORTEX_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_cortex.h" |
|||
#endif /* HAL_CORTEX_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_adc.h" |
|||
#endif /* HAL_ADC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CRC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_crc.h" |
|||
#endif /* HAL_CRC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_dac.h" |
|||
#endif /* HAL_DAC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_FLASH_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_flash.h" |
|||
#endif /* HAL_FLASH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SRAM_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_sram.h" |
|||
#endif /* HAL_SRAM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NOR_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_nor.h" |
|||
#endif /* HAL_NOR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_i2c.h" |
|||
#endif /* HAL_I2C_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2S_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_i2s.h" |
|||
#endif /* HAL_I2S_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IWDG_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_iwdg.h" |
|||
#endif /* HAL_IWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PWR_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_pwr.h" |
|||
#endif /* HAL_PWR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_RTC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_rtc.h" |
|||
#endif /* HAL_RTC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCCARD_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_pccard.h" |
|||
#endif /* HAL_PCCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_sd.h" |
|||
#endif /* HAL_SD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NAND_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_nand.h" |
|||
#endif /* HAL_NAND_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_spi.h" |
|||
#endif /* HAL_SPI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_tim.h" |
|||
#endif /* HAL_TIM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_uart.h" |
|||
#endif /* HAL_UART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_USART_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_usart.h" |
|||
#endif /* HAL_USART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IRDA_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_irda.h" |
|||
#endif /* HAL_IRDA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SMARTCARD_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_smartcard.h" |
|||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_WWDG_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_wwdg.h" |
|||
#endif /* HAL_WWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_pcd.h" |
|||
#endif /* HAL_PCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_HCD_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_hcd.h" |
|||
#endif /* HAL_HCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_MMC_MODULE_ENABLED |
|||
#include "stm32f1xx_hal_mmc.h" |
|||
#endif /* HAL_MMC_MODULE_ENABLED */ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
#ifdef USE_FULL_ASSERT |
|||
/**
|
|||
* @brief The assert_param macro is used for function's parameters check. |
|||
* @param expr If expr is false, it calls assert_failed function |
|||
* which reports the name of the source file and the source |
|||
* line number of the call that failed. |
|||
* If expr is true, it returns no value. |
|||
* @retval None |
|||
*/ |
|||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
|||
/* Exported functions ------------------------------------------------------- */ |
|||
void assert_failed(uint8_t *file, uint32_t line); |
|||
#else |
|||
#define assert_param(expr) ((void)0U) |
|||
#endif /* USE_FULL_ASSERT */ |
|||
|
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* __STM32F1xx_HAL_CONF_DEFAULT_H */ |
|||
|
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -0,0 +1,197 @@ |
|||
/* |
|||
****************************************************************************** |
|||
** |
|||
|
|||
** File : LinkerScript.ld |
|||
** |
|||
** Author : Auto-generated by STM32CubeIDE |
|||
** |
|||
** Abstract : Linker script for STM32F103Z(C/D/E/G/GTx Device from STM32F1 series |
|||
** 256/386/512K/786/1024bytes FLASH |
|||
** 48/64/96Kbytes RAM |
|||
** |
|||
** Set heap size, stack size and stack location according |
|||
** to application requirements. |
|||
** |
|||
** Set memory bank area and size if external memory is used. |
|||
** |
|||
** Target : STMicroelectronics STM32 |
|||
** |
|||
** Distribution: The file is distributed as is without any warranty |
|||
** of any kind. |
|||
** |
|||
***************************************************************************** |
|||
** @attention |
|||
** |
|||
** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> |
|||
** |
|||
** Redistribution and use in source and binary forms, with or without modification, |
|||
** are permitted provided that the following conditions are met: |
|||
** 1. Redistributions of source code must retain the above copyright notice, |
|||
** this list of conditions and the following disclaimer. |
|||
** 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
** this list of conditions and the following disclaimer in the documentation |
|||
** and/or other materials provided with the distribution. |
|||
** 3. Neither the name of STMicroelectronics nor the names of its contributors |
|||
** may be used to endorse or promote products derived from this software |
|||
** without specific prior written permission. |
|||
** |
|||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
** |
|||
***************************************************************************** |
|||
*/ |
|||
|
|||
/* Entry Point */ |
|||
ENTRY(Reset_Handler) |
|||
|
|||
/* Highest address of the user mode stack */ |
|||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */ |
|||
_Min_Heap_Size = 0x200; /* required amount of heap */ |
|||
_Min_Stack_Size = 0x400; /* required amount of stack */ |
|||
|
|||
/* Memories definition */ |
|||
MEMORY |
|||
{ |
|||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE |
|||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET |
|||
} |
|||
|
|||
/* Sections */ |
|||
SECTIONS |
|||
{ |
|||
/* The startup code into "FLASH" Rom type memory */ |
|||
.isr_vector : |
|||
{ |
|||
. = ALIGN(4); |
|||
KEEP(*(.isr_vector)) /* Startup code */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* The program code and other data into "FLASH" Rom type memory */ |
|||
.text : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.text) /* .text sections (code) */ |
|||
*(.text*) /* .text* sections (code) */ |
|||
*(.glue_7) /* glue arm to thumb code */ |
|||
*(.glue_7t) /* glue thumb to arm code */ |
|||
*(.eh_frame) |
|||
|
|||
KEEP (*(.init)) |
|||
KEEP (*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; /* define a global symbols at end of code */ |
|||
} >FLASH |
|||
|
|||
/* Constant data into "FLASH" Rom type memory */ |
|||
.rodata : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
|||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.ARM.extab : { |
|||
. = ALIGN(4); |
|||
*(.ARM.extab* .gnu.linkonce.armextab.*) |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.ARM : { |
|||
. = ALIGN(4); |
|||
__exidx_start = .; |
|||
*(.ARM.exidx*) |
|||
__exidx_end = .; |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.preinit_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__preinit_array_start = .); |
|||
KEEP (*(.preinit_array*)) |
|||
PROVIDE_HIDDEN (__preinit_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.init_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__init_array_start = .); |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array*)) |
|||
PROVIDE_HIDDEN (__init_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
.fini_array : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE_HIDDEN (__fini_array_start = .); |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
KEEP (*(.fini_array*)) |
|||
PROVIDE_HIDDEN (__fini_array_end = .); |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* Used by the startup to initialize data */ |
|||
_sidata = LOADADDR(.data); |
|||
|
|||
/* Initialized data sections into "RAM" Ram type memory */ |
|||
.data : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sdata = .; /* create a global symbol at data start */ |
|||
*(.data) /* .data sections */ |
|||
*(.data*) /* .data* sections */ |
|||
|
|||
. = ALIGN(4); |
|||
_edata = .; /* define a global symbol at data end */ |
|||
} >RAM AT> FLASH |
|||
|
|||
|
|||
/* Uninitialized data section into "RAM" Ram type memory */ |
|||
. = ALIGN(4); |
|||
.bss : |
|||
{ |
|||
/* This is used by the startup in order to initialize the .bss secion */ |
|||
_sbss = .; /* define a global symbol at bss start */ |
|||
__bss_start__ = _sbss; |
|||
*(.bss) |
|||
*(.bss*) |
|||
*(COMMON) |
|||
|
|||
. = ALIGN(4); |
|||
_ebss = .; /* define a global symbol at bss end */ |
|||
__bss_end__ = _ebss; |
|||
} >RAM |
|||
|
|||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ |
|||
._user_heap_stack : |
|||
{ |
|||
. = ALIGN(8); |
|||
PROVIDE ( end = . ); |
|||
PROVIDE ( _end = . ); |
|||
. = . + _Min_Heap_Size; |
|||
. = . + _Min_Stack_Size; |
|||
. = ALIGN(8); |
|||
} >RAM |
|||
|
|||
/* Remove information from the compiler libraries */ |
|||
/DISCARD/ : |
|||
{ |
|||
libc.a ( * ) |
|||
libm.a ( * ) |
|||
libgcc.a ( * ) |
|||
} |
|||
|
|||
.ARM.attributes 0 : { *(.ARM.attributes) } |
|||
} |
|||
@ -0,0 +1,222 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
*/ |
|||
|
|||
#include "pins_arduino.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
// Digital PinName array
|
|||
const PinName digitalPin[] = { |
|||
PA_0, //D0
|
|||
PA_1, //D1
|
|||
PA_2, //D2
|
|||
PA_3, //D3
|
|||
PA_4, //D4
|
|||
PA_5, //D5
|
|||
PA_6, //D6
|
|||
PA_7, //D7
|
|||
PA_8, //D8
|
|||
PA_9, //D9
|
|||
PA_10, //D10
|
|||
PA_11, //D11
|
|||
PA_12, //D12
|
|||
PA_13, //D13
|
|||
PA_14, //D14
|
|||
PA_15, //D15
|
|||
|
|||
PB_0, //D16
|
|||
PB_1, //D17
|
|||
PB_2, //D18
|
|||
PB_3, //D19
|
|||
PB_4, //D20
|
|||
PB_5, //D21
|
|||
PB_6, //D22
|
|||
PB_7, //D23
|
|||
PB_8, //D24
|
|||
PB_9, //D25
|
|||
PB_10, //D26
|
|||
PB_11, //D27
|
|||
PB_12, //D28
|
|||
PB_13, //D29
|
|||
PB_14, //D30
|
|||
PB_15, //D31
|
|||
|
|||
PC_0, //D32
|
|||
PC_1, //D33
|
|||
PC_2, //D34
|
|||
PC_3, //D35
|
|||
PC_4, //D36
|
|||
PC_5, //D37
|
|||
PC_6, //D38
|
|||
PC_7, //D39
|
|||
PC_8, //D40
|
|||
PC_9, //D41
|
|||
PC_10, //D42
|
|||
PC_11, //D43
|
|||
PC_12, //D44
|
|||
PC_13, //D45
|
|||
PC_14, //D46
|
|||
PC_15, //D47
|
|||
|
|||
PD_0, //D48
|
|||
PD_1, //D49
|
|||
PD_2, //D50
|
|||
PD_3, //D51
|
|||
PD_4, //D52
|
|||
PD_5, //D53
|
|||
PD_6, //D54
|
|||
PD_7, //D55
|
|||
PD_8, //D56
|
|||
PD_9, //D57
|
|||
PD_10, //D58
|
|||
PD_11, //D59
|
|||
PD_12, //D60
|
|||
PD_13, //D61
|
|||
PD_14, //D62
|
|||
PD_15, //D63
|
|||
|
|||
PE_0, //D64
|
|||
PE_1, //D65
|
|||
PE_2, //D66
|
|||
PE_3, //D67
|
|||
PE_4, //D68
|
|||
PE_5, //D69
|
|||
PE_6, //D70
|
|||
PE_7, //D71
|
|||
PE_8, //D72
|
|||
PE_9, //D73
|
|||
PE_10, //D74
|
|||
PE_11, //D75
|
|||
PE_12, //D76
|
|||
PE_13, //D77
|
|||
PE_14, //D78
|
|||
PE_15, //D79
|
|||
|
|||
PF_0, //D80
|
|||
PF_1, //D81
|
|||
PF_2, //D82
|
|||
PF_3, //D83
|
|||
PF_4, //D84
|
|||
PF_5, //D85
|
|||
PF_6, //D86
|
|||
PF_7, //D87
|
|||
PF_8, //D88
|
|||
PF_9, //D89
|
|||
PF_10, //D90
|
|||
PF_11, //D91
|
|||
PF_12, //D92
|
|||
PF_13, //D93
|
|||
PF_14, //D94
|
|||
PF_15, //D95
|
|||
|
|||
PG_0, //D96
|
|||
PG_1, //D97
|
|||
PG_2, //D98
|
|||
PG_3, //D99
|
|||
PG_4, //D100
|
|||
PG_5, //D101
|
|||
PG_6, //D102
|
|||
PG_7, //D103
|
|||
PG_8, //D104
|
|||
PG_9, //D105
|
|||
PG_10, //D106
|
|||
PG_11, //D107
|
|||
PG_12, //D108
|
|||
PG_13, //D109
|
|||
PG_14, //D110
|
|||
PG_15 //D111
|
|||
}; |
|||
|
|||
// Analog (Ax) pin number array
|
|||
const uint32_t analogInputPin[] = { |
|||
0, // A0, PA0
|
|||
1, // A1, PA1
|
|||
2, // A2, PA2
|
|||
3, // A3, PA3
|
|||
4, // A4, PA4
|
|||
5, // A5, PA5
|
|||
6, // A6, PA6
|
|||
7, // A7, PA7
|
|||
16, // A8, PB0
|
|||
17, // A9, PB1
|
|||
32, // A10, PC0
|
|||
33, // A11, PC1
|
|||
34, // A12, PC2
|
|||
35, // A13, PC3
|
|||
36, // A14, PC4
|
|||
37, // A15, PC5
|
|||
86, // A16, PF6
|
|||
87, // A17, PF7
|
|||
88, // A18, PF8
|
|||
89, // A19, PF9
|
|||
90 // A20, PF10
|
|||
}; |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
// ----------------------------------------------------------------------------
|
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/**
|
|||
* @brief System Clock Configuration |
|||
* @param None |
|||
* @retval None |
|||
*/ |
|||
WEAK void SystemClock_Config(void) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
|||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; |
|||
|
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
|||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; |
|||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
|||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; |
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
|||
Error_Handler(); |
|||
} |
|||
/* Initializes the CPU, AHB and APB busses clocks */ |
|||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
|||
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; |
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
|||
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
|||
Error_Handler(); |
|||
} |
|||
|
|||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; |
|||
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; |
|||
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; |
|||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { |
|||
Error_Handler(); |
|||
} |
|||
} |
|||
|
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,232 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2019, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
******************************************************************************* |
|||
*/ |
|||
|
|||
#ifndef _VARIANT_ARDUINO_STM32_ |
|||
#define _VARIANT_ARDUINO_STM32_ |
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|
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#ifdef __cplusplus |
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extern "C" { |
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#endif // __cplusplus
|
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|
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/*----------------------------------------------------------------------------
|
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* Pins |
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*----------------------------------------------------------------------------*/ |
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#define PA0 0 |
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#define PA1 1 |
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#define PA2 2 |
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#define PA3 3 |
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#define PA4 4 |
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#define PA5 5 |
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#define PA6 6 |
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#define PA7 7 |
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#define PA8 8 |
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#define PA9 9 |
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#define PA10 10 |
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#define PA11 11 |
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#define PA12 12 |
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#define PA13 13 |
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#define PA14 14 |
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#define PA15 15 |
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|
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#define PB0 16 |
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#define PB1 17 |
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#define PB2 18 |
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#define PB3 19 |
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#define PB4 20 |
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#define PB5 21 |
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#define PB6 22 |
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#define PB7 23 |
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#define PB8 24 |
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#define PB9 25 |
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#define PB10 26 |
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#define PB11 27 |
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#define PB12 28 |
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#define PB13 29 |
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#define PB14 30 |
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#define PB15 31 |
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|
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#define PC0 32 |
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#define PC1 33 |
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#define PC2 34 |
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#define PC3 35 |
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#define PC4 36 |
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#define PC5 37 |
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#define PC6 38 |
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#define PC7 39 |
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#define PC8 40 |
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#define PC9 41 |
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#define PC10 42 |
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#define PC11 43 |
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#define PC12 44 |
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#define PC13 45 |
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#define PC14 46 |
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#define PC15 47 |
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|
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#define PD0 48 |
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#define PD1 49 |
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#define PD2 50 |
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#define PD3 51 |
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#define PD4 52 |
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#define PD5 53 |
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#define PD6 54 |
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#define PD7 55 |
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#define PD8 56 |
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#define PD9 57 |
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#define PD10 58 |
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#define PD11 59 |
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#define PD12 60 |
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#define PD13 61 |
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#define PD14 62 |
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#define PD15 63 |
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|
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#define PE0 64 |
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#define PE1 65 |
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#define PE2 66 |
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#define PE3 67 |
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#define PE4 68 |
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#define PE5 69 |
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#define PE6 70 |
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#define PE7 71 |
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#define PE8 72 |
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#define PE9 73 |
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#define PE10 74 |
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#define PE11 75 |
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#define PE12 76 |
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#define PE13 77 |
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#define PE14 78 |
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#define PE15 79 |
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|
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#define PF0 80 |
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#define PF1 81 |
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#define PF2 82 |
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#define PF3 83 |
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#define PF4 84 |
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#define PF5 85 |
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#define PF6 86 |
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#define PF7 87 |
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#define PF8 88 |
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#define PF9 89 |
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#define PF10 90 |
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#define PF11 91 |
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#define PF12 92 |
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#define PF13 93 |
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#define PF14 94 |
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#define PF15 95 |
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|
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#define PG0 96 |
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#define PG1 97 |
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#define PG2 98 |
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#define PG3 99 |
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#define PG4 100 |
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#define PG5 101 |
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#define PG6 102 |
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#define PG7 103 |
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#define PG8 104 |
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#define PG9 105 |
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#define PG10 106 |
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#define PG11 107 |
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#define PG12 108 |
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#define PG13 109 |
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#define PG14 110 |
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#define PG15 111 |
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|
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// This must be a literal
|
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#define NUM_DIGITAL_PINS 112 |
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#define NUM_ANALOG_INPUTS 21 |
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|
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// On-board LED pin number
|
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#ifdef ARDUINO_VCCGND_F103ZET6_MINI |
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#define LED_BUILTIN PG15 |
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#elif defined(ARDUINO_VCCGND_F103ZET6) |
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#define LED_BUILTIN PC13 |
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#elif !defined(LED_BUILTIN) |
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#define LED_BUILTIN PC13 |
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#endif |
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|
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// On-board user button
|
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#ifndef USER_BTN |
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#define USER_BTN PB1 |
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#endif |
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|
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// SPI Definitions
|
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#ifdef ARDUINO_VCCGND_F103ZET6 |
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#define PIN_SPI_SS PA15 |
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#define PIN_SPI_MOSI PB5 |
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#define PIN_SPI_MISO PB4 |
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#define PIN_SPI_SCK PB3 |
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#else |
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#define PIN_SPI_SS PC4 |
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#define PIN_SPI_MOSI PA7 |
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#define PIN_SPI_MISO PA6 |
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#define PIN_SPI_SCK PA5 |
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#endif |
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|
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// I2C Definitions
|
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#define PIN_WIRE_SDA PB7 |
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#define PIN_WIRE_SCL PB6 |
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|
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// Timer Definitions (optional)
|
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// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
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#define TIMER_TONE TIM6 |
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#define TIMER_SERVO TIM7 |
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|
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// UART Definitions
|
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// Define here Serial instance number to map on Serial generic name
|
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#define SERIAL_UART_INSTANCE 1 |
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|
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// Default pin used for 'Serial' instance (ex: ST-Link)
|
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// Mandatory for Firmata
|
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#define PIN_SERIAL_RX PA10 |
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#define PIN_SERIAL_TX PA9 |
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|
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// Default pin used for 'Serial2' instance
|
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#define PIN_SERIAL2_RX PA3 |
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#define PIN_SERIAL2_TX PA2 |
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|
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// Default pin used for 'Serial3' instance
|
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#define PIN_SERIAL3_RX PB11 |
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#define PIN_SERIAL3_TX PB10 |
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|
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/* Extra HAL modules */ |
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#define HAL_DAC_MODULE_ENABLED |
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#define HAL_SD_MODULE_ENABLED |
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#define HAL_SRAM_MODULE_ENABLED |
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|
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#ifdef __cplusplus |
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} // extern "C"
|
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#endif |
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/*----------------------------------------------------------------------------
|
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* Arduino objects - C++ only |
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*----------------------------------------------------------------------------*/ |
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|
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#ifdef __cplusplus |
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// These serial port names are intended to allow libraries and architecture-neutral
|
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// sketches to automatically default to the correct port name for a particular type
|
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// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
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// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
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//
|
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// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
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//
|
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// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
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//
|
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// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
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//
|
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// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
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//
|
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// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
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// pins are NOT connected to anything by default.
|
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#define SERIAL_PORT_MONITOR Serial |
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#define SERIAL_PORT_HARDWARE Serial1 |
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#endif |
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|
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#endif /* _VARIANT_ARDUINO_STM32_ */ |
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@ -0,0 +1,408 @@ |
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/*
|
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******************************************************************************* |
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* Copyright (c) 2019, STMicroelectronics |
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* All rights reserved. |
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* |
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* This software component is licensed by ST under BSD 3-Clause license, |
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* the "License"; You may not use this file except in compliance with the |
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* License. You may obtain a copy of the License at: |
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* opensource.org/licenses/BSD-3-Clause |
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* |
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******************************************************************************* |
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* Automatically generated from STM32F407V(E-G)Tx.xml |
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*/ |
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#include "Arduino.h" |
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#include "PeripheralPins.h" |
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|
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/* =====
|
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* Note: Commented lines are alternative possibilities which are not used per default. |
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* If you change them, you will have to know what you do |
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* ===== |
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*/ |
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|
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//*** ADC ***
|
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|
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#ifdef HAL_ADC_MODULE_ENABLED |
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WEAK const PinMap PinMap_ADC[] = { |
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{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
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// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
|
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// {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
|
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{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
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// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
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// {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
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{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
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// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
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// {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
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{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
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// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
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// {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
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{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
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// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
|
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{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
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// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
|
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{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
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// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
|
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{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
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// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
|
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{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
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// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
|
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{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
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// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
|
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{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
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// {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
|
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// {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
|
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{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
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// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
|
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// {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
|
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{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
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// {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
|
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// {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
|
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{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
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// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
|
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// {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
|
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{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
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// {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
|
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{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
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// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
|
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{NC, NP, 0} |
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}; |
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#endif |
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|
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//*** DAC ***
|
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|
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#ifdef HAL_DAC_MODULE_ENABLED |
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WEAK const PinMap PinMap_DAC[] = { |
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{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
|
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{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
|
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{NC, NP, 0} |
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}; |
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#endif |
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|
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//*** I2C ***
|
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|
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#ifdef HAL_I2C_MODULE_ENABLED |
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WEAK const PinMap PinMap_I2C_SDA[] = { |
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{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
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{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
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{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
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{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
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{NC, NP, 0} |
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}; |
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#endif |
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|
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#ifdef HAL_I2C_MODULE_ENABLED |
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WEAK const PinMap PinMap_I2C_SCL[] = { |
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{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
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{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
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{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
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{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
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{NC, NP, 0} |
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}; |
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#endif |
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|
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//*** PWM ***
|
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|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
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// Some pins can perform PWM from more than one timer. These were selected to utilize as many channels as
|
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// possible from timers which were already dedicated to PWM output.
|
|||
|
|||
// TIM1 = Pins are using for OTG FS
|
|||
// TIM2 = [HEATER_BED], TIM2 is used OTG HS SOF
|
|||
// TIM6 = Tone
|
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// TIM8 = [FAN0, HEATER_1] OTG HS
|
|||
// TIM7 = Servo
|
|||
// TIM9 = [HEATER_0, ]
|
|||
// TIM1, TIM8, TIM12 = Pins are using for OTG HS
|
|||
// No timer = [FAN1 ]
|
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|
|||
WEAK const PinMap PinMap_PWM[] = { |
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{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
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// {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
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// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
|||
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
|||
{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
|||
// {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
|||
{PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
|||
// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
|||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
|||
// {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
|||
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
// {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
// {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
|||
{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
|||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
|||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
|||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
|||
// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
|||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
|||
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
|||
{PB_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
|||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
|||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
|||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
|||
// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
|
|||
// {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
|||
{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
|
|||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
|||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
|||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
// {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
// {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
|||
// {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
|
|||
// {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
|||
// {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
|
|||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
// {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
|||
// {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
|||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
// {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
|||
// {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
|||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
|||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
|||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
|||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
|||
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
|||
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
|||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
|||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
|||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
|||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SERIAL ***
|
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_TX[] = { |
|||
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, |
|||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, |
|||
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, |
|||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RX[] = { |
|||
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, |
|||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, |
|||
// {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, |
|||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_RTS[] = { |
|||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
// {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
// {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
|||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_UART_CTS[] = { |
|||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
// {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
|||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SPI ***
|
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MOSI[] = { |
|||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_MISO[] = { |
|||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SCLK[] = { |
|||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SPI_SSEL[] = { |
|||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, |
|||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** CAN ***
|
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_RD[] = { |
|||
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, |
|||
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, |
|||
{PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_CAN_TD[] = { |
|||
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, |
|||
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, |
|||
{PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** ETHERNET ***
|
|||
|
|||
#ifdef HAL_ETH_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_Ethernet[] = { |
|||
{PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
|
|||
{PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
|
|||
{PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
|
|||
{PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
|
|||
{PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
|
|||
{PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
|
|||
{PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
|
|||
{PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
|||
{PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
|||
{PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
|
|||
{PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
|||
{PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
|||
{PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
|||
{PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
|
|||
{PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
|
|||
{PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
|
|||
{PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
|
|||
{PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
|
|||
{PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** No QUADSPI ***
|
|||
|
|||
//*** USB ***
|
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_USB_OTG_FS[] = { |
|||
// {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
|||
// {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
|
|||
// {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
|
|||
{PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
|
|||
{PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_USB_OTG_HS[] = { |
|||
#ifdef USE_USB_HS_IN_FS |
|||
// {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
|
|||
// {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
|
|||
// {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
|
|||
{PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
|
|||
{PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
|
|||
#else |
|||
{PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
|
|||
{PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
|
|||
{PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
|
|||
{PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
|
|||
{PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
|
|||
{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
|
|||
{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
|
|||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
|
|||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
|
|||
{PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
|
|||
{PC_2, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
|
|||
{PC_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
|
|||
#endif /* USE_USB_HS_IN_FS */ |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SD ***
|
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
WEAK const PinMap PinMap_SD[] = { |
|||
{PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
|
|||
{PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
|
|||
{PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
|
|||
{PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
|
|||
{PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
|
|||
{PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
|
|||
{PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
|
|||
{PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
|
|||
{PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
|
|||
{PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
@ -0,0 +1,50 @@ |
|||
/* SYS_WKUP */ |
|||
#ifdef PWR_WAKEUP_PIN1 |
|||
SYS_WKUP1 = PA_0, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN2 |
|||
SYS_WKUP2 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN3 |
|||
SYS_WKUP3 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN4 |
|||
SYS_WKUP4 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN5 |
|||
SYS_WKUP5 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN6 |
|||
SYS_WKUP6 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN7 |
|||
SYS_WKUP7 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN8 |
|||
SYS_WKUP8 = NC, |
|||
#endif |
|||
/* USB */ |
|||
#ifdef USBCON |
|||
USB_OTG_FS_SOF = PA_8, |
|||
USB_OTG_FS_VBUS = PA_9, |
|||
USB_OTG_FS_ID = PA_10, |
|||
USB_OTG_FS_DM = PA_11, |
|||
USB_OTG_FS_DP = PA_12, |
|||
USB_OTG_HS_ULPI_D0 = PA_3, |
|||
USB_OTG_HS_SOF = PA_4, |
|||
USB_OTG_HS_ULPI_CK = PA_5, |
|||
USB_OTG_HS_ULPI_D1 = PB_0, |
|||
USB_OTG_HS_ULPI_D2 = PB_1, |
|||
USB_OTG_HS_ULPI_D7 = PB_5, |
|||
USB_OTG_HS_ULPI_D3 = PB_10, |
|||
USB_OTG_HS_ULPI_D4 = PB_11, |
|||
USB_OTG_HS_ID = PB_12, |
|||
USB_OTG_HS_ULPI_D5 = PB_12, |
|||
USB_OTG_HS_ULPI_D6 = PB_13, |
|||
USB_OTG_HS_VBUS = PB_13, |
|||
USB_OTG_HS_DM = PB_14, |
|||
USB_OTG_HS_DP = PB_15, |
|||
USB_OTG_HS_ULPI_STP = PC_0, |
|||
USB_OTG_HS_ULPI_DIR = PC_2, |
|||
USB_OTG_HS_ULPI_NXT = PC_3, |
|||
#endif |
|||
@ -0,0 +1,495 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_conf_template.h |
|||
* @author MCD Application Team |
|||
* @brief HAL configuration template file. |
|||
* This file should be copied to the application folder and renamed |
|||
* to stm32f4xx_hal_conf.h. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2017 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef __STM32F4xx_HAL_CONF_H |
|||
#define __STM32F4xx_HAL_CONF_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/* Exported constants --------------------------------------------------------*/ |
|||
|
|||
/* ########################## Module Selection ############################## */ |
|||
/**
|
|||
* @brief This is the list of modules to be used in the HAL driver |
|||
*/ |
|||
#define HAL_MODULE_ENABLED |
|||
#define HAL_ADC_MODULE_ENABLED |
|||
// #define HAL_CAN_MODULE_ENABLED
|
|||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ |
|||
#define HAL_CRC_MODULE_ENABLED |
|||
// #define HAL_CEC_MODULE_ENABLED
|
|||
// #define HAL_CRYP_MODULE_ENABLED
|
|||
#define HAL_DAC_MODULE_ENABLED |
|||
// #define HAL_DCMI_MODULE_ENABLED
|
|||
#define HAL_DMA_MODULE_ENABLED |
|||
// #define HAL_DMA2D_MODULE_ENABLED
|
|||
// #define HAL_ETH_MODULE_ENABLED
|
|||
// #define HAL_FLASH_MODULE_ENABLED
|
|||
// #define HAL_NAND_MODULE_ENABLED
|
|||
// #define HAL_NOR_MODULE_ENABLED
|
|||
// #define HAL_PCCARD_MODULE_ENABLED
|
|||
// #define HAL_SRAM_MODULE_ENABLED
|
|||
// #define HAL_SDRAM_MODULE_ENABLED
|
|||
// #define HAL_HASH_MODULE_ENABLED
|
|||
#define HAL_GPIO_MODULE_ENABLED |
|||
// #define HAL_EXTI_MODULE_ENABLED
|
|||
#define HAL_I2C_MODULE_ENABLED |
|||
// #define HAL_SMBUS_MODULE_ENABLED
|
|||
// #define HAL_I2S_MODULE_ENABLED
|
|||
// #define HAL_IWDG_MODULE_ENABLED
|
|||
// #define HAL_LTDC_MODULE_ENABLED
|
|||
// #define HAL_DSI_MODULE_ENABLED
|
|||
#define HAL_PWR_MODULE_ENABLED |
|||
// #define HAL_QSPI_MODULE_ENABLED
|
|||
#define HAL_RCC_MODULE_ENABLED |
|||
// #define HAL_RNG_MODULE_ENABLED
|
|||
// #define HAL_RTC_MODULE_ENABLED
|
|||
// #define HAL_SAI_MODULE_ENABLED
|
|||
// #define HAL_SD_MODULE_ENABLED
|
|||
#define HAL_SPI_MODULE_ENABLED |
|||
#define HAL_TIM_MODULE_ENABLED |
|||
// #define HAL_UART_MODULE_ENABLED
|
|||
#define HAL_USART_MODULE_ENABLED |
|||
// #define HAL_IRDA_MODULE_ENABLED
|
|||
// #define HAL_SMARTCARD_MODULE_ENABLED
|
|||
// #define HAL_WWDG_MODULE_ENABLED
|
|||
#define HAL_CORTEX_MODULE_ENABLED |
|||
// #define HAL_PCD_MODULE_ENABLED
|
|||
// #define HAL_HCD_MODULE_ENABLED
|
|||
// #define HAL_FMPI2C_MODULE_ENABLED
|
|||
// #define HAL_SPDIFRX_MODULE_ENABLED
|
|||
// #define HAL_DFSDM_MODULE_ENABLED
|
|||
// #define HAL_LPTIM_MODULE_ENABLED
|
|||
// #define HAL_MMC_MODULE_ENABLED
|
|||
|
|||
/* ########################## HSE/HSI Values adaptation ##################### */ |
|||
/**
|
|||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSE is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#if !defined (HSE_VALUE) |
|||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ |
|||
#endif /* HSE_VALUE */ |
|||
|
|||
#if !defined (HSE_STARTUP_TIMEOUT) |
|||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ |
|||
#endif /* HSE_STARTUP_TIMEOUT */ |
|||
|
|||
/**
|
|||
* @brief Internal High Speed oscillator (HSI) value. |
|||
* This value is used by the RCC HAL module to compute the system frequency |
|||
* (when HSI is used as system clock source, directly or through the PLL). |
|||
*/ |
|||
#if !defined (HSI_VALUE) |
|||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ |
|||
#endif /* HSI_VALUE */ |
|||
|
|||
/**
|
|||
* @brief Internal Low Speed oscillator (LSI) value. |
|||
*/ |
|||
#if !defined (LSI_VALUE) |
|||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ |
|||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
|||
The real value may vary depending on the variations |
|||
in voltage and temperature. */ |
|||
/**
|
|||
* @brief External Low Speed oscillator (LSE) value. |
|||
*/ |
|||
#if !defined (LSE_VALUE) |
|||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ |
|||
#endif /* LSE_VALUE */ |
|||
|
|||
#if !defined (LSE_STARTUP_TIMEOUT) |
|||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ |
|||
#endif /* LSE_STARTUP_TIMEOUT */ |
|||
|
|||
/**
|
|||
* @brief External clock source for I2S peripheral |
|||
* This value is used by the I2S HAL module to compute the I2S clock source |
|||
* frequency, this source is inserted directly through I2S_CKIN pad. |
|||
*/ |
|||
#if !defined (EXTERNAL_CLOCK_VALUE) |
|||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ |
|||
#endif /* EXTERNAL_CLOCK_VALUE */ |
|||
|
|||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
|||
=== you can define the HSE value in your toolchain compiler preprocessor. */ |
|||
|
|||
/* ########################### System Configuration ######################### */ |
|||
/**
|
|||
* @brief This is the HAL system configuration section |
|||
*/ |
|||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */ |
|||
#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ |
|||
#define USE_RTOS 0U |
|||
#define PREFETCH_ENABLE 1U |
|||
#define INSTRUCTION_CACHE_ENABLE 1U |
|||
#define DATA_CACHE_ENABLE 1U |
|||
|
|||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ |
|||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ |
|||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ |
|||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ |
|||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ |
|||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ |
|||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ |
|||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ |
|||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ |
|||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ |
|||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ |
|||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ |
|||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ |
|||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ |
|||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ |
|||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ |
|||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ |
|||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ |
|||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ |
|||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ |
|||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ |
|||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ |
|||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ |
|||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ |
|||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ |
|||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ |
|||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ |
|||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ |
|||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ |
|||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ |
|||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ |
|||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ |
|||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ |
|||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ |
|||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ |
|||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ |
|||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ |
|||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ |
|||
|
|||
/* ########################## Assert Selection ############################## */ |
|||
/**
|
|||
* @brief Uncomment the line below to expanse the "assert_param" macro in the |
|||
* HAL drivers code |
|||
*/ |
|||
// #define USE_FULL_ASSERT 1U
|
|||
|
|||
/* ################## Ethernet peripheral configuration ##################### */ |
|||
|
|||
/* Section 1 : Ethernet peripheral configuration */ |
|||
|
|||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ |
|||
#define MAC_ADDR0 2U |
|||
#define MAC_ADDR1 0U |
|||
#define MAC_ADDR2 0U |
|||
#define MAC_ADDR3 0U |
|||
#define MAC_ADDR4 0U |
|||
#define MAC_ADDR5 0U |
|||
|
|||
/* Definition of the Ethernet driver buffers size and count */ |
|||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ |
|||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ |
|||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ |
|||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ |
|||
|
|||
/* Section 2: PHY configuration section */ |
|||
|
|||
/* DP83848 PHY Address*/ |
|||
#define DP83848_PHY_ADDRESS 0x01U |
|||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ |
|||
#define PHY_RESET_DELAY 0x000000FFU |
|||
/* PHY Configuration delay */ |
|||
#define PHY_CONFIG_DELAY 0x00000FFFU |
|||
|
|||
#define PHY_READ_TO 0x0000FFFFU |
|||
#define PHY_WRITE_TO 0x0000FFFFU |
|||
|
|||
/* Section 3: Common PHY Registers */ |
|||
|
|||
#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ |
|||
#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ |
|||
|
|||
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ |
|||
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ |
|||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ |
|||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ |
|||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ |
|||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ |
|||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ |
|||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ |
|||
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ |
|||
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ |
|||
|
|||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ |
|||
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ |
|||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ |
|||
|
|||
/* Section 4: Extended PHY Registers */ |
|||
|
|||
#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ |
|||
#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ |
|||
#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ |
|||
|
|||
#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ |
|||
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ |
|||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ |
|||
|
|||
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ |
|||
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ |
|||
|
|||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ |
|||
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ |
|||
|
|||
/* ################## SPI peripheral configuration ########################## */ |
|||
|
|||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
|||
* Activated: CRC code is present inside driver |
|||
* Deactivated: CRC code cleaned from driver |
|||
*/ |
|||
|
|||
#define USE_SPI_CRC 0U |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
/**
|
|||
* @brief Include module's header file |
|||
*/ |
|||
|
|||
#ifdef HAL_RCC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rcc.h" |
|||
#endif /* HAL_RCC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_GPIO_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_gpio.h" |
|||
#endif /* HAL_GPIO_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_EXTI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_exti.h" |
|||
#endif /* HAL_EXTI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DMA_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dma.h" |
|||
#endif /* HAL_DMA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CORTEX_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cortex.h" |
|||
#endif /* HAL_CORTEX_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_adc.h" |
|||
#endif /* HAL_ADC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_can.h" |
|||
#endif /* HAL_CAN_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_can_legacy.h" |
|||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CRC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_crc.h" |
|||
#endif /* HAL_CRC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CRYP_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cryp.h" |
|||
#endif /* HAL_CRYP_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DMA2D_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dma2d.h" |
|||
#endif /* HAL_DMA2D_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dac.h" |
|||
#endif /* HAL_DAC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DCMI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dcmi.h" |
|||
#endif /* HAL_DCMI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_ETH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_eth.h" |
|||
#endif /* HAL_ETH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_FLASH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_flash.h" |
|||
#endif /* HAL_FLASH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SRAM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sram.h" |
|||
#endif /* HAL_SRAM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NOR_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_nor.h" |
|||
#endif /* HAL_NOR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_NAND_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_nand.h" |
|||
#endif /* HAL_NAND_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCCARD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pccard.h" |
|||
#endif /* HAL_PCCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SDRAM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sdram.h" |
|||
#endif /* HAL_SDRAM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_HASH_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_hash.h" |
|||
#endif /* HAL_HASH_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_i2c.h" |
|||
#endif /* HAL_I2C_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SMBUS_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_smbus.h" |
|||
#endif /* HAL_SMBUS_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_I2S_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_i2s.h" |
|||
#endif /* HAL_I2S_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IWDG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_iwdg.h" |
|||
#endif /* HAL_IWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_LTDC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_ltdc.h" |
|||
#endif /* HAL_LTDC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PWR_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pwr.h" |
|||
#endif /* HAL_PWR_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_RNG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rng.h" |
|||
#endif /* HAL_RNG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_RTC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_rtc.h" |
|||
#endif /* HAL_RTC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SAI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sai.h" |
|||
#endif /* HAL_SAI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_sd.h" |
|||
#endif /* HAL_SD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_spi.h" |
|||
#endif /* HAL_SPI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_tim.h" |
|||
#endif /* HAL_TIM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_uart.h" |
|||
#endif /* HAL_UART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_USART_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_usart.h" |
|||
#endif /* HAL_USART_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_IRDA_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_irda.h" |
|||
#endif /* HAL_IRDA_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SMARTCARD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_smartcard.h" |
|||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_WWDG_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_wwdg.h" |
|||
#endif /* HAL_WWDG_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_pcd.h" |
|||
#endif /* HAL_PCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_HCD_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_hcd.h" |
|||
#endif /* HAL_HCD_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DSI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dsi.h" |
|||
#endif /* HAL_DSI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_QSPI_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_qspi.h" |
|||
#endif /* HAL_QSPI_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_CEC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_cec.h" |
|||
#endif /* HAL_CEC_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_FMPI2C_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_fmpi2c.h" |
|||
#endif /* HAL_FMPI2C_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_SPDIFRX_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_spdifrx.h" |
|||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_DFSDM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_dfsdm.h" |
|||
#endif /* HAL_DFSDM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_LPTIM_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_lptim.h" |
|||
#endif /* HAL_LPTIM_MODULE_ENABLED */ |
|||
|
|||
#ifdef HAL_MMC_MODULE_ENABLED |
|||
#include "stm32f4xx_hal_mmc.h" |
|||
#endif /* HAL_MMC_MODULE_ENABLED */ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
#ifdef USE_FULL_ASSERT |
|||
/**
|
|||
* @brief The assert_param macro is used for function's parameters check. |
|||
* @param expr If expr is false, it calls assert_failed function |
|||
* which reports the name of the source file and the source |
|||
* line number of the call that failed. |
|||
* If expr is true, it returns no value. |
|||
* @retval None |
|||
*/ |
|||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
|||
/* Exported functions ------------------------------------------------------- */ |
|||
void assert_failed(uint8_t* file, uint32_t line); |
|||
#else |
|||
#define assert_param(expr) ((void)0U) |
|||
#endif /* USE_FULL_ASSERT */ |
|||
|
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* __STM32F4xx_HAL_CONF_H */ |
|||
|
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -0,0 +1,203 @@ |
|||
/* |
|||
****************************************************************************** |
|||
** |
|||
** File : LinkerScript.ld |
|||
** |
|||
** Abstract : Linker script for STM32F4x7Vx Device with |
|||
** 512/1024KByte FLASH, 192KByte RAM |
|||
** |
|||
** Set heap size, stack size and stack location according |
|||
** to application requirements. |
|||
** |
|||
** Set memory bank area and size if external memory is used. |
|||
** |
|||
** Target : STMicroelectronics STM32 |
|||
** |
|||
** Distribution: The file is distributed “as is,” without any warranty |
|||
** of any kind. |
|||
** |
|||
***************************************************************************** |
|||
** @attention |
|||
** |
|||
** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> |
|||
** |
|||
** Redistribution and use in source and binary forms, with or without modification, |
|||
** are permitted provided that the following conditions are met: |
|||
** 1. Redistributions of source code must retain the above copyright notice, |
|||
** this list of conditions and the following disclaimer. |
|||
** 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
** this list of conditions and the following disclaimer in the documentation |
|||
** and/or other materials provided with the distribution. |
|||
** 3. Neither the name of STMicroelectronics nor the names of its contributors |
|||
** may be used to endorse or promote products derived from this software |
|||
** without specific prior written permission. |
|||
** |
|||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
** |
|||
***************************************************************************** |
|||
*/ |
|||
|
|||
/* Entry Point */ |
|||
ENTRY(Reset_Handler) |
|||
|
|||
/* Highest address of the user mode stack */ |
|||
_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of RAM */ |
|||
/* Generate a link error if heap and stack don't fit into RAM */ |
|||
_Min_Heap_Size = 0x200; /* required amount of heap */ |
|||
_Min_Stack_Size = 0x400; /* required amount of stack */ |
|||
|
|||
/* Specify the memory areas */ |
|||
MEMORY |
|||
{ |
|||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE |
|||
CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K |
|||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET |
|||
} |
|||
|
|||
/* Define output sections */ |
|||
SECTIONS |
|||
{ |
|||
/* The startup code goes first into FLASH */ |
|||
.isr_vector : |
|||
{ |
|||
. = ALIGN(4); |
|||
KEEP(*(.isr_vector)) /* Startup code */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* The program code and other data goes into FLASH */ |
|||
.text : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.text) /* .text sections (code) */ |
|||
*(.text*) /* .text* sections (code) */ |
|||
*(.glue_7) /* glue arm to thumb code */ |
|||
*(.glue_7t) /* glue thumb to arm code */ |
|||
*(.eh_frame) |
|||
|
|||
KEEP (*(.init)) |
|||
KEEP (*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; /* define a global symbols at end of code */ |
|||
} >FLASH |
|||
|
|||
/* Constant data goes into FLASH */ |
|||
.rodata : |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
|||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH |
|||
.ARM : { |
|||
__exidx_start = .; |
|||
*(.ARM.exidx*) |
|||
__exidx_end = .; |
|||
} >FLASH |
|||
|
|||
.preinit_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__preinit_array_start = .); |
|||
KEEP (*(.preinit_array*)) |
|||
PROVIDE_HIDDEN (__preinit_array_end = .); |
|||
} >FLASH |
|||
.init_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__init_array_start = .); |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array*)) |
|||
PROVIDE_HIDDEN (__init_array_end = .); |
|||
} >FLASH |
|||
.fini_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__fini_array_start = .); |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
KEEP (*(.fini_array*)) |
|||
PROVIDE_HIDDEN (__fini_array_end = .); |
|||
} >FLASH |
|||
|
|||
/* used by the startup to initialize data */ |
|||
_sidata = LOADADDR(.data); |
|||
|
|||
/* Initialized data sections goes into RAM, load LMA copy after code */ |
|||
.data : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sdata = .; /* create a global symbol at data start */ |
|||
*(.data) /* .data sections */ |
|||
*(.data*) /* .data* sections */ |
|||
|
|||
. = ALIGN(4); |
|||
_edata = .; /* define a global symbol at data end */ |
|||
} >RAM AT> FLASH |
|||
|
|||
_siccmram = LOADADDR(.ccmram); |
|||
|
|||
/* CCM-RAM section |
|||
* |
|||
* IMPORTANT NOTE! |
|||
* If initialized variables will be placed in this section, |
|||
* the startup code needs to be modified to copy the init-values. |
|||
*/ |
|||
.ccmram : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sccmram = .; /* create a global symbol at ccmram start */ |
|||
*(.ccmram) |
|||
*(.ccmram*) |
|||
|
|||
. = ALIGN(4); |
|||
_eccmram = .; /* create a global symbol at ccmram end */ |
|||
} >CCMRAM AT> FLASH |
|||
|
|||
|
|||
/* Uninitialized data section */ |
|||
. = ALIGN(4); |
|||
.bss : |
|||
{ |
|||
/* This is used by the startup in order to initialize the .bss secion */ |
|||
_sbss = .; /* define a global symbol at bss start */ |
|||
__bss_start__ = _sbss; |
|||
*(.bss) |
|||
*(.bss*) |
|||
*(COMMON) |
|||
|
|||
. = ALIGN(4); |
|||
_ebss = .; /* define a global symbol at bss end */ |
|||
__bss_end__ = _ebss; |
|||
} >RAM |
|||
|
|||
/* User_heap_stack section, used to check that there is enough RAM left */ |
|||
._user_heap_stack : |
|||
{ |
|||
. = ALIGN(8); |
|||
PROVIDE ( end = . ); |
|||
PROVIDE ( _end = . ); |
|||
. = . + _Min_Heap_Size; |
|||
. = . + _Min_Stack_Size; |
|||
. = ALIGN(8); |
|||
} >RAM |
|||
|
|||
|
|||
/* Remove information from the standard libraries */ |
|||
/DISCARD/ : |
|||
{ |
|||
libc.a ( * ) |
|||
libm.a ( * ) |
|||
libgcc.a ( * ) |
|||
} |
|||
|
|||
.ARM.attributes 0 : { *(.ARM.attributes) } |
|||
} |
|||
@ -0,0 +1,275 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#include "pins_arduino.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
// Digital PinName array
|
|||
const PinName digitalPin[] = { |
|||
PA_0, // Digital pin 0
|
|||
PA_1, // Digital pin 1
|
|||
PA_2, // Digital pin 2
|
|||
PA_3, // Digital pin 3
|
|||
PA_4, // Digital pin 4
|
|||
PA_5, // Digital pin 5
|
|||
PA_6, // Digital pin 6
|
|||
PA_7, // Digital pin 7
|
|||
PA_8, // Digital pin 8
|
|||
PA_9, // Digital pin 9
|
|||
PA_10, // Digital pin 10
|
|||
PA_11, // Digital pin 11
|
|||
PA_12, // Digital pin 12
|
|||
PA_13, // Digital pin 13
|
|||
PA_14, // Digital pin 14
|
|||
PA_15, // Digital pin 15
|
|||
|
|||
PB_0, // Digital pin 16
|
|||
PB_1, // Digital pin 17
|
|||
PB_2, // Digital pin 18
|
|||
PB_3, // Digital pin 19
|
|||
PB_4, // Digital pin 20
|
|||
PB_5, // Digital pin 21
|
|||
PB_6, // Digital pin 22
|
|||
PB_7, // Digital pin 23
|
|||
PB_8, // Digital pin 24
|
|||
PB_9, // Digital pin 25
|
|||
PB_10, // Digital pin 26
|
|||
PB_11, // Digital pin 27
|
|||
PB_12, // Digital pin 28
|
|||
PB_13, // Digital pin 29
|
|||
PB_14, // Digital pin 30
|
|||
PB_15, // Digital pin 31
|
|||
|
|||
PC_0, // Digital pin 32
|
|||
PC_1, // Digital pin 33
|
|||
PC_2, // Digital pin 34
|
|||
PC_3, // Digital pin 35
|
|||
PC_4, // Digital pin 36
|
|||
PC_5, // Digital pin 37
|
|||
PC_6, // Digital pin 38
|
|||
PC_7, // Digital pin 39
|
|||
PC_8, // Digital pin 40
|
|||
PC_9, // Digital pin 41
|
|||
PC_10, // Digital pin 42
|
|||
PC_11, // Digital pin 43
|
|||
PC_12, // Digital pin 44
|
|||
PC_13, // Digital pin 45
|
|||
PC_14, // Digital pin 46
|
|||
PC_15, // Digital pin 47
|
|||
|
|||
PD_0, // Digital pin 48
|
|||
PD_1, // Digital pin 49
|
|||
PD_2, // Digital pin 50
|
|||
PD_3, // Digital pin 51
|
|||
PD_4, // Digital pin 52
|
|||
PD_5, // Digital pin 53
|
|||
PD_6, // Digital pin 54
|
|||
PD_7, // Digital pin 55
|
|||
PD_8, // Digital pin 56
|
|||
PD_9, // Digital pin 57
|
|||
PD_10, // Digital pin 58
|
|||
PD_11, // Digital pin 59
|
|||
PD_12, // Digital pin 60
|
|||
PD_13, // Digital pin 61
|
|||
PD_14, // Digital pin 62
|
|||
PD_15, // Digital pin 63
|
|||
|
|||
PE_0, // Digital pin 64
|
|||
PE_1, // Digital pin 65
|
|||
PE_2, // Digital pin 66
|
|||
PE_3, // Digital pin 67
|
|||
PE_4, // Digital pin 68
|
|||
PE_5, // Digital pin 69
|
|||
PE_6, // Digital pin 70
|
|||
PE_7, // Digital pin 71
|
|||
PE_8, // Digital pin 72
|
|||
PE_9, // Digital pin 73
|
|||
PE_10, // Digital pin 74
|
|||
PE_11, // Digital pin 75
|
|||
PE_12, // Digital pin 76
|
|||
PE_13, // Digital pin 77
|
|||
PE_14, // Digital pin 78
|
|||
PE_15, // Digital pin 79
|
|||
|
|||
PH_0, // Digital pin 80, used by the external oscillator
|
|||
PH_1 // Digital pin 81, used by the external oscillator
|
|||
}; |
|||
|
|||
// Analog (Ax) pin number array
|
|||
const uint32_t analogInputPin[] = { |
|||
0, // A0, PA0
|
|||
1, // A1, PA1
|
|||
2, // A2, PA2
|
|||
3, // A3, PA3
|
|||
4, // A4, PA4
|
|||
5, // A5, PA5
|
|||
6, // A6, PA6
|
|||
7, // A7, PA7
|
|||
16, // A8, PB0
|
|||
17, // A9, PB1
|
|||
32, // A10, PC0
|
|||
33, // A11, PC1
|
|||
34, // A12, PC2
|
|||
35, // A13, PC3
|
|||
36, // A14, PC4
|
|||
37 // A15, PC5
|
|||
}; |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
// ----------------------------------------------------------------------------
|
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/*
|
|||
* @brief Configures the System clock source, PLL Multiplier and Divider factors, |
|||
* AHB/APBx prescalers and Flash settings |
|||
* @note This function should be called only once the RCC clock configuration |
|||
* is reset to the default reset state (done in SystemInit() function). |
|||
* @param None |
|||
* @retval None |
|||
*/ |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSE) used as System clock source */ |
|||
/******************************************************************************/ |
|||
static uint8_t SetSysClock_PLL_HSE(uint8_t bypass) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct; |
|||
|
|||
/* The voltage scaling allows optimizing the power consumption when the device is
|
|||
clocked below the maximum system frequency, to update the voltage scaling value |
|||
regarding system frequency refer to product datasheet. */ |
|||
__HAL_RCC_PWR_CLK_ENABLE(); |
|||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
|||
|
|||
// Enable HSE oscillator and activate PLL with HSE as source
|
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
|||
if (bypass == 0) { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|||
} else { |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|||
} |
|||
|
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
|||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not
|
|||
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
|||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
|
|||
RCC_OscInitStruct.PLL.PLLQ = 7; |
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
|||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
|
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
|
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Output clock on MCO1 pin(PA8) for debugging purpose */ |
|||
/*
|
|||
if (bypass == 0) |
|||
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
|
|||
else |
|||
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
|
|||
*/ |
|||
|
|||
return 1; // OK
|
|||
} |
|||
|
|||
/******************************************************************************/ |
|||
/* PLL (clocked by HSI) used as System clock source */ |
|||
/******************************************************************************/ |
|||
uint8_t SetSysClock_PLL_HSI(void) |
|||
{ |
|||
RCC_OscInitTypeDef RCC_OscInitStruct; |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct; |
|||
|
|||
/* The voltage scaling allows optimizing the power consumption when the device is
|
|||
clocked below the maximum system frequency, to update the voltage scaling value |
|||
regarding system frequency refer to product datasheet. */ |
|||
__HAL_RCC_PWR_CLK_ENABLE(); |
|||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
|||
|
|||
// Enable HSI oscillator and activate PLL with HSI as source
|
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; |
|||
RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
|||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
|||
RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16)
|
|||
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
|||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
|
|||
RCC_OscInitStruct.PLL.PLLQ = 7; |
|||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
|||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
|
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
|
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { |
|||
return 0; // FAIL
|
|||
} |
|||
|
|||
/* Output clock on MCO1 pin(PA8) for debugging purpose */ |
|||
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
|||
|
|||
return 1; // OK
|
|||
} |
|||
|
|||
WEAK void SystemClock_Config(void) |
|||
{ |
|||
/* 1- If fail try to start with HSE and external xtal */ |
|||
if (SetSysClock_PLL_HSE(0) == 0) { |
|||
/* 2- Try to start with HSE and external clock */ |
|||
if (SetSysClock_PLL_HSE(1) == 0) { |
|||
/* 3- If fail start with HSI clock */ |
|||
if (SetSysClock_PLL_HSI() == 0) { |
|||
Error_Handler(); |
|||
} |
|||
} |
|||
} |
|||
|
|||
/* Ensure CCM RAM clock is enabled */ |
|||
__HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); |
|||
|
|||
/* Output clock on MCO2 pin(PC9) for debugging purpose */ |
|||
//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
|
|||
} |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,203 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#ifndef _VARIANT_ARDUINO_STM32_ |
|||
#define _VARIANT_ARDUINO_STM32_ |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif // __cplusplus
|
|||
|
|||
/*----------------------------------------------------------------------------
|
|||
* Pins |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
// | DIGITAL | ANALOG IN | ANALOG OUT | UART/USART | TWI | SPI | SPECIAL |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PA0 PIN_A0 // | 0 | A0 (ADC1) | | UART4_TX | | | |
|
|||
#define PA1 PIN_A1 // | 1 | A1 (ADC1) | | UART4_RX | | | |
|
|||
#define PA2 PIN_A2 // | 2 | A2 (ADC1) | | USART2_TX | | | |
|
|||
#define PA3 PIN_A3 // | 3 | A3 (ADC1) | | USART2_RX | | | |
|
|||
#define PA4 PIN_A4 // | 4 | A4 (ADC1) | DAC_OUT1 | | | SPI1_SS, (SPI3_SS) | |
|
|||
#define PA5 PIN_A5 // | 5 | A5 (ADC1) | DAC_OUT2 | | | SPI1_SCK | |
|
|||
#define PA6 PIN_A6 // | 6 | A6 (ADC1) | | | | SPI1_MISO | |
|
|||
#define PA7 PIN_A7 // | 7 | A7 (ADC1) | | | | SPI1_MOSI | |
|
|||
#define PA8 8 // | 8 | | | | TWI3_SCL | | |
|
|||
#define PA9 9 // | 9 | | | USART1_TX | | | |
|
|||
#define PA10 10 // | 10 | | | USART1_RX | | | |
|
|||
#define PA11 11 // | 11 | | | | | | |
|
|||
#define PA12 12 // | 12 | | | | | | |
|
|||
#define PA13 13 // | 13 | | | | | | SWD_SWDIO |
|
|||
#define PA14 14 // | 14 | | | | | | SWD_SWCLK |
|
|||
#define PA15 15 // | 15 | | | | | SPI3_SS, (SPI1_SS) | |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PB0 PIN_A8 // | 16 | A8 (ADC1) | | | | | |
|
|||
#define PB1 PIN_A9 // | 17 | A9 (ADC1) | | | | | |
|
|||
#define PB2 18 // | 18 | | | | | | BOOT1 |
|
|||
#define PB3 19 // | 19 | | | | | SPI3_SCK, (SPI1_SCK) | |
|
|||
#define PB4 20 // | 20 | | | | | SPI3_MISO, (SPI1_MISO) | |
|
|||
#define PB5 21 // | 21 | | | | | SPI3_MOSI, (SPI1_MOSI) | |
|
|||
#define PB6 22 // | 22 | | | USART1_TX | TWI1_SCL | | |
|
|||
#define PB7 23 // | 23 | | | USART1_RX | TWI1_SDA | | |
|
|||
#define PB8 24 // | 24 | | | | TWI1_SCL | | |
|
|||
#define PB9 25 // | 25 | | | | TWI1_SDA | SPI2_SS | |
|
|||
#define PB10 26 // | 26 | | | USART3_TX, (UART4_TX) | TWI2_SCL | SPI2_SCK | |
|
|||
#define PB11 27 // | 27 | | | USART3_RX | TWI2_SDA | | |
|
|||
#define PB12 28 // | 28 | | | | | SPI2_SS | |
|
|||
#define PB13 29 // | 29 | | | | | SPI2_SCK | |
|
|||
#define PB14 30 // | 30 | | | | | SPI2_MISO | |
|
|||
#define PB15 31 // | 31 | | | | | SPI2_MOSI | |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PC0 PIN_A10 // | 32 | A10 (ADC1) | | | | | |
|
|||
#define PC1 PIN_A11 // | 33 | A11 (ADC1) | | | | | |
|
|||
#define PC2 PIN_A12 // | 34 | A12 (ADC1) | | | | SPI2_MISO | |
|
|||
#define PC3 PIN_A13 // | 35 | A13 (ADC1) | | | | SPI2_MOSI | |
|
|||
#define PC4 PIN_A14 // | 36 | A14 (ADC1) | | | | | |
|
|||
#define PC5 PIN_A15 // | 37 | A15 (ADC1) | | USART3_RX | | | |
|
|||
#define PC6 38 // | 38 | | | USART6_TX | | | |
|
|||
#define PC7 39 // | 39 | | | USART6_RX | | | |
|
|||
#define PC8 40 // | 40 | | | | | | |
|
|||
#define PC9 41 // | 41 | | | USART3_TX | TWI3_SDA | | |
|
|||
#define PC10 42 // | 42 | | | | | SPI3_SCK | |
|
|||
#define PC11 43 // | 43 | | | USART3_RX, (UART4_RX) | | SPI3_MISO | |
|
|||
#define PC12 44 // | 44 | | | UART5_TX | | SPI3_MOSI | |
|
|||
#define PC13 45 // | 45 | | | | | | |
|
|||
#define PC14 46 // | 46 | | | | | | OSC32_IN |
|
|||
#define PC15 47 // | 47 | | | | | | OSC32_OUT |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PD0 48 // | 48 | | | | | | |
|
|||
#define PD1 49 // | 49 | | | | | | |
|
|||
#define PD2 50 // | 50 | | | UART5_RX | | | |
|
|||
#define PD3 51 // | 51 | | | | | | |
|
|||
#define PD4 52 // | 52 | | | | | | |
|
|||
#define PD5 53 // | 53 | | | USART2_TX | | | |
|
|||
#define PD6 54 // | 54 | | | USART2_RX | | | |
|
|||
#define PD7 55 // | 55 | | | | | | |
|
|||
#define PD8 56 // | 56 | | | USART3_TX | | | |
|
|||
#define PD9 57 // | 57 | | | USART3_RX | | | |
|
|||
#define PD10 58 // | 58 | | | | | | |
|
|||
#define PD11 59 // | 59 | | | | | | |
|
|||
#define PD12 60 // | 60 | | | | | | |
|
|||
#define PD13 61 // | 61 | | | | | | |
|
|||
#define PD14 62 // | 62 | | | | | | |
|
|||
#define PD15 63 // | 63 | | | | | | |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PE0 64 // | 64 | | | | | | |
|
|||
#define PE1 65 // | 65 | | | | | | |
|
|||
#define PE2 66 // | 66 | | | | | | |
|
|||
#define PE3 67 // | 67 | | | | | | |
|
|||
#define PE4 68 // | 68 | | | | | | |
|
|||
#define PE5 69 // | 69 | | | | | | |
|
|||
#define PE6 70 // | 70 | | | | | | |
|
|||
#define PE7 71 // | 71 | | | | | | |
|
|||
#define PE8 72 // | 72 | | | | | | |
|
|||
#define PE9 73 // | 73 | | | | | | |
|
|||
#define PE10 74 // | 74 | | | | | | |
|
|||
#define PE11 75 // | 75 | | | | | | |
|
|||
#define PE12 76 // | 76 | | | | | | |
|
|||
#define PE13 77 // | 77 | | | | | | |
|
|||
#define PE14 78 // | 78 | | | | | | |
|
|||
#define PE15 79 // | 79 | | | | | | |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
#define PH0 80 // | 80 | | | | | | OSC_IN |
|
|||
#define PH1 81 // | 81 | | | | | | OSC_OUT |
|
|||
// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
|
|||
|
|||
/// This must be a literal
|
|||
#define NUM_DIGITAL_PINS 82 |
|||
#define NUM_ANALOG_INPUTS 16 |
|||
|
|||
// On-board LED pin number
|
|||
#ifndef LED_BUILTIN |
|||
#define LED_BUILTIN PA5 |
|||
#endif |
|||
#define LED_GREEN LED_BUILTIN |
|||
|
|||
// On-board user button
|
|||
#ifndef USER_BTN |
|||
#define USER_BTN PC13 |
|||
#endif |
|||
|
|||
// SPI definitions
|
|||
#define PIN_SPI_SS PA4 |
|||
#define PIN_SPI_SS1 PA4 |
|||
#define PIN_SPI_SS2 PB12 |
|||
#define PIN_SPI_SS3 PA15 |
|||
#define PIN_SPI_MOSI PA7 |
|||
#define PIN_SPI_MISO PA6 |
|||
#define PIN_SPI_SCK PA5 |
|||
|
|||
// I2C definitions
|
|||
#ifndef PIN_WIRE_SDA |
|||
#define PIN_WIRE_SDA PB9 |
|||
#endif |
|||
#ifndef PIN_WIRE_SCL |
|||
#define PIN_WIRE_SCL PB8 |
|||
#endif |
|||
|
|||
// Timer Definitions
|
|||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
|||
#ifndef TIMER_TONE |
|||
#define TIMER_TONE TIM6 |
|||
#endif |
|||
#ifndef TIMER_SERVO |
|||
#define TIMER_SERVO TIM7 |
|||
#endif |
|||
#ifndef TIMER_SERIAL |
|||
#define TIMER_SERIAL TIM5 |
|||
#endif |
|||
|
|||
// UART Definitions
|
|||
#define SERIAL_UART_INSTANCE 2 |
|||
|
|||
// Default pin used for 'Serial' instance
|
|||
// Mandatory for Firmata
|
|||
#define PIN_SERIAL_RX PA3 |
|||
#define PIN_SERIAL_TX PA2 |
|||
|
|||
/* Extra HAL modules */ |
|||
#define HAL_DAC_MODULE_ENABLED |
|||
|
|||
#ifdef __cplusplus |
|||
} // extern "C"
|
|||
#endif |
|||
/*----------------------------------------------------------------------------
|
|||
* Arduino objects - C++ only |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
#ifdef __cplusplus |
|||
// These serial port names are intended to allow libraries and architecture-neutral
|
|||
// sketches to automatically default to the correct port name for a particular type
|
|||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
|||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
|||
//
|
|||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
|||
//
|
|||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
|||
//
|
|||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
|||
// pins are NOT connected to anything by default.
|
|||
#define SERIAL_PORT_MONITOR Serial |
|||
#define SERIAL_PORT_HARDWARE Serial1 |
|||
#endif |
|||
|
|||
#endif /* _VARIANT_ARDUINO_STM32_ */ |
|||
@ -0,0 +1,361 @@ |
|||
/*
|
|||
******************************************************************************* |
|||
* Copyright (c) 2016, STMicroelectronics |
|||
* All rights reserved. |
|||
* |
|||
* Redistribution and use in source and binary forms, with or without |
|||
* modification, are permitted provided that the following conditions are met: |
|||
* |
|||
* 1. Redistributions of source code must retain the above copyright notice, |
|||
* this list of conditions and the following disclaimer. |
|||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
* this list of conditions and the following disclaimer in the documentation |
|||
* and/or other materials provided with the distribution. |
|||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
|||
* may be used to endorse or promote products derived from this software |
|||
* without specific prior written permission. |
|||
* |
|||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
******************************************************************************* |
|||
*/ |
|||
#include "Arduino.h" |
|||
#include "PeripheralPins.h" |
|||
|
|||
// =====
|
|||
// Note: Commented lines are alternative possibilities which are not used per default.
|
|||
// If you change them, you will have to know what you do
|
|||
// =====
|
|||
|
|||
|
|||
//*** ADC ***
|
|||
|
|||
#ifdef HAL_ADC_MODULE_ENABLED |
|||
const PinMap PinMap_ADC[] = { |
|||
// {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
|
|||
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
|
|||
// {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
|
|||
// {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
|
|||
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
|
|||
// {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
|
|||
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
|
|||
// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
|
|||
// {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
|
|||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
|
|||
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
|
|||
// {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
|
|||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
|
|||
// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
|
|||
// {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
|
|||
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
|
|||
// {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
|
|||
// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
|
|||
// {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
|
|||
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
|
|||
// {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
|
|||
// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
|
|||
// {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
|
|||
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
|
|||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
|
|||
// {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
|
|||
// {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
|
|||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
|
|||
// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
|
|||
// {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
|
|||
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
|
|||
// {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
|
|||
// {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
|
|||
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
|
|||
// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
|
|||
// {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
|
|||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
|
|||
// {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
|
|||
// {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
|
|||
// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** DAC ***
|
|||
|
|||
#ifdef HAL_DAC_MODULE_ENABLED |
|||
const PinMap PinMap_DAC[] = { |
|||
// {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
|
|||
// {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 - LD2
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** I2C ***
|
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
const PinMap PinMap_I2C_SDA[] = { |
|||
// {PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
|||
// {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
|||
// {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
|||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
// {PC_7, FMPI2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
|||
// {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
|||
// {PC_12, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
const PinMap PinMap_I2C_SCL[] = { |
|||
// {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
|||
// {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
|||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
|||
// {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
|||
// {PC_6, FMPI2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** PWM ***
|
|||
|
|||
#ifdef HAL_TIM_MODULE_ENABLED |
|||
const PinMap PinMap_PWM[] = { |
|||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
|||
// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
|||
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - STLink Tx
|
|||
// {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 - STLink Tx
|
|||
// {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 - STLink Tx
|
|||
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - STLink Rx
|
|||
// {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - STLink Rx
|
|||
// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 - STLink Rx
|
|||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
|||
{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
|||
// {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
//{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
|||
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
// {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
// {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
|||
// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
|||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
|||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
|||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
|||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // Fan0, TIM8_CH2N
|
|||
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // Fan1, TIM8_CH3N
|
|||
{PB_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // Fan2, TIM2_CH4
|
|||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // E0 Heater, TIM2_CH2
|
|||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // E1 Heater, TIM3_CH1
|
|||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // LED G, TIM3_CH2
|
|||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // LED R, TIM4_CH1
|
|||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // LED B, TIM4_CH2
|
|||
// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
|
|||
// {PB_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
|||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
|||
{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
|
|||
// {PB_9, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
|||
// {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
|||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
|||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
|||
{PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
|
|||
// {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
// {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
|||
{PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
|
|||
// {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
|||
// {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
|||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
|||
// {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
|||
// {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
|||
{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
|||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
|||
// {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
|||
// {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
|||
{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
|||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
|||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
|||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SERIAL ***
|
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
const PinMap PinMap_UART_TX[] = { |
|||
// {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
// {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
|||
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
// {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
// {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
|||
// {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
|||
// {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
// {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
const PinMap PinMap_UART_RX[] = { |
|||
// {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
// {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
|||
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
|||
// {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
// {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
|||
// {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
|||
// {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
|||
// {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
const PinMap PinMap_UART_RTS[] = { |
|||
// {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
|||
// {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
// {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
// {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
|||
// {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_UART_MODULE_ENABLED |
|||
const PinMap PinMap_UART_CTS[] = { |
|||
// {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
|||
// {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
|||
// {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
|||
// {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
|||
// {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** SPI ***
|
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
const PinMap PinMap_SPI_MOSI[] = { |
|||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
|||
// {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
|||
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
// {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
|
|||
// {PC_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
|
|||
// {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
const PinMap PinMap_SPI_MISO[] = { |
|||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
// {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
const PinMap PinMap_SPI_SCLK[] = { |
|||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
// {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_7, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_SPI_MODULE_ENABLED |
|||
const PinMap PinMap_SPI_SSEL[] = { |
|||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
|||
// {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
|||
// {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
|||
// {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
|
|||
// {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
// {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** CAN ***
|
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
const PinMap PinMap_CAN_RD[] = { |
|||
// {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
|||
// {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
|||
// {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
|||
// {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_CAN_MODULE_ENABLED |
|||
const PinMap PinMap_CAN_TD[] = { |
|||
// {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
|||
// {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
|||
// {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
|||
// {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** ETHERNET ***
|
|||
|
|||
//*** No Ethernet ***
|
|||
|
|||
//*** QUADSPI ***
|
|||
|
|||
#ifdef HAL_QSPI_MODULE_ENABLED |
|||
const PinMap PinMap_QUADSPI[] = { |
|||
// {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
|
|||
// {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_CLK
|
|||
// {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS
|
|||
// {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
|
|||
// {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
|
|||
// {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK2_NCS
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
//*** USB ***
|
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
const PinMap PinMap_USB_OTG_FS[] = { |
|||
// {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
|
|||
// {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)}, // USB_OTG_FS_VBUS
|
|||
// {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
|
|||
{PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
|
|||
{PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
|
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
const PinMap PinMap_USB_OTG_HS[] = { |
|||
{NC, NP, 0} |
|||
}; |
|||
#endif |
|||
|
|||
|
|||
@ -0,0 +1,30 @@ |
|||
/* SYS_WKUP */ |
|||
#ifdef PWR_WAKEUP_PIN1 |
|||
SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN2 |
|||
SYS_WKUP2 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN3 |
|||
SYS_WKUP3 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN4 |
|||
SYS_WKUP4 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN5 |
|||
SYS_WKUP5 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN6 |
|||
SYS_WKUP6 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN7 |
|||
SYS_WKUP7 = NC, |
|||
#endif |
|||
#ifdef PWR_WAKEUP_PIN8 |
|||
SYS_WKUP8 = NC, |
|||
#endif |
|||
/* USB */ |
|||
#ifdef USBCON |
|||
USB_OTG_FS_DM = PA_11, |
|||
USB_OTG_FS_DP = PA_12, |
|||
#endif |
|||
@ -0,0 +1,187 @@ |
|||
/* |
|||
***************************************************************************** |
|||
** |
|||
|
|||
** File : LinkerScript.ld |
|||
** |
|||
** Abstract : Linker script for STM32F407VETx Device with |
|||
** 512KByte FLASH, 128KByte RAM |
|||
** |
|||
** Set heap size, stack size and stack location according |
|||
** to application requirements. |
|||
** |
|||
** Set memory bank area and size if external memory is used. |
|||
** |
|||
** Target : STMicroelectronics STM32 |
|||
** |
|||
** |
|||
** Distribution: The file is distributed as is, without any warranty |
|||
** of any kind. |
|||
** |
|||
***************************************************************************** |
|||
** @attention |
|||
** |
|||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2> |
|||
** |
|||
** Redistribution and use in source and binary forms, with or without modification, |
|||
** are permitted provided that the following conditions are met: |
|||
** 1. Redistributions of source code must retain the above copyright notice, |
|||
** this list of conditions and the following disclaimer. |
|||
** 2. Redistributions in binary form must reproduce the above copyright notice, |
|||
** this list of conditions and the following disclaimer in the documentation |
|||
** and/or other materials provided with the distribution. |
|||
** 3. Neither the name of Ac6 nor the names of its contributors |
|||
** may be used to endorse or promote products derived from this software |
|||
** without specific prior written permission. |
|||
** |
|||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
|||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
|||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
|||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
|||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
|||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
|||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
|||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
** |
|||
***************************************************************************** |
|||
*/ |
|||
|
|||
/* Entry Point */ |
|||
ENTRY(Reset_Handler) |
|||
|
|||
/* Highest address of the user mode stack */ |
|||
_estack = 0x20020000; /* end of RAM */ |
|||
/* Generate a link error if heap and stack don't fit into RAM */ |
|||
_Min_Heap_Size = 0x200;; /* required amount of heap */ |
|||
_Min_Stack_Size = 0x400;; /* required amount of stack */ |
|||
|
|||
/* Specify the memory areas */ |
|||
MEMORY |
|||
{ |
|||
FLASH (rx) : ORIGIN = 0x8010000, LENGTH = 512K |
|||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K |
|||
} |
|||
|
|||
/* Define output sections */ |
|||
SECTIONS |
|||
{ |
|||
/* The startup code goes first into FLASH */ |
|||
.isr_vector : |
|||
{ |
|||
. = ALIGN(4); |
|||
KEEP(*(.isr_vector)) /* Startup code */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
/* The program code and other data goes into FLASH */ |
|||
.text ALIGN(4): |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.text) /* .text sections (code) */ |
|||
*(.text*) /* .text* sections (code) */ |
|||
*(.glue_7) /* glue arm to thumb code */ |
|||
*(.glue_7t) /* glue thumb to arm code */ |
|||
*(.eh_frame) |
|||
|
|||
KEEP (*(.init)) |
|||
KEEP (*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; /* define a global symbols at end of code */ |
|||
} >FLASH |
|||
|
|||
/* Constant data goes into FLASH */ |
|||
.rodata ALIGN(4): |
|||
{ |
|||
. = ALIGN(4); |
|||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
|||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
|||
. = ALIGN(4); |
|||
} >FLASH |
|||
|
|||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH |
|||
.ARM : { |
|||
__exidx_start = .; |
|||
*(.ARM.exidx*) |
|||
__exidx_end = .; |
|||
} >FLASH |
|||
|
|||
.preinit_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__preinit_array_start = .); |
|||
KEEP (*(.preinit_array*)) |
|||
PROVIDE_HIDDEN (__preinit_array_end = .); |
|||
} >FLASH |
|||
.init_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__init_array_start = .); |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array*)) |
|||
PROVIDE_HIDDEN (__init_array_end = .); |
|||
} >FLASH |
|||
.fini_array : |
|||
{ |
|||
PROVIDE_HIDDEN (__fini_array_start = .); |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
KEEP (*(.fini_array*)) |
|||
PROVIDE_HIDDEN (__fini_array_end = .); |
|||
} >FLASH |
|||
|
|||
/* used by the startup to initialize data */ |
|||
_sidata = LOADADDR(.data); |
|||
|
|||
/* Initialized data sections goes into RAM, load LMA copy after code */ |
|||
.data : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sdata = .; /* create a global symbol at data start */ |
|||
*(.data) /* .data sections */ |
|||
*(.data*) /* .data* sections */ |
|||
|
|||
. = ALIGN(4); |
|||
_edata = .; /* define a global symbol at data end */ |
|||
} >RAM AT> FLASH |
|||
|
|||
/*_siccmram = LOADADDR(.ccmram);*/ |
|||
|
|||
/* Uninitialized data section */ |
|||
. = ALIGN(4); |
|||
.bss : |
|||
{ |
|||
/* This is used by the startup in order to initialize the .bss secion */ |
|||
_sbss = .; /* define a global symbol at bss start */ |
|||
__bss_start__ = _sbss; |
|||
*(.bss) |
|||
*(.bss*) |
|||
*(COMMON) |
|||
|
|||
. = ALIGN(4); |
|||
_ebss = .; /* define a global symbol at bss end */ |
|||
__bss_end__ = _ebss; |
|||
} >RAM |
|||
|
|||
/* User_heap_stack section, used to check that there is enough RAM left */ |
|||
._user_heap_stack : |
|||
{ |
|||
. = ALIGN(4); |
|||
PROVIDE ( end = . ); |
|||
PROVIDE ( _end = . ); |
|||
. = . + _Min_Heap_Size; |
|||
. = . + _Min_Stack_Size; |
|||
. = ALIGN(4); |
|||
} >RAM |
|||
|
|||
/* Remove information from the standard libraries */ |
|||
/DISCARD/ : |
|||
{ |
|||
libc.a ( * ) |
|||
libm.a ( * ) |
|||
libgcc.a ( * ) |
|||
} |
|||
|
|||
.ARM.attributes 0 : { *(.ARM.attributes) } |
|||
} |
|||
|
|||
|
|||
@ -0,0 +1,201 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#include "pins_arduino.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
// Pin number
|
|||
const PinName digitalPin[] = { |
|||
PA_0, //D0
|
|||
PA_1, //D1
|
|||
PA_2, //D2
|
|||
PA_3, //D3
|
|||
PA_4, //D4
|
|||
PA_5, //D5
|
|||
PA_6, //D6
|
|||
PA_7, //D7
|
|||
PA_8, //D8
|
|||
PA_9, //D9
|
|||
PA_10, //D10
|
|||
PA_11, //D11
|
|||
PA_12, //D12
|
|||
PA_13, //D13
|
|||
PA_14, //D14
|
|||
PA_15, //D15
|
|||
PB_0, //D16
|
|||
PB_1, //D17
|
|||
PB_2, //D18
|
|||
PB_3, //D19
|
|||
PB_4, //D20
|
|||
PB_5, //D21
|
|||
PB_6, //D22
|
|||
PB_7, //D23
|
|||
PB_8, //D24
|
|||
PB_9, //D25
|
|||
PB_10, //D26
|
|||
PB_11, //D27
|
|||
PB_12, //D28
|
|||
PB_13, //D29
|
|||
PB_14, //D30
|
|||
PB_15, //D31
|
|||
PC_0, //D32
|
|||
PC_1, //D33
|
|||
PC_2, //D34
|
|||
PC_3, //D35
|
|||
PC_4, //D36
|
|||
PC_5, //D37
|
|||
PC_6, //D38
|
|||
PC_7, //D39
|
|||
PC_8, //D40
|
|||
PC_9, //D41
|
|||
PC_10, //D42
|
|||
PC_11, //D43
|
|||
PC_12, //D44
|
|||
PC_13, //D45
|
|||
PC_14, //D46
|
|||
PC_15, //D47
|
|||
PD_0, //D48
|
|||
PD_1, //D49
|
|||
PD_2, //D50
|
|||
PD_3, //D51
|
|||
PD_4, //D52
|
|||
PD_5, //D53
|
|||
PD_6, //D54
|
|||
PD_7, //D55
|
|||
PD_8, //D56
|
|||
PD_9, //D57
|
|||
PD_10, //D58
|
|||
PD_11, //D59
|
|||
PD_12, //D60
|
|||
PD_13, //D61
|
|||
PD_14, //D62
|
|||
PD_15, //D63
|
|||
PE_0, //D64
|
|||
PE_1, //D65
|
|||
PE_2, //D66
|
|||
PE_3, //D67
|
|||
PE_4, //D68
|
|||
PE_5, //D69
|
|||
PE_6, //D70
|
|||
PE_7, //D71
|
|||
PE_8, //D72
|
|||
PE_9, //D73
|
|||
PE_10, //D74
|
|||
PE_11, //D75
|
|||
PE_12, //D76
|
|||
PE_13, //D77
|
|||
PE_14, //D78
|
|||
PE_15, //D79
|
|||
|
|||
//Duplicated ADC Pins
|
|||
PA_3, //D80/A0
|
|||
PA_4, //D81/A1
|
|||
PC_0, //D82/A2
|
|||
PC_1, //D83/A3
|
|||
PC_2, //D84/A4
|
|||
PC_3, //D85/A5
|
|||
PC_4 //D86/A6
|
|||
}; |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
// ----------------------------------------------------------------------------
|
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/**
|
|||
* @brief System Clock Configuration |
|||
* The system Clock is configured as follow : |
|||
* System Clock source = PLL (HSE) |
|||
* SYSCLK(Hz) = 180000000 |
|||
* HCLK(Hz) = 180000000 |
|||
* AHB Prescaler = 1 |
|||
* APB1 Prescaler = 4 |
|||
* APB2 Prescaler = 2 |
|||
* HSE Frequency(Hz) = 12000000 |
|||
* PLL_M = 6 |
|||
* PLL_N = 180 |
|||
* PLL_P = 2 |
|||
* PLL_Q = 7 |
|||
* VDD(V) = 3.3 |
|||
* Main regulator output voltage = Scale1 mode |
|||
* Flash Latency(WS) = 5 |
|||
* @param None |
|||
* @retval None |
|||
*/ |
|||
WEAK void SystemClock_Config(void) |
|||
{ |
|||
RCC_ClkInitTypeDef RCC_ClkInitStruct; |
|||
RCC_OscInitTypeDef RCC_OscInitStruct; |
|||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; |
|||
|
|||
|
|||
/* Enable Power Control clock */ |
|||
__HAL_RCC_PWR_CLK_ENABLE(); |
|||
|
|||
#ifdef HAL_PWR_MODULE_ENABLED |
|||
/* The voltage scaling allows optimizing the power consumption when the device is
|
|||
clocked below the maximum system frequency, to update the voltage scaling value |
|||
regarding system frequency refer to product datasheet. */ |
|||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
|||
#endif |
|||
|
|||
/* Enable HSE Oscillator and activate PLL with HSE as source */ |
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
|||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
|||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
|||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
|||
RCC_OscInitStruct.PLL.PLLM = 6; |
|||
RCC_OscInitStruct.PLL.PLLN = 180; |
|||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; |
|||
RCC_OscInitStruct.PLL.PLLQ = 7; |
|||
RCC_OscInitStruct.PLL.PLLR = 2; |
|||
HAL_RCC_OscConfig(&RCC_OscInitStruct); |
|||
|
|||
HAL_PWREx_EnableOverDrive(); |
|||
|
|||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
|||
clocks dividers */ |
|||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | |
|||
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
|||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLRCLK; |
|||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
|||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; |
|||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; |
|||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); |
|||
|
|||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; |
|||
PeriphClkInitStruct.PLLSAI.PLLSAIM = 6; |
|||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 96; |
|||
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2; |
|||
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4; |
|||
PeriphClkInitStruct.PLLSAIDivQ = 1; |
|||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; |
|||
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
|||
} |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,184 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
#ifndef _VARIANT_ARDUINO_STM32_ |
|||
#define _VARIANT_ARDUINO_STM32_ |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif // __cplusplus
|
|||
|
|||
/*----------------------------------------------------------------------------
|
|||
* Pins |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
#define PA0 0 //D0
|
|||
#define PA1 1 //D1
|
|||
#define PA2 2 //D2
|
|||
#define PA3 3 //D3
|
|||
#define PA4 4 //D4
|
|||
#define PA5 5 //D5
|
|||
#define PA6 6 //D6
|
|||
#define PA7 7 //D7
|
|||
#define PA8 8 //D8
|
|||
#define PA9 9 //D9
|
|||
#define PA10 10 //D10
|
|||
#define PA11 11 //D11
|
|||
#define PA12 12 //D12
|
|||
#define PA13 13 //D13
|
|||
#define PA14 14 //D14
|
|||
#define PA15 15 //D15
|
|||
#define PB0 16 //D16
|
|||
#define PB1 17 //D17
|
|||
#define PB2 18 //D18
|
|||
#define PB3 19 //D19
|
|||
#define PB4 20 //D20
|
|||
#define PB5 21 //D21
|
|||
#define PB6 22 //D22
|
|||
#define PB7 23 //D23
|
|||
#define PB8 24 //D24
|
|||
#define PB9 25 //D25
|
|||
#define PB10 26 //D26
|
|||
#define PB11 27 //D27
|
|||
#define PB12 28 //D28
|
|||
#define PB13 29 //D29
|
|||
#define PB14 30 //D30
|
|||
#define PB15 31 //D31
|
|||
#define PC0 32 //D32
|
|||
#define PC1 33 //D33
|
|||
#define PC2 34 //D34
|
|||
#define PC3 35 //D35
|
|||
#define PC4 36 //D36
|
|||
#define PC5 37 //D37
|
|||
#define PC6 38 //D38
|
|||
#define PC7 39 //D39
|
|||
#define PC8 40 //D40
|
|||
#define PC9 41 //D41
|
|||
#define PC10 42 //D42
|
|||
#define PC11 43 //D43
|
|||
#define PC12 44 //D44
|
|||
#define PC13 45 //D45
|
|||
#define PC14 46 //D46
|
|||
#define PC15 47 //D47
|
|||
#define PD0 48 //D48
|
|||
#define PD1 49 //D49
|
|||
#define PD2 50 //D50
|
|||
#define PD3 51 //D51
|
|||
#define PD4 52 //D52
|
|||
#define PD5 53 //D53
|
|||
#define PD6 54 //D54
|
|||
#define PD7 55 //D55
|
|||
#define PD8 56 //D56
|
|||
#define PD9 57 //D57
|
|||
#define PD10 58 //D58
|
|||
#define PD11 59 //D59
|
|||
#define PD12 60 //D60
|
|||
#define PD13 61 //D61
|
|||
#define PD14 62 //D62
|
|||
#define PD15 63 //D63
|
|||
#define PE0 64 //D64
|
|||
#define PE1 65 //D65
|
|||
#define PE2 66 //D66
|
|||
#define PE3 67 //D67
|
|||
#define PE4 68 //D68
|
|||
#define PE5 69 //D69
|
|||
#define PE6 70 //D70
|
|||
#define PE7 71 //D71
|
|||
#define PE8 72 //D72
|
|||
#define PE9 73 //D73
|
|||
#define PE10 74 //D74
|
|||
#define PE11 75 //D75
|
|||
#define PE12 76 //D76
|
|||
#define PE13 77 //D77
|
|||
#define PE14 78 //D78
|
|||
#define PE15 79 //D79
|
|||
|
|||
// This must be a literal with the same value as PEND
|
|||
#define NUM_DIGITAL_PINS 87 |
|||
// This must be a literal with a value less than or equal to to MAX_ANALOG_INPUTS
|
|||
#define NUM_ANALOG_INPUTS 7 |
|||
#define NUM_ANALOG_FIRST 80 |
|||
|
|||
//#define ADC_RESOLUTION 12
|
|||
|
|||
// PWM resolution
|
|||
//#define PWM_RESOLUTION 12
|
|||
#define PWM_FREQUENCY 20000 // >= 20 Khz => inaudible noise for fans
|
|||
#define PWM_MAX_DUTY_CYCLE 255 |
|||
|
|||
// SPI Definitions
|
|||
#define PIN_SPI_SS PA4 |
|||
#define PIN_SPI_MOSI PA7 |
|||
#define PIN_SPI_MISO PA6 |
|||
#define PIN_SPI_SCK PA5 |
|||
|
|||
// I2C Definitions
|
|||
#define PIN_WIRE_SDA PB9 |
|||
#define PIN_WIRE_SCL PB8 |
|||
|
|||
// Timer Definitions
|
|||
// Do not use timer used by PWM pin. See PinMap_PWM.
|
|||
#define TIMER_TONE TIM6 |
|||
#define TIMER_SERVO TIM5 |
|||
#define TIMER_SERIAL TIM7 |
|||
|
|||
// UART Definitions
|
|||
//#define SERIAL_UART_INSTANCE 1 // Connected to EXP3 header
|
|||
/* Enable Serial 3 */ |
|||
#define HAVE_HWSERIAL1 |
|||
#define HAVE_HWSERIAL3 |
|||
|
|||
// Default pin used for 'Serial' instance (ex: ST-Link)
|
|||
// Mandatory for Firmata
|
|||
#define PIN_SERIAL_RX PA10 |
|||
#define PIN_SERIAL_TX PA9 |
|||
|
|||
/* HAL configuration */ |
|||
#define HSE_VALUE 12000000U |
|||
|
|||
#define FLASH_PAGE_SIZE (4U * 1024U) |
|||
|
|||
#ifdef __cplusplus |
|||
} // extern "C"
|
|||
#endif |
|||
|
|||
/*----------------------------------------------------------------------------
|
|||
* Arduino objects - C++ only |
|||
*----------------------------------------------------------------------------*/ |
|||
|
|||
#ifdef __cplusplus |
|||
// These serial port names are intended to allow libraries and architecture-neutral
|
|||
// sketches to automatically default to the correct port name for a particular type
|
|||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
|||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
|||
//
|
|||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
|||
//
|
|||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
|||
//
|
|||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
|||
//
|
|||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
|||
// pins are NOT connected to anything by default.
|
|||
#define SERIAL_PORT_MONITOR Serial |
|||
#define SERIAL_PORT_HARDWARE_OPEN Serial |
|||
#endif |
|||
|
|||
#endif /* _VARIANT_ARDUINO_STM32_ */ |
|||
@ -0,0 +1,2 @@ |
|||
# Exception for libsam |
|||
!libsam_sam3x8e_gcc_rel.a |
|||
@ -0,0 +1,42 @@ |
|||
#
|
|||
# Copyright (c) 2011 Arduino. All right reserved.
|
|||
#
|
|||
# This library is free software; you can redistribute it and/or
|
|||
# modify it under the terms of the GNU Lesser General Public
|
|||
# License as published by the Free Software Foundation; either
|
|||
# version 2.1 of the License, or (at your option) any later version.
|
|||
#
|
|||
# This library is distributed in the hope that it will be useful,
|
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|||
# See the GNU Lesser General Public License for more details.
|
|||
#
|
|||
# You should have received a copy of the GNU Lesser General Public
|
|||
# License along with this library; if not, write to the Free Software
|
|||
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|||
#
|
|||
|
|||
SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Rules
|
|||
#-------------------------------------------------------------------------------
|
|||
|
|||
all: arduino_due_x |
|||
|
|||
.PHONY: arduino_due_x |
|||
arduino_due_x: |
|||
@echo ------------------------------------------------------------------------------------ |
|||
@echo --- Making variant arduino_due_x |
|||
@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk |
|||
# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk
|
|||
@echo ------------------------------------------------------------------------------------ |
|||
|
|||
.PHONY: clean |
|||
clean: |
|||
@echo ------------------------------------------------------------------------------------ |
|||
@echo --- Cleaning variant arduino_due_x |
|||
@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@ |
|||
# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@
|
|||
@echo ------------------------------------------------------------------------------------ |
|||
|
|||
@ -0,0 +1,25 @@ |
|||
#
|
|||
# Copyright (c) 2011 Arduino. All right reserved.
|
|||
#
|
|||
# This library is free software; you can redistribute it and/or
|
|||
# modify it under the terms of the GNU Lesser General Public
|
|||
# License as published by the Free Software Foundation; either
|
|||
# version 2.1 of the License, or (at your option) any later version.
|
|||
#
|
|||
# This library is distributed in the hope that it will be useful,
|
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|||
# See the GNU Lesser General Public License for more details.
|
|||
#
|
|||
# You should have received a copy of the GNU Lesser General Public
|
|||
# License along with this library; if not, write to the Free Software
|
|||
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|||
#
|
|||
|
|||
# Optimization level
|
|||
# -O1 Optimize
|
|||
# -O2 Optimize even more
|
|||
# -O3 Optimize yet more
|
|||
# -O0 Reduce compilation time and make debugging produce the expected results
|
|||
# -Os Optimize for size
|
|||
OPTIMIZATION = -g -O0 -DDEBUG |
|||
@ -0,0 +1,82 @@ |
|||
#
|
|||
# Copyright (c) 2011 Arduino. All right reserved.
|
|||
#
|
|||
# This library is free software; you can redistribute it and/or
|
|||
# modify it under the terms of the GNU Lesser General Public
|
|||
# License as published by the Free Software Foundation; either
|
|||
# version 2.1 of the License, or (at your option) any later version.
|
|||
#
|
|||
# This library is distributed in the hope that it will be useful,
|
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|||
# See the GNU Lesser General Public License for more details.
|
|||
#
|
|||
# You should have received a copy of the GNU Lesser General Public
|
|||
# License along with this library; if not, write to the Free Software
|
|||
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|||
#
|
|||
|
|||
# Tool suffix when cross-compiling
|
|||
CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi- |
|||
|
|||
# Compilation tools
|
|||
AR = $(CROSS_COMPILE)ar |
|||
CC = $(CROSS_COMPILE)gcc |
|||
CXX = $(CROSS_COMPILE)g++ |
|||
AS = $(CROSS_COMPILE)as |
|||
NM = $(CROSS_COMPILE)nm |
|||
ifeq ($(OS),Windows_NT) |
|||
RM=cs-rm -Rf |
|||
else |
|||
RM=rm -Rf |
|||
endif |
|||
|
|||
SEP=\\ |
|||
|
|||
# ---------------------------------------------------------------------------------------
|
|||
# C Flags
|
|||
|
|||
CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int |
|||
CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses |
|||
CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused |
|||
CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef |
|||
CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings |
|||
CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes |
|||
CFLAGS += -Wmissing-prototypes -Wmissing-declarations |
|||
CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations |
|||
CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long |
|||
CFLAGS += -Wunreachable-code |
|||
CFLAGS += -Wcast-align |
|||
#CFLAGS += -Wmissing-noreturn
|
|||
#CFLAGS += -Wconversion
|
|||
|
|||
CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -nostdlib -std=c99 |
|||
CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT) |
|||
|
|||
# To reduce application size use only integer printf function.
|
|||
CFLAGS += -Dprintf=iprintf |
|||
|
|||
# ---------------------------------------------------------------------------------------
|
|||
# CPP Flags
|
|||
|
|||
CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 |
|||
CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code |
|||
CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused |
|||
CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef |
|||
CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings |
|||
CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations |
|||
CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations |
|||
CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long |
|||
#CPPFLAGS += -Wmissing-noreturn
|
|||
#CPPFLAGS += -Wconversion
|
|||
|
|||
CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -std=c++98 |
|||
CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) |
|||
|
|||
# To reduce application size use only integer printf function.
|
|||
CPPFLAGS += -Dprintf=iprintf |
|||
|
|||
# ---------------------------------------------------------------------------------------
|
|||
# ASM Flags
|
|||
|
|||
ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES) |
|||
@ -0,0 +1,184 @@ |
|||
#
|
|||
# Copyright (c) 2012 Arduino. All right reserved.
|
|||
#
|
|||
# This library is free software; you can redistribute it and/or
|
|||
# modify it under the terms of the GNU Lesser General Public
|
|||
# License as published by the Free Software Foundation; either
|
|||
# version 2.1 of the License, or (at your option) any later version.
|
|||
#
|
|||
# This library is distributed in the hope that it will be useful,
|
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|||
# See the GNU Lesser General Public License for more details.
|
|||
#
|
|||
# You should have received a copy of the GNU Lesser General Public
|
|||
# License along with this library; if not, write to the Free Software
|
|||
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|||
#
|
|||
|
|||
# Makefile for compiling libArduino
|
|||
.SUFFIXES: .o .a .c .s |
|||
|
|||
CHIP=__SAM3X8E__ |
|||
VARIANT=arduino_due_x |
|||
LIBNAME=libvariant_$(VARIANT) |
|||
TOOLCHAIN=gcc |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Path
|
|||
#-------------------------------------------------------------------------------
|
|||
|
|||
# Output directories
|
|||
OUTPUT_BIN = ../../../cores/arduino |
|||
|
|||
# Libraries
|
|||
PROJECT_BASE_PATH = .. |
|||
SYSTEM_PATH = ../../../system |
|||
CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS |
|||
CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include |
|||
CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL |
|||
#CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE)
|
|||
|
|||
ARDUINO_PATH = ../../../cores/arduino |
|||
VARIANT_BASE_PATH = ../../../variants |
|||
VARIANT_PATH = ../../../variants/$(VARIANT) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Files
|
|||
#-------------------------------------------------------------------------------
|
|||
|
|||
#vpath %.h $(PROJECT_BASE_PATH) $(SYSTEM_PATH) $(VARIANT_PATH)
|
|||
vpath %.cpp $(PROJECT_BASE_PATH) |
|||
|
|||
VPATH+=$(PROJECT_BASE_PATH) |
|||
|
|||
INCLUDES = |
|||
#INCLUDES += -I$(PROJECT_BASE_PATH)
|
|||
INCLUDES += -I$(ARDUINO_PATH) |
|||
INCLUDES += -I$(ARDUINO_PATH)/USB |
|||
INCLUDES += -I$(SYSTEM_PATH) |
|||
INCLUDES += -I$(SYSTEM_PATH)/libsam |
|||
INCLUDES += -I$(SYSTEM_PATH)/USBHost |
|||
INCLUDES += -I$(VARIANT_BASE_PATH) |
|||
INCLUDES += -I$(VARIANT_PATH) |
|||
INCLUDES += -I$(CMSIS_ARM_PATH) |
|||
INCLUDES += -I$(CMSIS_ATMEL_PATH) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
ifdef DEBUG |
|||
include debug.mk |
|||
else |
|||
include release.mk |
|||
endif |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Tools
|
|||
#-------------------------------------------------------------------------------
|
|||
|
|||
include $(TOOLCHAIN).mk |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
ifdef DEBUG |
|||
OUTPUT_OBJ=debug |
|||
OUTPUT_LIB_POSTFIX=dbg |
|||
else |
|||
OUTPUT_OBJ=release |
|||
OUTPUT_LIB_POSTFIX=rel |
|||
endif |
|||
|
|||
OUTPUT_LIB=$(LIBNAME)_$(TOOLCHAIN)_$(OUTPUT_LIB_POSTFIX).a |
|||
OUTPUT_PATH=$(OUTPUT_OBJ)_$(VARIANT) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# C source files and objects
|
|||
#-------------------------------------------------------------------------------
|
|||
C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c) |
|||
|
|||
C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC))) |
|||
|
|||
# during development, remove some files
|
|||
C_OBJ_FILTER= |
|||
|
|||
C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP)) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# CPP source files and objects
|
|||
#-------------------------------------------------------------------------------
|
|||
CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp) |
|||
|
|||
CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC))) |
|||
|
|||
# during development, remove some files
|
|||
CPP_OBJ_FILTER= |
|||
|
|||
CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP)) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Assembler source files and objects
|
|||
#-------------------------------------------------------------------------------
|
|||
A_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.s) |
|||
|
|||
A_OBJ_TEMP=$(patsubst %.s, %.o, $(notdir $(A_SRC))) |
|||
|
|||
# during development, remove some files
|
|||
A_OBJ_FILTER= |
|||
|
|||
A_OBJ=$(filter-out $(A_OBJ_FILTER), $(A_OBJ_TEMP)) |
|||
|
|||
#-------------------------------------------------------------------------------
|
|||
# Rules
|
|||
#-------------------------------------------------------------------------------
|
|||
all: $(VARIANT) |
|||
|
|||
$(VARIANT): create_output $(OUTPUT_LIB) |
|||
|
|||
.PHONY: create_output |
|||
create_output: |
|||
@echo ------------------------------------------------------------------------------------ |
|||
@echo ------------------------- |
|||
@echo --- Preparing variant $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN) |
|||
@echo ------------------------- |
|||
# @echo *$(INCLUDES)
|
|||
# @echo -------------------------
|
|||
# @echo *$(C_SRC)
|
|||
# @echo -------------------------
|
|||
# @echo *$(C_OBJ)
|
|||
# @echo -------------------------
|
|||
# @echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
|
|||
# @echo -------------------------
|
|||
# @echo *$(CPP_SRC)
|
|||
# @echo -------------------------
|
|||
# @echo *$(CPP_OBJ)
|
|||
# @echo -------------------------
|
|||
# @echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
|
|||
# @echo -------------------------
|
|||
# @echo *$(A_SRC)
|
|||
# @echo -------------------------
|
|||
|
|||
-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1 |
|||
@echo ------------------------------------------------------------------------------------ |
|||
|
|||
$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c |
|||
# @"$(CC)" -v -c $(CFLAGS) $< -o $@
|
|||
@"$(CC)" -c $(CFLAGS) $< -o $@ |
|||
|
|||
$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp |
|||
# @"$(CC)" -c $(CPPFLAGS) $< -o $@
|
|||
@"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@ |
|||
|
|||
$(addprefix $(OUTPUT_PATH)/,$(A_OBJ)): $(OUTPUT_PATH)/%.o: %.s |
|||
@"$(AS)" -c $(ASFLAGS) $< -o $@ |
|||
|
|||
$(OUTPUT_LIB): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ)) |
|||
@"$(AR)" -v -r "$(OUTPUT_BIN)/$@" $^ |
|||
@"$(NM)" "$(OUTPUT_BIN)/$@" > "$(OUTPUT_BIN)/$@.txt" |
|||
|
|||
|
|||
.PHONY: clean |
|||
clean: |
|||
@echo ------------------------------------------------------------------------------------ |
|||
@echo --- Cleaning $(VARIANT) files [$(OUTPUT_PATH)$(SEP)*.o] |
|||
-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1 |
|||
-@$(RM) $(OUTPUT_BIN)/$(OUTPUT_LIB) 1>NUL 2>&1 |
|||
@echo ------------------------------------------------------------------------------------ |
|||
|
|||
@ -0,0 +1,25 @@ |
|||
#
|
|||
# Copyright (c) 2011 Arduino. All right reserved.
|
|||
#
|
|||
# This library is free software; you can redistribute it and/or
|
|||
# modify it under the terms of the GNU Lesser General Public
|
|||
# License as published by the Free Software Foundation; either
|
|||
# version 2.1 of the License, or (at your option) any later version.
|
|||
#
|
|||
# This library is distributed in the hope that it will be useful,
|
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|||
# See the GNU Lesser General Public License for more details.
|
|||
#
|
|||
# You should have received a copy of the GNU Lesser General Public
|
|||
# License along with this library; if not, write to the Free Software
|
|||
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|||
#
|
|||
|
|||
# Optimization level
|
|||
# -O1 Optimize
|
|||
# -O2 Optimize even more
|
|||
# -O3 Optimize yet more
|
|||
# -O0 Reduce compilation time and make debugging produce the expected results
|
|||
# -Os Optimize for size
|
|||
OPTIMIZATION = -Os |
|||
@ -0,0 +1,37 @@ |
|||
#******************************************************* |
|||
# |
|||
# Connect to J-Link and debug application in flash on SAM3X. |
|||
# |
|||
|
|||
# Define 'reset' command |
|||
define reset |
|||
|
|||
# Connect to the J-Link gdb server |
|||
target remote localhost:2331 |
|||
|
|||
# Reset the chip to get to a known state |
|||
monitor reset |
|||
|
|||
# Select flash device |
|||
monitor flash device = AT91SAM3X8E |
|||
|
|||
# Enable flash download and flash breakpoints |
|||
monitor flash download = 1 |
|||
|
|||
# Load the program |
|||
load |
|||
|
|||
# Reset peripheral (RSTC_CR) |
|||
set *0x400e1a00 = 0xA5000004 |
|||
|
|||
# Initialize PC and stack pointer |
|||
mon reg sp=(0x80000) |
|||
#set *0x80004 = *0x80004 & 0xFFFFFFFE |
|||
mon reg pc=(0x80004) |
|||
|
|||
info reg |
|||
|
|||
break main |
|||
|
|||
# End of 'reset' command |
|||
end |
|||
@ -0,0 +1,37 @@ |
|||
#******************************************************* |
|||
# |
|||
# Connect to J-Link and debug application in sram on SAM3X. |
|||
# |
|||
|
|||
# Define 'reset' command |
|||
define reset |
|||
|
|||
# Connect to the J-Link gdb server |
|||
target remote localhost:2331 |
|||
|
|||
# Reset the chip to get to a known state |
|||
monitor reset |
|||
|
|||
# Select flash device |
|||
monitor flash device = AT91SAM3X8E |
|||
|
|||
# Enable flash download and flash breakpoints |
|||
monitor flash download = 1 |
|||
|
|||
# Load the program |
|||
load |
|||
|
|||
# Reset peripheral (RSTC_CR) |
|||
set *0x400e1a00 = 0xA5000004 |
|||
|
|||
# Initialize PC and stack pointer |
|||
mon reg sp=(0x20000000) |
|||
#set *0x20000004 = *0x20000004 & 0xFFFFFFFE |
|||
mon reg pc=(0x20000004) |
|||
|
|||
info reg |
|||
|
|||
break main |
|||
|
|||
# End of 'reset' command |
|||
end |
|||
@ -0,0 +1,44 @@ |
|||
// --------------------------------------------------------- |
|||
// ATMEL Microcontroller Software Support - ROUSSET - |
|||
// --------------------------------------------------------- |
|||
// The software is delivered "AS IS" without warranty or |
|||
// condition of any kind, either express, implied or |
|||
// statutory. This includes without limitation any warranty |
|||
// or condition with respect to merchantability or fitness |
|||
// for any particular purpose, or against the infringements of |
|||
// intellectual property rights of others. |
|||
// --------------------------------------------------------- |
|||
// File: at91sam3u-ek-flash.mac |
|||
// User setup file for CSPY debugger. |
|||
// --------------------------------------------------------- |
|||
__var __mac_i; |
|||
__var __mac_pt; |
|||
|
|||
/********************************************************************* |
|||
* |
|||
* execUserReset() |
|||
*/ |
|||
execUserReset() |
|||
{ |
|||
__message "------------------------------ execUserReset ---------------------------------"; |
|||
__message "-------------------------------Set PC Reset ----------------------------------"; |
|||
|
|||
__hwReset(0); |
|||
|
|||
// perpheral reset RSTC_CR |
|||
__writeMemory32(0xA5000004,0x400e1200,"Memory"); |
|||
} |
|||
|
|||
/********************************************************************* |
|||
* |
|||
* execUserPreload() |
|||
*/ |
|||
execUserPreload() |
|||
{ |
|||
__message "------------------------------ execUserPreload ---------------------------------"; |
|||
|
|||
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset |
|||
|
|||
// perpheral reset RSTC_CR |
|||
__writeMemory32(0xA5000004,0x400e1200,"Memory"); |
|||
} |
|||
@ -0,0 +1,44 @@ |
|||
// --------------------------------------------------------- |
|||
// ATMEL Microcontroller Software Support - ROUSSET - |
|||
// --------------------------------------------------------- |
|||
// The software is delivered "AS IS" without warranty or |
|||
// condition of any kind, either express, implied or |
|||
// statutory. This includes without limitation any warranty |
|||
// or condition with respect to merchantability or fitness |
|||
// for any particular purpose, or against the infringements of |
|||
// intellectual property rights of others. |
|||
// --------------------------------------------------------- |
|||
// File: at91sam3u-ek-sram.mac |
|||
// User setup file for CSPY debugger. |
|||
// --------------------------------------------------------- |
|||
__var __mac_i; |
|||
__var __mac_pt; |
|||
|
|||
/********************************************************************* |
|||
* |
|||
* execUserReset() |
|||
*/ |
|||
execUserReset() |
|||
{ |
|||
__message "------------------------------ execUserReset ---------------------------------"; |
|||
__message "-------------------------------Set PC Reset ----------------------------------"; |
|||
|
|||
//__hwReset(50); |
|||
|
|||
// perpheral reset RSTC_CR |
|||
__writeMemory32(0xA5000004,0x400e1200,"Memory"); |
|||
} |
|||
|
|||
/********************************************************************* |
|||
* |
|||
* execUserPreload() |
|||
*/ |
|||
execUserPreload() |
|||
{ |
|||
__message "------------------------------ execUserPreload ---------------------------------"; |
|||
|
|||
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset |
|||
|
|||
// perpheral reset RSTC_CR |
|||
__writeMemory32(0xA5000004,0x400e1200,"Memory"); |
|||
} |
|||
Binary file not shown.
@ -0,0 +1,576 @@ |
|||
|
|||
adc10_sam3u.o: |
|||
|
|||
adc12_sam3u.o: |
|||
|
|||
adc_sam3snxa.o: |
|||
|
|||
pio.o: |
|||
00000000 T PIO_Clear |
|||
00000000 T PIO_Configure |
|||
00000000 T PIO_DisableInterrupt |
|||
00000000 T PIO_Get |
|||
00000000 T PIO_GetOutputDataStatus |
|||
00000000 T PIO_PullUp |
|||
00000000 T PIO_Set |
|||
00000000 T PIO_SetDebounceFilter |
|||
00000000 T PIO_SetInput |
|||
00000000 T PIO_SetOutput |
|||
00000000 T PIO_SetPeripheral |
|||
|
|||
pmc.o: |
|||
00000000 T pmc_clr_fast_startup_input |
|||
00000000 T pmc_disable_all_pck |
|||
00000000 T pmc_disable_all_periph_clk |
|||
00000000 T pmc_disable_interrupt |
|||
00000000 T pmc_disable_pck |
|||
00000000 T pmc_disable_periph_clk |
|||
00000000 T pmc_disable_pllack |
|||
00000000 T pmc_disable_udpck |
|||
00000000 T pmc_disable_upll_clock |
|||
00000000 T pmc_enable_all_pck |
|||
00000000 T pmc_enable_all_periph_clk |
|||
00000000 T pmc_enable_backupmode |
|||
00000000 T pmc_enable_interrupt |
|||
00000000 T pmc_enable_pck |
|||
00000000 T pmc_enable_periph_clk |
|||
00000000 T pmc_enable_pllack |
|||
00000000 T pmc_enable_sleepmode |
|||
00000000 T pmc_enable_udpck |
|||
00000000 T pmc_enable_upll_clock |
|||
00000000 T pmc_enable_waitmode |
|||
00000000 T pmc_get_interrupt_mask |
|||
00000000 T pmc_get_status |
|||
00000000 T pmc_get_writeprotect_status |
|||
00000000 T pmc_is_locked_pllack |
|||
00000000 T pmc_is_locked_upll |
|||
00000000 T pmc_is_pck_enabled |
|||
00000000 T pmc_is_periph_clk_enabled |
|||
00000000 T pmc_mck_set_prescaler |
|||
00000000 T pmc_mck_set_source |
|||
00000000 T pmc_osc_disable_fastrc |
|||
00000000 T pmc_osc_disable_xtal |
|||
00000000 T pmc_osc_enable_fastrc |
|||
00000000 T pmc_osc_is_ready_32kxtal |
|||
00000000 T pmc_osc_is_ready_mainck |
|||
00000000 T pmc_pck_set_prescaler |
|||
00000000 T pmc_pck_set_source |
|||
00000000 T pmc_set_fast_startup_input |
|||
00000000 T pmc_set_writeprotect |
|||
00000000 T pmc_switch_mainck_to_fastrc |
|||
00000000 T pmc_switch_mainck_to_xtal |
|||
00000000 T pmc_switch_mck_to_mainck |
|||
00000000 T pmc_switch_mck_to_pllack |
|||
00000000 T pmc_switch_mck_to_sclk |
|||
00000000 T pmc_switch_mck_to_upllck |
|||
00000000 T pmc_switch_pck_to_mainck |
|||
00000000 T pmc_switch_pck_to_pllack |
|||
00000000 T pmc_switch_pck_to_sclk |
|||
00000000 T pmc_switch_pck_to_upllck |
|||
00000000 T pmc_switch_sclk_to_32kxtal |
|||
00000000 T pmc_switch_udpck_to_pllack |
|||
00000000 T pmc_switch_udpck_to_upllck |
|||
|
|||
pwmc.o: |
|||
00000000 t FindClockConfiguration |
|||
00000000 T PWMC_ConfigureChannel |
|||
00000000 T PWMC_ConfigureChannelExt |
|||
00000000 T PWMC_ConfigureClocks |
|||
00000000 T PWMC_ConfigureComparisonUnit |
|||
00000000 T PWMC_ConfigureEventLineMode |
|||
00000000 T PWMC_ConfigureSyncChannel |
|||
00000000 T PWMC_DisableChannel |
|||
00000000 T PWMC_DisableChannelIt |
|||
00000000 T PWMC_DisableIt |
|||
00000000 T PWMC_DisableOverrideOutput |
|||
00000000 T PWMC_EnableChannel |
|||
00000000 T PWMC_EnableChannelIt |
|||
00000000 T PWMC_EnableFaultProtection |
|||
00000000 T PWMC_EnableIt |
|||
00000000 T PWMC_EnableOverrideOutput |
|||
00000000 T PWMC_FaultClear |
|||
00000000 T PWMC_SetDeadTime |
|||
00000000 T PWMC_SetDutyCycle |
|||
00000000 T PWMC_SetFaultMode |
|||
00000000 T PWMC_SetFaultProtectionValue |
|||
00000000 T PWMC_SetOverrideValue |
|||
00000000 T PWMC_SetPeriod |
|||
00000000 T PWMC_SetSyncChannelUpdatePeriod |
|||
00000000 T PWMC_SetSyncChannelUpdateUnlock |
|||
00000000 T PWMC_WriteBuffer |
|||
U __assert_func |
|||
00000000 r __func__.6793 |
|||
00000000 r __func__.6804 |
|||
00000000 r __func__.6819 |
|||
00000000 r __func__.6830 |
|||
00000000 r __func__.6841 |
|||
00000000 r __func__.6848 |
|||
00000000 r __func__.6932 |
|||
00000000 r __func__.6938 |
|||
|
|||
rtc.o: |
|||
00000000 T RTC_ClearSCCR |
|||
00000000 T RTC_DisableIt |
|||
00000000 T RTC_EnableIt |
|||
00000000 T RTC_GetDate |
|||
00000000 T RTC_GetHourMode |
|||
00000000 T RTC_GetSR |
|||
00000000 T RTC_GetTime |
|||
00000000 T RTC_SetDate |
|||
00000000 T RTC_SetDateAlarm |
|||
00000000 T RTC_SetHourMode |
|||
00000000 T RTC_SetTime |
|||
00000000 T RTC_SetTimeAlarm |
|||
U __assert_func |
|||
00000000 r __func__.6790 |
|||
00000000 r __func__.6799 |
|||
00000000 r __func__.6804 |
|||
|
|||
rtt.o: |
|||
00000000 T RTT_EnableIT |
|||
00000000 T RTT_GetStatus |
|||
00000000 T RTT_GetTime |
|||
00000000 T RTT_SetAlarm |
|||
00000000 T RTT_SetPrescaler |
|||
U __assert_func |
|||
00000000 r __func__.6797 |
|||
00000000 r __func__.6805 |
|||
|
|||
spi.o: |
|||
00000000 T SPI_Configure |
|||
00000000 T SPI_ConfigureNPCS |
|||
00000000 T SPI_Disable |
|||
00000000 T SPI_DisableIt |
|||
00000000 T SPI_Enable |
|||
00000000 T SPI_EnableIt |
|||
00000000 T SPI_GetStatus |
|||
00000000 T SPI_IsFinished |
|||
00000000 T SPI_Read |
|||
00000000 T SPI_Write |
|||
U pmc_enable_periph_clk |
|||
|
|||
tc.o: |
|||
00000000 T TC_Configure |
|||
00000000 T TC_FindMckDivisor |
|||
00000000 T TC_GetStatus |
|||
00000000 T TC_ReadCV |
|||
00000000 T TC_SetRA |
|||
00000000 T TC_SetRB |
|||
00000000 T TC_SetRC |
|||
00000000 T TC_Start |
|||
00000000 T TC_Stop |
|||
U __assert_func |
|||
00000000 r __func__.6792 |
|||
00000000 r __func__.6798 |
|||
00000000 r __func__.6804 |
|||
|
|||
timetick.o: |
|||
00000000 T GetTickCount |
|||
00000000 T Sleep |
|||
00000000 T TimeTick_Configure |
|||
00000000 T TimeTick_Increment |
|||
00000000 T Wait |
|||
00000000 b _dwTickCount |
|||
|
|||
twi.o: |
|||
00000000 T TWI_ByteReceived |
|||
00000000 T TWI_ByteSent |
|||
00000000 T TWI_ConfigureMaster |
|||
00000000 T TWI_ConfigureSlave |
|||
00000000 T TWI_Disable |
|||
00000000 T TWI_DisableIt |
|||
00000000 T TWI_EnableIt |
|||
00000000 T TWI_GetMaskedStatus |
|||
00000000 T TWI_GetStatus |
|||
00000000 T TWI_ReadByte |
|||
00000000 T TWI_SendSTOPCondition |
|||
00000000 T TWI_SetClock |
|||
00000000 T TWI_StartRead |
|||
00000000 T TWI_StartWrite |
|||
00000000 T TWI_Stop |
|||
00000000 T TWI_TransferComplete |
|||
00000000 T TWI_WriteByte |
|||
U __assert_func |
|||
00000000 r __func__.7151 |
|||
00000000 r __func__.7157 |
|||
00000000 r __func__.7172 |
|||
00000000 r __func__.7176 |
|||
00000000 r __func__.7184 |
|||
00000000 r __func__.7191 |
|||
00000000 r __func__.7195 |
|||
00000000 r __func__.7200 |
|||
00000000 r __func__.7208 |
|||
00000000 r __func__.7222 |
|||
00000000 r __func__.7227 |
|||
00000000 r __func__.7231 |
|||
00000000 r __func__.7236 |
|||
00000000 r __func__.7240 |
|||
|
|||
usart.o: |
|||
00000000 T USART_Configure |
|||
00000000 T USART_DisableIt |
|||
00000000 T USART_EnableIt |
|||
00000000 T USART_GetChar |
|||
00000000 T USART_GetStatus |
|||
00000000 T USART_IsDataAvailable |
|||
00000000 T USART_IsRxReady |
|||
00000000 T USART_PutChar |
|||
00000000 T USART_Read |
|||
00000000 T USART_ReadBuffer |
|||
00000000 T USART_SetIrdaFilter |
|||
00000000 T USART_SetReceiverEnabled |
|||
00000000 T USART_SetTransmitterEnabled |
|||
00000000 T USART_Write |
|||
00000000 T USART_WriteBuffer |
|||
U __assert_func |
|||
00000000 r __func__.7068 |
|||
|
|||
wdt.o: |
|||
00000000 T WDT_Disable |
|||
00000000 T WDT_Enable |
|||
00000000 T WDT_GetPeriod |
|||
00000000 T WDT_GetStatus |
|||
00000000 T WDT_Restart |
|||
|
|||
system_sam3xa.o: |
|||
00000000 D SystemCoreClock |
|||
00000000 T SystemCoreClockUpdate |
|||
00000000 T SystemInit |
|||
00000000 T system_init_flash |
|||
|
|||
startup_sam3xa.o: |
|||
U ADC_Handler |
|||
U BusFault_Handler |
|||
U CAN0_Handler |
|||
U CAN1_Handler |
|||
U DACC_Handler |
|||
U DMAC_Handler |
|||
U DebugMon_Handler |
|||
U EFC0_Handler |
|||
U EFC1_Handler |
|||
U EMAC_Handler |
|||
U HSMCI_Handler |
|||
U HardFault_Handler |
|||
U MemManage_Handler |
|||
U NMI_Handler |
|||
U PIOA_Handler |
|||
U PIOB_Handler |
|||
U PIOC_Handler |
|||
U PIOD_Handler |
|||
U PMC_Handler |
|||
U PWM_Handler |
|||
U PendSV_Handler |
|||
U RSTC_Handler |
|||
U RTC_Handler |
|||
U RTT_Handler |
|||
00000000 T Reset_Handler |
|||
U SMC_Handler |
|||
U SPI0_Handler |
|||
U SSC_Handler |
|||
U SUPC_Handler |
|||
U SVC_Handler |
|||
U SysTick_Handler |
|||
U TC0_Handler |
|||
U TC1_Handler |
|||
U TC2_Handler |
|||
U TC3_Handler |
|||
U TC4_Handler |
|||
U TC5_Handler |
|||
U TC6_Handler |
|||
U TC7_Handler |
|||
U TC8_Handler |
|||
U TRNG_Handler |
|||
U TWI0_Handler |
|||
U TWI1_Handler |
|||
U UART_Handler |
|||
U UOTGHS_Handler |
|||
U USART0_Handler |
|||
U USART1_Handler |
|||
U USART2_Handler |
|||
U USART3_Handler |
|||
U UsageFault_Handler |
|||
U WDT_Handler |
|||
U _erelocate |
|||
U _estack |
|||
U _etext |
|||
U _ezero |
|||
U _sfixed |
|||
U _srelocate |
|||
U _szero |
|||
00000000 R exception_table |
|||
U main |
|||
|
|||
adc.o: |
|||
00000000 T adc_configure_power_save |
|||
00000000 T adc_configure_sequence |
|||
00000000 T adc_configure_timing |
|||
00000000 T adc_configure_trigger |
|||
00000000 T adc_disable_all_channel |
|||
00000000 T adc_disable_anch |
|||
00000000 T adc_disable_channel |
|||
00000000 T adc_disable_channel_differential_input |
|||
00000000 T adc_disable_channel_input_offset |
|||
00000000 T adc_disable_interrupt |
|||
00000000 T adc_disable_tag |
|||
00000000 T adc_disable_ts |
|||
00000000 T adc_enable_all_channel |
|||
00000000 T adc_enable_anch |
|||
00000000 T adc_enable_channel |
|||
00000000 T adc_enable_channel_differential_input |
|||
00000000 T adc_enable_channel_input_offset |
|||
00000000 T adc_enable_interrupt |
|||
00000000 T adc_enable_tag |
|||
00000000 T adc_enable_ts |
|||
00000000 T adc_get_actual_adc_clock |
|||
00000000 T adc_get_channel_status |
|||
00000000 T adc_get_channel_value |
|||
00000000 T adc_get_comparison_mode |
|||
00000000 T adc_get_interrupt_mask |
|||
00000000 T adc_get_latest_value |
|||
00000000 T adc_get_overrun_status |
|||
00000000 T adc_get_pdc_base |
|||
00000000 T adc_get_status |
|||
00000000 T adc_get_tag |
|||
00000000 T adc_get_writeprotect_status |
|||
00000000 T adc_init |
|||
00000000 T adc_set_bias_current |
|||
00000000 T adc_set_channel_input_gain |
|||
00000000 T adc_set_comparison_channel |
|||
00000000 T adc_set_comparison_mode |
|||
00000000 T adc_set_comparison_window |
|||
00000000 T adc_set_resolution |
|||
00000000 T adc_set_writeprotect |
|||
00000000 T adc_start |
|||
00000000 T adc_start_sequencer |
|||
00000000 T adc_stop |
|||
00000000 T adc_stop_sequencer |
|||
|
|||
udp.o: |
|||
|
|||
udphs.o: |
|||
|
|||
uotghs.o: |
|||
00000000 T UOTGHS_Handler |
|||
00000000 B gpf_isr |
|||
|
|||
interrupt_sam_nvic.o: |
|||
00000000 D g_interrupt_enabled |
|||
|
|||
uotghs_device.o: |
|||
00000000 T UDD_Attach |
|||
00000000 T UDD_ClearIN |
|||
00000000 T UDD_ClearOUT |
|||
00000000 T UDD_ClearSetupInt |
|||
00000000 T UDD_Detach |
|||
00000000 T UDD_FifoByteCount |
|||
00000000 T UDD_GetFrameNumber |
|||
00000000 T UDD_Init |
|||
00000000 T UDD_InitEP |
|||
00000000 T UDD_InitEndpoints |
|||
00000000 T UDD_ReadWriteAllowed |
|||
00000000 T UDD_ReceivedSetupInt |
|||
00000000 T UDD_Recv |
|||
00000000 T UDD_Recv8 |
|||
00000000 T UDD_ReleaseRX |
|||
00000000 T UDD_ReleaseTX |
|||
00000000 T UDD_Send |
|||
00000000 T UDD_Send8 |
|||
00000000 T UDD_SetAddress |
|||
00000000 T UDD_SetStack |
|||
00000000 T UDD_Stall |
|||
00000000 T UDD_WaitForINOrOUT |
|||
00000000 T UDD_WaitIN |
|||
00000000 T UDD_WaitOUT |
|||
U g_interrupt_enabled |
|||
U gpf_isr |
|||
U pmc_enable_periph_clk |
|||
U pmc_enable_udpck |
|||
U pmc_enable_upll_clock |
|||
U pmc_switch_udpck_to_upllck |
|||
00000000 b ul_recv_fifo_ptr |
|||
00000000 b ul_send_fifo_ptr |
|||
|
|||
uotghs_host.o: |
|||
00000000 T UHD_BusReset |
|||
00000000 T UHD_GetVBUSState |
|||
00000000 t UHD_ISR |
|||
00000000 T UHD_Init |
|||
00000000 T UHD_Pipe0_Alloc |
|||
00000000 T UHD_Pipe_Alloc |
|||
00000000 T UHD_Pipe_Free |
|||
00000000 T UHD_Pipe_Is_Transfer_Complete |
|||
00000000 T UHD_Pipe_Read |
|||
00000000 T UHD_Pipe_Send |
|||
00000000 T UHD_Pipe_Write |
|||
00000000 T UHD_SetStack |
|||
U g_interrupt_enabled |
|||
U gpf_isr |
|||
U pmc_enable_periph_clk |
|||
U pmc_enable_udpck |
|||
U pmc_enable_upll_clock |
|||
U pmc_switch_udpck_to_upllck |
|||
00000000 b uhd_state |
|||
|
|||
dacc.o: |
|||
00000000 T dacc_disable_channel |
|||
00000000 T dacc_disable_interrupt |
|||
00000000 T dacc_disable_trigger |
|||
00000000 T dacc_enable_channel |
|||
00000000 T dacc_enable_flexible_selection |
|||
00000000 T dacc_enable_interrupt |
|||
00000000 T dacc_get_analog_control |
|||
00000000 T dacc_get_channel_status |
|||
00000000 T dacc_get_interrupt_mask |
|||
00000000 T dacc_get_interrupt_status |
|||
00000000 T dacc_get_pdc_base |
|||
00000000 T dacc_get_writeprotect_status |
|||
00000000 T dacc_reset |
|||
00000000 T dacc_set_analog_control |
|||
00000000 T dacc_set_channel_selection |
|||
00000000 T dacc_set_power_save |
|||
00000000 T dacc_set_timing |
|||
00000000 T dacc_set_transfer_mode |
|||
00000000 T dacc_set_trigger |
|||
00000000 T dacc_set_writeprotect |
|||
00000000 T dacc_write_conversion_data |
|||
|
|||
can.o: |
|||
00000000 R can_bit_time |
|||
00000000 T can_disable |
|||
00000000 T can_disable_autobaud_listen_mode |
|||
00000000 T can_disable_interrupt |
|||
00000000 T can_disable_low_power_mode |
|||
00000000 T can_disable_overload_frame |
|||
00000000 T can_disable_time_triggered_mode |
|||
00000000 T can_disable_timer_freeze |
|||
00000000 T can_disable_tx_repeat |
|||
00000000 T can_enable |
|||
00000000 T can_enable_autobaud_listen_mode |
|||
00000000 T can_enable_interrupt |
|||
00000000 T can_enable_low_power_mode |
|||
00000000 T can_enable_overload_frame |
|||
00000000 T can_enable_time_triggered_mode |
|||
00000000 T can_enable_timer_freeze |
|||
00000000 T can_enable_tx_repeat |
|||
00000000 T can_get_internal_timer_value |
|||
00000000 T can_get_interrupt_mask |
|||
00000000 T can_get_rx_error_cnt |
|||
00000000 T can_get_status |
|||
00000000 T can_get_timestamp_value |
|||
00000000 T can_get_tx_error_cnt |
|||
00000000 T can_global_send_abort_cmd |
|||
00000000 T can_global_send_transfer_cmd |
|||
00000000 T can_init |
|||
00000000 T can_mailbox_get_status |
|||
00000000 T can_mailbox_init |
|||
00000000 T can_mailbox_read |
|||
00000000 T can_mailbox_send_abort_cmd |
|||
00000000 T can_mailbox_send_transfer_cmd |
|||
00000000 T can_mailbox_set_timemark |
|||
00000000 T can_mailbox_tx_remote_frame |
|||
00000000 T can_mailbox_write |
|||
00000000 T can_reset_all_mailbox |
|||
00000000 T can_reset_internal_timer |
|||
00000000 T can_reset_mailbox_data |
|||
00000000 T can_set_rx_sync_stage |
|||
00000000 T can_set_timestamp_capture_point |
|||
U memset |
|||
|
|||
efc.o: |
|||
00000000 T efc_disable_frdy_interrupt |
|||
00000000 T efc_enable_frdy_interrupt |
|||
00000000 T efc_get_flash_access_mode |
|||
00000000 T efc_get_result |
|||
00000000 T efc_get_status |
|||
00000000 T efc_get_wait_state |
|||
00000000 T efc_init |
|||
00000000 T efc_perform_command |
|||
0000006c T efc_perform_fcr |
|||
00000000 T efc_perform_read_sequence |
|||
00000000 T efc_set_flash_access_mode |
|||
00000000 T efc_set_wait_state |
|||
00000068 T efc_write_fmr |
|||
00000000 b iap_perform_command.7049 |
|||
|
|||
gpbr.o: |
|||
00000000 T gpbr_read |
|||
00000000 T gpbr_write |
|||
|
|||
ssc.o: |
|||
U memset |
|||
00000000 T ssc_disable_interrupt |
|||
00000000 T ssc_disable_rx |
|||
00000000 T ssc_disable_tx |
|||
00000000 T ssc_disable_tx_frame_sync_data |
|||
00000000 T ssc_enable_interrupt |
|||
00000000 T ssc_enable_rx |
|||
00000000 T ssc_enable_tx |
|||
00000000 T ssc_enable_tx_frame_sync_data |
|||
00000000 T ssc_get_interrupt_mask |
|||
00000000 T ssc_get_rx_access |
|||
00000000 T ssc_get_rx_compare |
|||
00000000 T ssc_get_status |
|||
00000000 T ssc_get_tx_access |
|||
00000000 T ssc_get_writeprotect_status |
|||
00000000 T ssc_i2s_set_receiver |
|||
00000000 T ssc_i2s_set_transmitter |
|||
00000000 T ssc_is_rx_enabled |
|||
00000000 T ssc_is_rx_ready |
|||
00000000 T ssc_is_tx_empty |
|||
00000000 T ssc_is_tx_enabled |
|||
00000000 T ssc_is_tx_ready |
|||
00000000 T ssc_read |
|||
00000000 T ssc_read_sync_data |
|||
00000000 T ssc_reset |
|||
00000000 T ssc_set_clock_divider |
|||
00000000 T ssc_set_loop_mode |
|||
00000000 T ssc_set_normal_mode |
|||
00000000 T ssc_set_receiver |
|||
00000000 T ssc_set_rx_compare |
|||
00000000 T ssc_set_rx_stop_selection |
|||
00000000 T ssc_set_td_default_level |
|||
00000000 T ssc_set_transmitter |
|||
00000000 T ssc_set_writeprotect |
|||
00000000 T ssc_write |
|||
00000000 T ssc_write_sync_data |
|||
|
|||
trng.o: |
|||
00000000 T trng_disable |
|||
00000000 T trng_disable_interrupt |
|||
00000000 T trng_enable |
|||
00000000 T trng_enable_interrupt |
|||
00000000 T trng_get_interrupt_mask |
|||
00000000 T trng_get_interrupt_status |
|||
00000000 T trng_read_output_data |
|||
|
|||
rstc.o: |
|||
00000000 T rstc_disable_user_reset |
|||
00000000 T rstc_disable_user_reset_interrupt |
|||
00000000 T rstc_enable_user_reset |
|||
00000000 T rstc_enable_user_reset_interrupt |
|||
00000000 T rstc_get_reset_cause |
|||
00000000 T rstc_get_status |
|||
00000000 T rstc_reset_extern |
|||
00000000 T rstc_set_external_reset |
|||
00000000 T rstc_start_software_reset |
|||
|
|||
emac.o: |
|||
00000000 t circ_inc |
|||
00000000 T emac_dev_get_tx_load |
|||
00000000 T emac_dev_init |
|||
00000000 T emac_dev_read |
|||
00000000 T emac_dev_reset |
|||
00000000 T emac_dev_set_rx_callback |
|||
00000000 T emac_dev_set_tx_wakeup_callback |
|||
00000000 T emac_dev_write |
|||
00000000 T emac_handler |
|||
00000000 T emac_phy_read |
|||
00000000 T emac_phy_write |
|||
00000000 t emac_reset_rx_mem |
|||
00000000 t emac_reset_tx_mem |
|||
00000000 b gs_rx_desc |
|||
00000000 b gs_tx_callback |
|||
00000000 b gs_tx_desc |
|||
00000000 b gs_uc_rx_buffer |
|||
00000000 b gs_uc_tx_buffer |
|||
U memcpy |
|||
@ -0,0 +1,146 @@ |
|||
/* ---------------------------------------------------------------------------- |
|||
* SAM Software Package License |
|||
* ---------------------------------------------------------------------------- |
|||
* Copyright (c) 2012, Atmel Corporation |
|||
* |
|||
* All rights reserved. |
|||
* |
|||
* Redistribution and use in source and binary forms, with or without |
|||
* modification, are permitted provided that the following condition is met: |
|||
* |
|||
* - Redistributions of source code must retain the above copyright notice, |
|||
* this list of conditions and the disclaimer below. |
|||
* |
|||
* Atmel's name may not be used to endorse or promote products derived from |
|||
* this software without specific prior written permission. |
|||
* |
|||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR |
|||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
|||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
|||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, |
|||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
|||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
|||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
|||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
|||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
|||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
* ---------------------------------------------------------------------------- |
|||
*/ |
|||
|
|||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
|||
OUTPUT_ARCH(arm) |
|||
SEARCH_DIR(.) |
|||
|
|||
/* Memory Spaces Definitions */ |
|||
MEMORY |
|||
{ |
|||
rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ |
|||
sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ |
|||
sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ |
|||
ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ |
|||
} |
|||
|
|||
/* Section Definitions */ |
|||
SECTIONS |
|||
{ |
|||
.text : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sfixed = .; |
|||
KEEP(*(.vectors .vectors.*)) |
|||
*(.text .text.* .gnu.linkonce.t.*) |
|||
*(.glue_7t) *(.glue_7) |
|||
*(.rodata .rodata* .gnu.linkonce.r.*) |
|||
*(.ARM.extab* .gnu.linkonce.armextab.*) |
|||
|
|||
/* Support C constructors, and C destructors in both user code |
|||
and the C library. This also provides support for C++ code. */ |
|||
. = ALIGN(4); |
|||
KEEP(*(.init)) |
|||
. = ALIGN(4); |
|||
__preinit_array_start = .; |
|||
KEEP (*(.preinit_array)) |
|||
__preinit_array_end = .; |
|||
|
|||
. = ALIGN(4); |
|||
__init_array_start = .; |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array)) |
|||
__init_array_end = .; |
|||
|
|||
. = ALIGN(0x4); |
|||
KEEP (*crtbegin.o(.ctors)) |
|||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) |
|||
KEEP (*(SORT(.ctors.*))) |
|||
KEEP (*crtend.o(.ctors)) |
|||
|
|||
. = ALIGN(4); |
|||
KEEP(*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
__fini_array_start = .; |
|||
KEEP (*(.fini_array)) |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
__fini_array_end = .; |
|||
|
|||
KEEP (*crtbegin.o(.dtors)) |
|||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) |
|||
KEEP (*(SORT(.dtors.*))) |
|||
KEEP (*crtend.o(.dtors)) |
|||
|
|||
. = ALIGN(4); |
|||
_efixed = .; /* End of text section */ |
|||
} > rom |
|||
|
|||
/* .ARM.exidx is sorted, so has to go in its own output section. */ |
|||
PROVIDE_HIDDEN (__exidx_start = .); |
|||
.ARM.exidx : |
|||
{ |
|||
*(.ARM.exidx* .gnu.linkonce.armexidx.*) |
|||
} > rom |
|||
PROVIDE_HIDDEN (__exidx_end = .); |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; |
|||
|
|||
.relocate : AT (_etext) |
|||
{ |
|||
. = ALIGN(4); |
|||
_srelocate = .; |
|||
*(.ramfunc .ramfunc.*); |
|||
*(.data .data.*); |
|||
. = ALIGN(4); |
|||
_erelocate = .; |
|||
} > ram |
|||
|
|||
/* .bss section which is used for uninitialized data */ |
|||
.bss ALIGN(4) (NOLOAD) : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sbss = . ; |
|||
_szero = .; |
|||
*(.bss .bss.*) |
|||
*(COMMON) |
|||
. = ALIGN(4); |
|||
_ebss = . ; |
|||
_ezero = .; |
|||
} > ram |
|||
|
|||
. = ALIGN(4); |
|||
_end = . ; |
|||
|
|||
/* .stack_dummy section doesn't contains any symbols. It is only |
|||
used for linker to calculate size of stack sections, and assign |
|||
values to stack symbols later */ |
|||
.stack_dummy : |
|||
{ |
|||
*(.stack*) |
|||
} > ram |
|||
|
|||
/* Set stack top to end of ram, and stack limit move down by |
|||
* size of stack_dummy section */ |
|||
__StackTop = ORIGIN(ram) + LENGTH(ram); |
|||
__StackLimit = __StackTop - SIZEOF(.stack_dummy); |
|||
PROVIDE(_sstack = __StackLimit); |
|||
PROVIDE(_estack = __StackTop); |
|||
} |
|||
@ -0,0 +1,145 @@ |
|||
/* ---------------------------------------------------------------------------- |
|||
* SAM Software Package License |
|||
* ---------------------------------------------------------------------------- |
|||
* Copyright (c) 2012, Atmel Corporation |
|||
* |
|||
* All rights reserved. |
|||
* |
|||
* Redistribution and use in source and binary forms, with or without |
|||
* modification, are permitted provided that the following condition is met: |
|||
* |
|||
* - Redistributions of source code must retain the above copyright notice, |
|||
* this list of conditions and the disclaimer below. |
|||
* |
|||
* Atmel's name may not be used to endorse or promote products derived from |
|||
* this software without specific prior written permission. |
|||
* |
|||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR |
|||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
|||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
|||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, |
|||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
|||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
|||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
|||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
|||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
|||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|||
* ---------------------------------------------------------------------------- |
|||
*/ |
|||
|
|||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
|||
OUTPUT_ARCH(arm) |
|||
SEARCH_DIR(.) |
|||
|
|||
/* Memory Spaces Definitions */ |
|||
MEMORY |
|||
{ |
|||
rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ |
|||
sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ |
|||
sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ |
|||
ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ |
|||
} |
|||
|
|||
/* The stack size used by the application. NOTE: you need to adjust */ |
|||
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ; |
|||
|
|||
/* Section Definitions */ |
|||
SECTIONS |
|||
{ |
|||
.text : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sfixed = .; |
|||
KEEP(*(.vectors .vectors.*)) |
|||
*(.text .text.* .gnu.linkonce.t.*) |
|||
*(.glue_7t) *(.glue_7) |
|||
*(.rodata .rodata* .gnu.linkonce.r.*) |
|||
*(.ARM.extab* .gnu.linkonce.armextab.*) |
|||
|
|||
/* Support C constructors, and C destructors in both user code |
|||
and the C library. This also provides support for C++ code. */ |
|||
. = ALIGN(4); |
|||
KEEP(*(.init)) |
|||
. = ALIGN(4); |
|||
__preinit_array_start = .; |
|||
KEEP (*(.preinit_array)) |
|||
__preinit_array_end = .; |
|||
|
|||
. = ALIGN(4); |
|||
__init_array_start = .; |
|||
KEEP (*(SORT(.init_array.*))) |
|||
KEEP (*(.init_array)) |
|||
__init_array_end = .; |
|||
|
|||
. = ALIGN(0x4); |
|||
KEEP (*crtbegin.o(.ctors)) |
|||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) |
|||
KEEP (*(SORT(.ctors.*))) |
|||
KEEP (*crtend.o(.ctors)) |
|||
|
|||
. = ALIGN(4); |
|||
KEEP(*(.fini)) |
|||
|
|||
. = ALIGN(4); |
|||
__fini_array_start = .; |
|||
KEEP (*(.fini_array)) |
|||
KEEP (*(SORT(.fini_array.*))) |
|||
__fini_array_end = .; |
|||
|
|||
KEEP (*crtbegin.o(.dtors)) |
|||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) |
|||
KEEP (*(SORT(.dtors.*))) |
|||
KEEP (*crtend.o(.dtors)) |
|||
|
|||
. = ALIGN(4); |
|||
_efixed = .; /* End of text section */ |
|||
} > ram |
|||
|
|||
. = ALIGN(4); |
|||
_etext = .; |
|||
|
|||
.relocate : AT (_etext) |
|||
{ |
|||
. = ALIGN(4); |
|||
_srelocate = .; |
|||
*(.ramfunc .ramfunc.*); |
|||
*(.data .data.*); |
|||
. = ALIGN(4); |
|||
_erelocate = .; |
|||
} > ram |
|||
|
|||
/* .bss section which is used for uninitialized data */ |
|||
.bss (NOLOAD) : |
|||
{ |
|||
. = ALIGN(4); |
|||
_sbss = . ; |
|||
_szero = .; |
|||
*(.bss .bss.*) |
|||
*(COMMON) |
|||
. = ALIGN(4); |
|||
_ebss = . ; |
|||
_ezero = .; |
|||
} > ram |
|||
|
|||
/* stack section */ |
|||
.stack (NOLOAD): |
|||
{ |
|||
. = ALIGN(8); |
|||
_sstack = .; |
|||
. = . + STACK_SIZE; |
|||
. = ALIGN(8); |
|||
_estack = .; |
|||
} > ram |
|||
|
|||
/* .ARM.exidx is sorted, so has to go in its own output section. */ |
|||
PROVIDE_HIDDEN (__exidx_start = .); |
|||
.ARM.exidx : |
|||
{ |
|||
*(.ARM.exidx* .gnu.linkonce.armexidx.*) |
|||
} > ram |
|||
PROVIDE_HIDDEN (__exidx_end = .); |
|||
|
|||
. = ALIGN(4); |
|||
_end = . ; |
|||
} |
|||
|
|||
@ -0,0 +1,49 @@ |
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/ |
|||
/*-Editor annotation file-*/ |
|||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ |
|||
/*-Vector table start*/ |
|||
define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/ |
|||
/*-Memory Regions-*/ |
|||
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; |
|||
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; |
|||
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; |
|||
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; |
|||
define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000; |
|||
define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF; |
|||
define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000; |
|||
define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF; |
|||
/*-Sizes-*/ |
|||
/*define symbol __ICFEDIT_size_cstack__ = 0x1000;*//*for nandflash*/ |
|||
define symbol __ICFEDIT_size_cstack__ = 0x2000; |
|||
define symbol __ICFEDIT_size_heap__ = 0x200; |
|||
/*-Specials-*/ |
|||
/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ |
|||
/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ |
|||
/*-Exports-*/ |
|||
/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/ |
|||
export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ |
|||
/**** End of ICF editor section. ###ICF###*/ |
|||
|
|||
define memory mem with size = 4G; |
|||
/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/ |
|||
/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ |
|||
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; |
|||
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; |
|||
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | |
|||
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ |
|||
define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__]; |
|||
define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; |
|||
|
|||
/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ |
|||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; |
|||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; |
|||
|
|||
initialize by copy { readwrite }; |
|||
do not initialize { section .noinit }; |
|||
|
|||
/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ |
|||
place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/ |
|||
place in ROM0_region { readonly }; |
|||
place in RAM0_region { readwrite, block HEAP }; |
|||
place in RAM1_region { block CSTACK }; /* for nandflash*/ |
|||
/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ |
|||
@ -0,0 +1,33 @@ |
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/ |
|||
/*-Editor annotation file-*/ |
|||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ |
|||
/*-Vector table start*/ |
|||
define symbol __ICFEDIT_vector_start__ = 0x20000000; |
|||
/*-Memory Regions-*/ |
|||
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; |
|||
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; |
|||
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; |
|||
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; |
|||
/*-Sizes-*/ |
|||
define symbol __ICFEDIT_size_cstack__ = 0x900; |
|||
define symbol __ICFEDIT_size_heap__ = 0x200; |
|||
/*-Exports-*/ |
|||
export symbol __ICFEDIT_vector_start__; |
|||
/**** End of ICF editor section. ###ICF###*/ |
|||
|
|||
define memory mem with size = 4G; |
|||
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; |
|||
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; |
|||
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | |
|||
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ |
|||
|
|||
/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ |
|||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; |
|||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; |
|||
|
|||
initialize by copy { readwrite }; |
|||
do not initialize { section .noinit }; |
|||
|
|||
place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; |
|||
place in RAM0_region { readonly }; |
|||
place in RAM1_region { readwrite, block CSTACK, block HEAP }; |
|||
@ -0,0 +1,21 @@ |
|||
/*
|
|||
Copyright (c) 2011 Arduino. All right reserved. |
|||
|
|||
This library is free software; you can redistribute it and/or |
|||
modify it under the terms of the GNU Lesser General Public |
|||
License as published by the Free Software Foundation; either |
|||
version 2.1 of the License, or (at your option) any later version. |
|||
|
|||
This library is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
|||
See the GNU Lesser General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU Lesser General Public |
|||
License along with this library; if not, write to the Free Software |
|||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
|||
*/ |
|||
|
|||
// API compatibility
|
|||
#include "variant.h" |
|||
|
|||
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Reference in new issue