diff --git a/.gitignore b/.gitignore old mode 100644 new mode 100755 index 1973d58ac1..0469a4d7f7 --- a/.gitignore +++ b/.gitignore @@ -19,9 +19,9 @@ # along with this program. If not, see . # -# Our automatic versioning scheme generates the following file -# NEVER put it in the repository +# Generated files _Version.h +bdf2u8g # # OS @@ -77,7 +77,6 @@ tags *.out *.app - # # C # @@ -149,7 +148,7 @@ Marlin/*/*/*/*/readme.txt # Secure Credentials Configuration_Secure.h -#Visual Studio +# Visual Studio *.sln *.vcxproj *.vcxproj.user @@ -160,36 +159,35 @@ __vm/ .vs/ vc-fileutils.settings -#Visual Studio Code +# Visual Studio Code .vscode .vscode/.browse.c_cpp.db* .vscode/c_cpp_properties.json .vscode/launch.json .vscode/*.db -#cmake +# cmake CMakeLists.txt src/CMakeLists.txt CMakeListsPrivate.txt -#CLion +# CLion cmake-build-* -#Eclipse +# Eclipse .project .cproject .pydevproject .settings .classpath -#Python +# Python __pycache__ #Ozone ozone.jdebug ozone.jdebug.user -*.txt - -# Windows users need this to prevent adding build tree to git -buildroot/* \ No newline at end of file +# Simulation / Native +eeprom.dat +imgui.ini diff --git a/buildroot/bin/build_all_examples b/buildroot/bin/build_all_examples new file mode 100755 index 0000000000..bce95dce88 --- /dev/null +++ b/buildroot/bin/build_all_examples @@ -0,0 +1,101 @@ +#!/usr/bin/env bash +# +# build_all_examples base_branch [resume_point] +# + +GITREPO=https://github.com/MarlinFirmware/Configurations.git +STAT_FILE=./.pio/.buildall + +# Check dependencies +which curl 1>/dev/null 2>&1 || { echo "curl not found! Please install it."; exit ; } +which git 1>/dev/null 2>&1 || { echo "git not found! Please install it."; exit ; } + +SED=$(command -v gsed 2>/dev/null || command -v sed 2>/dev/null) +[[ -z "$SED" ]] && { echo "No sed found, please install sed" ; exit 1 ; } + +SELF=`basename "$0"` +HERE=`dirname "$0"` + +# Check if called in the right location +[[ -e "Marlin/src" ]] || { echo -e "This script must be called from a Marlin working copy with:\n ./buildroot/bin/$SELF $1" ; exit ; } + +if [[ $# -lt 1 || $# -gt 2 ]]; then + echo "Usage: $SELF base_branch [resume_point] + base_branch - Configuration branch to download and build + resume_point - Configuration path to start from" + exit +fi + +echo "This script downloads all Configurations and builds Marlin with each one." +echo "On failure the last-built configs will be left in your working copy." +echo "Restore your configs with 'git checkout -f' or 'git reset --hard HEAD'." + +unset BRANCH +unset FIRST_CONF +if [[ -f "$STAT_FILE" ]]; then + IFS='*' read BRANCH FIRST_CONF <"$STAT_FILE" +fi + +# If -c is given start from the last attempted build +if [[ $1 == '-c' ]]; then + if [[ -z $BRANCH || -z $FIRST_CONF ]]; then + echo "Nothing to continue" + exit + fi +elif [[ $1 == '-s' ]]; then + if [[ -n $BRANCH && -n $FIRST_CONF ]]; then + SKIP_CONF=1 + else + echo "Nothing to skip" + exit + fi +else + BRANCH=${1:-"import-2.0.x"} + FIRST_CONF=$2 +fi + +# Check if the current repository has unmerged changes +if [[ $SKIP_CONF ]]; then + echo "Skipping $FIRST_CONF" +elif [[ $FIRST_CONF ]]; then + echo "Resuming from $FIRST_CONF" +else + git diff --quiet || { echo "The working copy is modified. Commit or stash changes before proceeding."; exit ; } +fi + +# Create a temporary folder inside .pio +TMP=./.pio/build-$BRANCH +[[ -d "$TMP" ]] || mkdir -p $TMP + +# Download Configurations into the temporary folder +if [[ ! -e "$TMP/README.md" ]]; then + echo "Downloading Configurations from GitHub into $TMP" + git clone --depth=1 --single-branch --branch "$BRANCH" $GITREPO "$TMP" || { echo "Failed to clone the configuration repository"; exit ; } +else + echo "Using previously downloaded Configurations at $TMP" +fi + +echo -e "Start building now...\n=====================" +shopt -s nullglob +IFS=' +' +CONF_TREE=$( ls -d "$TMP"/config/examples/*/ "$TMP"/config/examples/*/*/ "$TMP"/config/examples/*/*/*/ "$TMP"/config/examples/*/*/*/*/ | grep -vE ".+\.(\w+)$" ) +DOSKIP=0 +for CONF in $CONF_TREE ; do + # Get a config's directory name + DIR=$( echo $CONF | sed "s|$TMP/config/examples/||" ) + # If looking for a config, skip others + [[ $FIRST_CONF ]] && [[ $FIRST_CONF != $DIR && "$FIRST_CONF/" != $DIR ]] && continue + # Once found, stop looking + unset FIRST_CONF + # If skipping, don't build the found one + [[ $SKIP_CONF ]] && { unset SKIP_CONF ; continue ; } + # ...if skipping, don't build this one + compgen -G "${CONF}Con*.h" > /dev/null || continue + echo "${BRANCH}*${DIR}" >"$STAT_FILE" + "$HERE/build_example" "internal" "$TMP" "$DIR" || { echo "Failed to build $DIR"; exit ; } +done + +# Delete the temp folder and build state +[[ -e "$TMP/config/examples" ]] && rm -rf "$TMP" +rm "$STAT_FILE" diff --git a/buildroot/bin/build_example b/buildroot/bin/build_example new file mode 100755 index 0000000000..8ebb58f972 --- /dev/null +++ b/buildroot/bin/build_example @@ -0,0 +1,29 @@ +#!/usr/bin/env bash +# +# build_example +# +# Usage: build_example internal config-home config-folder +# + +# Require 'internal' as the first argument +[[ "$1" == "internal" ]] || { echo "Don't call this script directly, use build_all_examples instead." ; exit 1 ; } + +echo "Testing $3:" + +SUB=$2/config/examples/$3 +[[ -d "$SUB" ]] || { echo "$SUB is not a good path" ; exit 1 ; } + +compgen -G "${SUB}Con*.h" > /dev/null || { echo "No configuration files found in $SUB" ; exit 1 ; } + +echo "Getting configuration files from $SUB" +cp "$2/config/default"/*.h Marlin/ +cp "$SUB"/Configuration.h Marlin/ 2>/dev/null +cp "$SUB"/Configuration_adv.h Marlin/ 2>/dev/null +cp "$SUB"/_Bootscreen.h Marlin/ 2>/dev/null +cp "$SUB"/_Statusscreen.h Marlin/ 2>/dev/null + +echo "Building the firmware now..." +HERE=`dirname "$0"` +$HERE/mftest -a -n1 || { echo "Failed"; exit 1; } + +echo "Success" diff --git a/buildroot/bin/mftest b/buildroot/bin/mftest new file mode 100755 index 0000000000..4cecf4f3a5 --- /dev/null +++ b/buildroot/bin/mftest @@ -0,0 +1,311 @@ +#!/usr/bin/env bash +# +# mftest Select a test to apply and build +# mftest -b [#] Build the auto-detected environment +# mftest -u [#] Upload the auto-detected environment +# mftest [name] [index] [-y] Set config options and optionally build a test +# + +[[ -d Marlin/src ]] || { echo "Please 'cd' to the Marlin repo root." ; exit 1 ; } + +perror() { echo -e "$0: \033[0;31m$1 -- $2\033[0m" ; } +errout() { echo -e "\033[0;31m$1\033[0m" ; } +bugout() { ((DEBUG)) && echo -e "\033[0;32m$1\033[0m" ; } + +usage() { + echo " +Usage: mftest [-t|--env=] [-n|--num=] [-m|--make] [-y|--build=] + mftest [-a|--autobuild] + mftest [-r|--rebuild] + mftest [-u|--autoupload] [-n|--num=] + +OPTIONS + -t --env The environment of the test to apply / run. (As named in platformio.ini.) + -n --num The index of the test to run. (In file order.) + -m --make Use the make / Docker method for the build. + -y --build Skip 'Do you want to build this test?' and assume YES. + -h --help Print this help. + -a --autobuild PIO Build using the MOTHERBOARD environment. + -u --autoupload PIO Upload using the MOTHERBOARD environment. + -v --verbose Extra output for debugging. + +env shortcuts: tree due esp lin lpc|lpc8 lpc9 m128 m256|mega stm|f1 f4 f7 s6 teensy|t31|t32 t35|t36 t40|t41 +" +} + +TESTPATH=buildroot/tests + +STATE_FILE="./.pio/.mftestrc" +SED=$(which gsed || which sed) + +shopt -s extglob nocasematch + +# Matching patterns +ISNUM='^[0-9]+$' +ISCMD='^(restore|opt|exec|use|pins|env)_' +ISEXEC='^exec_' +ISCONT='\\ *$' + +# Get environment, test number, etc. from the command +TESTENV='-' +CHOICE=0 +DEBUG=0 + +while getopts 'abhmruvyn:t:-:' OFLAG; do + case "${OFLAG}" in + a) AUTO_BUILD=1 ; bugout "Auto-Build target..." ;; + h) EXIT_USAGE=1 ;; + m) USE_MAKE=1 ; bugout "Using make with Docker..." ;; + n) case "$OPTARG" in + *[!0-9]*) perror "option requires a number" $OFLAG ; EXIT_USAGE=2 ;; + *) CHOICE="$OPTARG" ; bugout "Got a number: $CHOICE" ;; + esac + ;; + r) REBUILD=1 ; bugout "Rebuilding previous..." ;; + t) TESTENV="$OPTARG" ; bugout "Got a target: $TESTENV" ;; + u) AUTO_BUILD=2 ; bugout "Auto-Upload target..." ;; + v) DEBUG=1 ; bugout "Debug ON" ;; + y) BUILD_YES='Y' ; bugout "Build will initiate..." ;; + -) IFS="=" read -r ONAM OVAL <<< "$OPTARG" + case "$ONAM" in + help) [[ -z "$OVAL" ]] || perror "option can't take value $OVAL" $ONAM ; EXIT_USAGE=1 ;; + autobuild) AUTO_BUILD=1 ; bugout "Auto-Build target..." ;; + autoupload) AUTO_BUILD=2 ; bugout "Auto-Upload target..." ;; + env) case "$OVAL" in + '') perror "option requires a value" $ONAM ; EXIT_USAGE=2 ;; + *) TESTENV="$OVAL" ; bugout "Got a target: $TESTENV" ;; + esac + ;; + num) case "$OVAL" in + [0-9]+) CHOICE="$OVAL" ; bugout "Got a number: $CHOICE" ;; + *) perror "option requires a value" $ONAM ; EXIT_USAGE=2 ;; + esac + ;; + rebuild) REBUILD=1 ; bugout "Rebuilding previous..." ;; + make) USE_MAKE=1 ; bugout "Using make with Docker..." ;; +debug|verbose) DEBUG=1 ; bugout "Debug ON" ;; + build) case "$OVAL" in + ''|y|yes) BUILD_YES='Y' ;; + n|no) BUILD_YES='N' ;; + *) perror "option value must be y, n, yes, or no" $ONAM ; EXIT_USAGE=2 ;; + esac + bugout "Build will initiate? ($BUILD_YES)" + ;; + *) perror "Unknown flag" "$OPTARG" ; EXIT_USAGE=2 ;; + esac + ;; + *) EXIT_USAGE=2 ;; + esac +done + +((EXIT_USAGE)) && { usage ; let EXIT_USAGE-- ; exit $EXIT_USAGE ; } + +if ((REBUILD)); then + bugout "Rebuilding previous..." + # Build with the last-built env + [[ -f "$STATE_FILE" ]] || { errout "No previous (-r) build state found." ; exit 1 ; } + read TESTENV <"$STATE_FILE" + pio run -s -d . -e $TESTENV + exit +fi + +case $TESTENV in + tree) pio run -d . -e include_tree ; exit 1 ;; + due) TESTENV='DUE' ;; + esp) TESTENV='esp32' ;; + lin*) TESTENV='linux_native' ;; +lp8|lpc8) TESTENV='LPC1768' ;; +lp9|lpc9) TESTENV='LPC1769' ;; + m128) TESTENV='mega1280' ;; + m256) TESTENV='mega2560' ;; + mega) TESTENV='mega2560' ;; + stm) TESTENV='STM32F103RE' ;; + f1) TESTENV='STM32F103RE' ;; + f4) TESTENV='STM32F4' ;; + f7) TESTENV='STM32F7' ;; + s6) TESTENV='FYSETC_S6' ;; + teensy) TESTENV='teensy31' ;; + t31) TESTENV='teensy31' ;; + t32) TESTENV='teensy31' ;; + t35) TESTENV='teensy35' ;; + t36) TESTENV='teensy35' ;; + t40) TESTENV='teensy41' ;; + t41) TESTENV='teensy41' ;; +[1-9][1-9]|[1-9]) TESTNUM=$TESTENV ; TESTENV=- ;; +esac + +if ((AUTO_BUILD)); then + # + # List environments that apply to the current MOTHERBOARD. + # + case $(uname | tr '[:upper:]' '[:lower:]') in + darwin) SYS='mac' ;; + *linux) SYS='lin' ;; + win*) SYS='win' ;; + msys*) SYS='win' ;; + cygwin*) SYS='win' ;; + mingw*) SYS='win' ;; + *) SYS='uni' ;; + esac + echo ; echo -n "Auto " ; ((AUTO_BUILD == 2)) && echo "Upload..." || echo "Build..." + MB=$( grep -E "^\s*#define MOTHERBOARD" Marlin/Configuration.h | awk '{ print $3 }' | $SED 's/BOARD_//' ) + [[ -z $MB ]] && { echo "Error - Can't read MOTHERBOARD setting." ; exit 1 ; } + BLINE=$( grep -E "define\s+BOARD_$MB\b" Marlin/src/core/boards.h ) + BNUM=$( $SED -E 's/^.+BOARD_[^ ]+ +([0-9]+).+$/\1/' <<<"$BLINE" ) + BDESC=$( $SED -E 's/^.+\/\/ *(.+)$/\1/' <<<"$BLINE" ) + [[ -z $BNUM ]] && { echo "Error - Can't find $MB in boards list." ; exit 1 ; } + ENVS=( $( grep -EA1 "MB\(.*\b$MB\b.*\)" Marlin/src/pins/pins.h | grep -E "#include.+//.+(env|$SYS):[^ ]+" | grep -oE "(env|$SYS):[^ ]+" | $SED -E "s/(env|$SYS)://" ) ) + [[ -z $ENVS ]] && { errout "Error - Can't find target(s) for $MB ($BNUM)." ; exit 1 ; } + ECOUNT=${#ENVS[*]} + + if [[ $ECOUNT == 1 ]]; then + TARGET=$ENVS + else + if [[ $CHOICE == 0 ]]; then + # List env names and numbers. Get selection. + echo "Available targets for \"$BDESC\" | $MB ($BNUM):" + + IND=0 ; for ENV in "${ENVS[@]}"; do let IND++ ; echo " $IND) $ENV" ; done + + if [[ $ECOUNT > 1 ]]; then + for (( ; ; )) + do + read -p "Select a target for '$MB' (1-$ECOUNT) : " CHOICE + [[ -z "$CHOICE" ]] && { echo '(canceled)' ; exit 1 ; } + [[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= ECOUNT)) && break + errout ">>> Invalid environment choice '$CHOICE'." + done + echo + fi + else + echo "Detected \"$BDESC\" | $MB ($BNUM)." + [[ $CHOICE > $ECOUNT ]] && { echo "Environment selection out of range." ; exit 1 ; } + fi + TARGET="${ENVS[$CHOICE-1]}" + echo "Selected $TARGET" + fi + + echo "$TARGET" >"$STATE_FILE" + + if ((AUTO_BUILD == 2)); then + echo "Uploading environment $TARGET for board $MB ($BNUM)..." ; echo + pio run -t upload -e $TARGET + else + echo "Building environment $TARGET for board $MB ($BNUM)..." ; echo + pio run -s -e $TARGET + fi + exit +fi + +# +# List available tests and ask for selection +# + +if [[ $TESTENV == '-' ]]; then + IND=0 + NAMES=() + for FILE in $( ls -1 $TESTPATH/* ) + do + let IND++ + TNAME=${FILE/$TESTPATH\//} + NAMES+=($TNAME) + (( IND < 10 )) && echo -n " " + echo " $IND) $TNAME" + done + + echo + for (( ; ; )) + do + if [[ $TESTNUM -gt 0 ]]; then + NAMEIND=$TESTNUM + else + read -p "Select a test to apply (1-$IND) : " NAMEIND + fi + [[ -z $NAMEIND ]] && { errout "(canceled)" ; exit 1 ; } + TESTENV=${NAMES[$NAMEIND-1]} + [[ $TESTNUM -gt 0 ]] && { echo "Preselected test $TESTNUM ... ($TESTENV)" ; TESTNUM='' ; } + [[ $NAMEIND =~ $ISNUM ]] && ((NAMEIND >= 1 && NAMEIND <= IND)) && { TESTENV=${NAMES[$NAMEIND-1]} ; echo ; break ; } + errout "Invalid selection." + done +fi + +# Get the contents of the test file +OUT=$( cat $TESTPATH/$TESTENV 2>/dev/null ) || { errout "Can't find test '$TESTENV'." ; exit 1 ; } + +# Count up the number of tests +TESTCOUNT=$( awk "/$ISEXEC/{a++}END{print a}" <<<"$OUT" ) + +# User entered a number? +(( CHOICE && CHOICE > TESTCOUNT )) && { errout "Invalid test selection '$CHOICE' (1-$TESTCOUNT)." ; exit 1 ; } + +if [[ $CHOICE == 0 ]]; then + # + # List test descriptions with numbers and get selection + # + echo "Available '$TESTENV' tests:" ; echo "$OUT" | { + IND=0 + while IFS= read -r LINE + do + if [[ $LINE =~ $ISEXEC ]]; then + DESC=$( "$SED" -E 's/^exec_test \$1 \$2 "([^"]+)".*$/\1/g' <<<"$LINE" ) + (( ++IND < 10 )) && echo -n " " + echo " $IND) $DESC" + fi + done + } + CHOICE=1 + if [[ $TESTCOUNT > 1 ]]; then + for (( ; ; )) + do + read -p "Select a '$TESTENV' test (1-$TESTCOUNT) : " CHOICE + [[ -z "$CHOICE" ]] && { errout "(canceled)" ; exit 1 ; } + [[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= TESTCOUNT)) && break + errout ">>> Invalid test selection '$CHOICE'." + done + fi +fi + +# +# Run the specified test lines +# +echo -ne "\033[0;33m" +echo "$OUT" | { + IND=0 + GOTX=0 + CMD="" + while IFS= read -r LINE + do + if [[ $LINE =~ $ISCMD || $GOTX == 1 ]]; then + ((!IND)) && let IND++ + if [[ $LINE =~ $ISEXEC ]]; then + ((IND++ > CHOICE)) && break + else + ((!HEADER)) && { + HEADER=1 + echo -e "\n#\n# Test $TESTENV ($CHOICE) $DESC\n#" + } + ((IND == CHOICE)) && { + GOTX=1 + [[ $CMD == "" ]] && CMD="$LINE" || CMD=$( echo -e "$CMD$LINE" | $SED -e 's/\\//g' | $SED -E 's/ +/ /g' ) + [[ $LINE =~ $ISCONT ]] || { echo "$CMD" ; eval "$CMD" ; CMD="" ; } + } + fi + fi + done +} +echo -ne "\033[0m" + +# Make clear it's a TEST +opt_set CUSTOM_MACHINE_NAME "\"Test $TESTENV ($CHOICE)\"" + +# Build the test too? +if [[ -z "$BUILD_YES" ]]; then + echo + read -p "Build $TESTENV test #$CHOICE (y/N) ? " BUILD_YES +fi + +[[ $BUILD_YES == 'Y' || $BUILD_YES == 'Yes' ]] && { + ((USE_MAKE)) && make tests-single-local TEST_TARGET=$TESTENV ONLY_TEST=$CHOICE + ((USE_MAKE)) || pio run -s -d . -e $TESTENV + echo "$TESTENV" >"$STATE_FILE" +} diff --git a/buildroot/bin/opt_enable b/buildroot/bin/opt_enable index 96686d6c68..9161299b6e 100755 --- a/buildroot/bin/opt_enable +++ b/buildroot/bin/opt_enable @@ -7,7 +7,7 @@ SED=$(which gsed || which sed) for opt in "$@" ; do # Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648 - eval "${SED} -i '/\(\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" || - eval "${SED} -i '/\(\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" || + eval "${SED} -i '/^\([[:blank:]]*\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" || + eval "${SED} -i '/^\([[:blank:]]*\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" || (echo "ERROR: opt_enable Can't find ${opt}" >&2 && exit 9) done diff --git a/buildroot/bin/opt_set b/buildroot/bin/opt_set index a646e09ae7..2e63790c69 100755 --- a/buildroot/bin/opt_set +++ b/buildroot/bin/opt_set @@ -5,8 +5,12 @@ set -e SED=$(which gsed || which sed) -# Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648 -eval "${SED} -i '/\(\/\/\)*\([[:blank:]]*\)\(#define\s\+\b${1}\b\).*$/{s//\2\3 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" || -eval "${SED} -i '/\(\/\/\)*\([[:blank:]]*\)\(#define\s\+\b${1}\b\).*$/{s//\2\3 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" || -eval "echo '#define ${@}' >>Marlin/Configuration_adv.h" || -(echo "ERROR: opt_set Can't set or add ${1}" >&2 && exit 9) +ARGC=$# +while [[ $# > 1 ]]; do + # Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648 + eval "${SED} -i '/^\([[:blank:]]*\)\(\/\/\)*\([[:blank:]]*\)\(#define\s\+\b${1}\b\).*$/{s//\1\3\4 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" || + eval "${SED} -i '/^\([[:blank:]]*\)\(\/\/\)*\([[:blank:]]*\)\(#define\s\+\b${1}\b\).*$/{s//\1\3\4 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" || + eval "echo '#define ${1} ${2}' >>Marlin/Configuration.h" || + (echo "ERROR: opt_set Can't set or add ${1}" >&2 && exit 9) + shift 2 +done diff --git a/buildroot/bin/pins_set b/buildroot/bin/pins_set index 87a8692aa2..860c64940f 100755 --- a/buildroot/bin/pins_set +++ b/buildroot/bin/pins_set @@ -7,5 +7,5 @@ PIN=$2 VAL=$3 SED=$(which gsed || which sed) -eval "${SED} -i '/\(\/\/\)*\(#define \+${PIN}\b\).*$/{s//\2 ${VAL}/;h};\${x;/./{x;q0};x;q9}' Marlin/src/pins/$DIR/pins_${NAM}.h" || +eval "${SED} -i '/^[[:blank:]]*\(\/\/\)*[[:blank:]]*\(#define \+${PIN}\b\).*$/{s//\2 ${VAL}/;h};\${x;/./{x;q0};x;q9}' Marlin/src/pins/$DIR/pins_${NAM}.h" || (echo "ERROR: pins_set Can't find ${PIN}" >&2 && exit 9) diff --git a/buildroot/bin/run_tests b/buildroot/bin/run_tests new file mode 100755 index 0000000000..26284fa693 --- /dev/null +++ b/buildroot/bin/run_tests @@ -0,0 +1,77 @@ +#!/usr/bin/env bash +# +# run_tests +# +HERE="$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P )" +TESTS="$HERE/../tests" +export PATH="$HERE:$TESTS:$PATH" + +# exit on first failure +set -e + +exec_test () { + printf "\n\033[0;32m[Test $2] \033[0m$3...\n" + # Check to see if we should skip tests + if [[ -n "$4" ]] ; then + if [[ ! "$3" =~ $4 ]] ; then + printf "\033[1;33mSkipped\033[0m\n" + return 0 + fi + fi + if [[ -z "$VERBOSE_PLATFORMIO" ]] ; then + silent="--silent" + else + silent="-v" + fi + if platformio run --project-dir $1 -e $2 $silent; then + printf "\033[0;32mPassed\033[0m\n" + return 0 + else + if [[ -n $GIT_RESET_HARD ]]; then + git reset --hard HEAD + else + restore_configs + fi + printf "\033[0;31mFailed!\033[0m\n" + return 1 + fi +} +export -f exec_test + +printf "Running \033[0;32m$2\033[0m Tests\n" + +if [[ $2 = "ALL" ]]; then + tests=("$TESTS"/*) + for f in "${tests[@]}"; do + testenv=$(basename $f) + printf "Running \033[0;32m$f\033[0m Tests\n" + exec_test $1 "$testenv --target clean" "Setup Build Environment" + if [[ $GIT_RESET_HARD == "true" ]]; then + git reset --hard HEAD + else + restore_configs + fi + done +else + exec_test $1 "$2 --target clean" "Setup Build Environment" + test_name="$3" + # If the test name is 1 or 2 digits, treat it as an index + if [[ "$test_name" =~ ^[0-9][0-9]?$ ]] ; then + # Find the test name that corresponds to that index + test_name="$(cat $TESTS/$2 | grep -e '^exec_test' | sed -n "$3p" | sed "s/.*\$1 \$2 \"\([^\"]*\).*/\1/g")" + if [[ -z "$test_name" ]] ; then + # Fail if none matches + printf "\033[0;31mCould not find test \033[0m#$3\033[0;31m in \033[0mbuildroot/tests/$2\n" + exit 1 + else + printf "\033[0;32mMatching test \033[0m#$3\033[0;32m: '\033[0m$test_name\033[0;32m'\n" + fi + fi + $TESTS/$2 $1 $2 "$test_name" + if [[ $GIT_RESET_HARD == "true" ]]; then + git reset --hard HEAD + else + restore_configs + fi +fi +printf "\033[0;32mAll tests completed successfully\033[0m\n" diff --git a/buildroot/share/PlatformIO/boards/FYSETC_CHEETAH_V20.json b/buildroot/share/PlatformIO/boards/FYSETC_CHEETAH_V20.json new file mode 100644 index 0000000000..ff082fdc1f --- /dev/null +++ b/buildroot/share/PlatformIO/boards/FYSETC_CHEETAH_V20.json @@ -0,0 +1,66 @@ +{ + "build": { + "core": "stm32", + "cpu": "cortex-m4", + "extra_flags": "-DSTM32F401xx", + "f_cpu": "84000000L", + "hwids": [ + [ + "0x1EAF", + "0x0003" + ], + [ + "0x0483", + "0x3748" + ] + ], + "ldscript": "stm32f401rc.ld", + "mcu": "stm32f401rct6", + "variant": "FYSETC_CHEETAH_V20" + }, + "debug": { + "jlink_device": "STM32F401RC", + "openocd_target": "stm32f4x", + "svd_path": "STM32F40x.svd", + "tools": { + "stlink": { + "server": { + "arguments": [ + "-f", + "scripts/interface/stlink.cfg", + "-c", + "transport select hla_swd", + "-f", + "scripts/target/stm32f4x.cfg", + "-c", + "reset_config none" + ], + "executable": "bin/openocd", + "package": "tool-openocd" + } + } + } + }, + "frameworks": [ + "arduino", + "stm32cube" + ], + "name": "STM32F401RC (64k RAM. 256k Flash)", + "upload": { + "disable_flushing": false, + "maximum_ram_size": 65536, + "maximum_size": 262144, + "protocol": "stlink", + "protocols": [ + "stlink", + "dfu", + "jlink" + ], + "offset_address": "0x800C000", + "require_upload_port": true, + "use_1200bps_touch": false, + "wait_for_upload_port": false + }, + "url": "https://www.fysetc.com", + "vendor": "Generic" +} diff --git a/buildroot/share/PlatformIO/boards/archim.json b/buildroot/share/PlatformIO/boards/archim.json new file mode 100644 index 0000000000..60035197f2 --- /dev/null +++ b/buildroot/share/PlatformIO/boards/archim.json @@ -0,0 +1,59 @@ +{ + "build": { + "core": "arduino", + "cpu": "cortex-m3", + "extra_flags": "-D__SAM3X8E__ -DARDUINO_ARCH_SAM -DARDUINO_SAM_DUE", + "f_cpu": "84000000L", + "hwids": [ + [ + "0x27B1", + "0x0001" + ], + [ + "0x2341", + "0x003E" + ], + [ + "0x2341", + "0x003D" + ] + ], + "ldscript": "linker_scripts/gcc/flash.ld", + "mcu": "at91sam3x8e", + "usb_product": "Archim", + "variant": "archim" + }, + "connectivity": [ + "can" + ], + "debug": { + "jlink_device": "ATSAM3X8E", + "openocd_chipname": "at91sam3X8E", + "openocd_target": "at91sam3XXX", + "svd_path": "ATSAM3X8E.svd" + }, + "frameworks": [ + "arduino", + "simba" + ], + "name": "Archim", + "upload": { + "disable_flushing": true, + "maximum_ram_size": 98304, + "maximum_size": 524288, + "native_usb": true, + "protocol": "sam-ba", + "protocols": [ + "sam-ba", + "jlink", + "blackmagic", + "atmel-ice", + "stlink" + ], + "require_upload_port": true, + "use_1200bps_touch": true, + "wait_for_upload_port": true + }, + "url": "https://ultimachine.com", + "vendor": "UltiMachine" +} diff --git a/buildroot/share/PlatformIO/boards/fysetc_f6.json b/buildroot/share/PlatformIO/boards/fysetc_f6.json new file mode 100644 index 0000000000..2772f73a65 --- /dev/null +++ b/buildroot/share/PlatformIO/boards/fysetc_f6.json @@ -0,0 +1,34 @@ +{ + "build": { + "core": "arduino", + "extra_flags": "-DARDUINO_AVR_MEGA2560", + "f_cpu": "16000000L", + "hwids": [ + [ + "0x27b2", + "0x0002" + ] + ], + "mcu": "atmega2560", + "variant": "fysetcf6" + }, + "debug": { + "simavr_target": "atmega2560", + "avr-stub": { + "speed": 115200 + } + }, + "frameworks": [ + "arduino" + ], + "name": "FYSETC F6", + "upload": { + "maximum_ram_size": 8192, + "maximum_size": 258048, + "protocol": "wiring", + "require_upload_port": true, + "speed": 115200 + }, + "url": "https://www.fysetc.com/", + "vendor": "FYSETC" +} diff --git a/buildroot/share/PlatformIO/boards/genericSTM32F407VGT6.json b/buildroot/share/PlatformIO/boards/genericSTM32F407VGT6.json new file mode 100644 index 0000000000..8c211a8549 --- /dev/null +++ b/buildroot/share/PlatformIO/boards/genericSTM32F407VGT6.json @@ -0,0 +1,56 @@ +{ + "build": { + "core": "stm32", + "cpu": "cortex-m4", + "extra_flags": "-DSTM32F407xx -DSTM32F4", + "f_cpu": "168000000L", + "hwids": [ + [ + "0x1EAF", + "0x0003" + ], + [ + "0x0483", + "0x3748" + ] + ], + "mcu": "stm32f407vgt6", + "product_line": "STM32F407xx", + "variant": "Generic_F4x7Vx" + }, + "debug": { + "default_tools": [ + "stlink" + ], + "jlink_device": "STM32F407VG", + "openocd_extra_args": [ + "-c", + "reset_config none" + ], + "openocd_target": "stm32f4x", + "svd_path": "STM32F40x.svd" + }, + "frameworks": [ + "arduino", + "cmsis", + "stm32cube", + "libopencm3" + ], + "name": "STM32F407VG (128k RAM, 64k CCM RAM, 1024k Flash", + "upload": { + "disable_flushing": false, + "maximum_ram_size": 131072, + "maximum_size": 1048576, + "protocol": "stlink", + "protocols": [ + "stlink", + "dfu", + "jlink" + ], + "require_upload_port": true, + "use_1200bps_touch": false, + "wait_for_upload_port": false + }, + "url": "https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f4-series/stm32f407-417/stm32f407vg.html", + "vendor": "Generic" +} diff --git a/buildroot/share/PlatformIO/boards/marlin_fysetc_s6.json b/buildroot/share/PlatformIO/boards/marlin_fysetc_s6.json new file mode 100644 index 0000000000..286e46ffbd --- /dev/null +++ b/buildroot/share/PlatformIO/boards/marlin_fysetc_s6.json @@ -0,0 +1,35 @@ +{ + "build": { + "cpu": "cortex-m4", + "extra_flags": "-DSTM32F446xx", + "f_cpu": "180000000L", + "mcu": "stm32f446ret6", + "variant": "MARLIN_FYSETC_S6" + }, + "connectivity": [ + "can" + ], + "debug": { + "jlink_device": "STM32F446RE", + "openocd_target": "stm32f4x", + "svd_path": "STM32F446x.svd" + }, + "frameworks": [ + "arduino", + "stm32cube" + ], + "name": "3D Printer control board", + "upload": { + "maximum_ram_size": 131072, + "maximum_size": 524288, + "protocol": "stlink", + "protocols": [ + "jlink", + "stlink", + "blackmagic", + "serial" + ] + }, + "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html", + "vendor": "FYSETC" +} diff --git a/buildroot/share/PlatformIO/ldscripts/fly_mini.ld b/buildroot/share/PlatformIO/ldscripts/fly_mini.ld new file mode 100644 index 0000000000..2404e7cac9 --- /dev/null +++ b/buildroot/share/PlatformIO/ldscripts/fly_mini.ld @@ -0,0 +1,14 @@ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40 + rom (rx) : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K +} + +/* Provide memory region aliases for common.inc */ +REGION_ALIAS("REGION_TEXT", rom); +REGION_ALIAS("REGION_DATA", ram); +REGION_ALIAS("REGION_BSS", ram); +REGION_ALIAS("REGION_RODATA", rom); + +/* Let common.inc handle the real work. */ +INCLUDE common.inc diff --git a/buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld b/buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld new file mode 100644 index 0000000000..d8a138ca2e --- /dev/null +++ b/buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld @@ -0,0 +1,14 @@ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40 + rom (rx) : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K +} + +/* Provide memory region aliases for common.inc */ +REGION_ALIAS("REGION_TEXT", rom); +REGION_ALIAS("REGION_DATA", ram); +REGION_ALIAS("REGION_BSS", ram); +REGION_ALIAS("REGION_RODATA", rom); + +/* Let common.inc handle the real work. */ +INCLUDE common.inc diff --git a/buildroot/share/PlatformIO/scripts/SAMD51_grandcentral_m4.py b/buildroot/share/PlatformIO/scripts/SAMD51_grandcentral_m4.py new file mode 100644 index 0000000000..9e37024d11 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/SAMD51_grandcentral_m4.py @@ -0,0 +1,19 @@ +# +# SAMD51_grandcentral_m4.py +# Customizations for env:SAMD51_grandcentral_m4 +# +from os.path import join, isfile +import shutil +from pprint import pprint + +Import("env") + +mf = env["MARLIN_FEATURES"] +rxBuf = mf["RX_BUFFER_SIZE"] if "RX_BUFFER_SIZE" in mf else "0" +txBuf = mf["TX_BUFFER_SIZE"] if "TX_BUFFER_SIZE" in mf else "0" + +serialBuf = str(max(int(rxBuf), int(txBuf), 350)) + +build_flags = env.get('BUILD_FLAGS') +build_flags.append("-DSERIAL_BUFFER_SIZE=" + serialBuf) +env.Replace(BUILD_FLAGS=build_flags) diff --git a/buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py b/buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py index 547d80ace5..6d7f21942e 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py @@ -1,3 +1,6 @@ +# +# STM32F103RC_MEEB_3DP.py +# try: import configparser except ImportError: diff --git a/buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py b/buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py index 497a035fdf..7e9dc676b6 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py @@ -1,3 +1,6 @@ +# +# STM32F103RC_SKR_MINI.py +# import os Import("env") diff --git a/buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py b/buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py index b69f62578b..1a7cc34edb 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py @@ -1,3 +1,6 @@ +# +# STM32F103RC_fysetc.py +# import os from os.path import join from os.path import expandvars diff --git a/buildroot/share/PlatformIO/scripts/creality.py b/buildroot/share/PlatformIO/scripts/STM32F103RET6_creality.py similarity index 94% rename from buildroot/share/PlatformIO/scripts/creality.py rename to buildroot/share/PlatformIO/scripts/STM32F103RET6_creality.py index b9d7d7039b..e3ef98b03f 100644 --- a/buildroot/share/PlatformIO/scripts/creality.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103RET6_creality.py @@ -1,3 +1,6 @@ +# +# STM32F103RET6_creality.py +# import os Import("env") diff --git a/buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py b/buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py index ecdd57f594..06e586f7f8 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py @@ -1,3 +1,6 @@ +# +# STM32F103RE_SKR_E3_DIP.py +# import os Import("env") diff --git a/buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py b/buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py index ece47ed096..321dd01b8d 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py +++ b/buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py @@ -1,3 +1,7 @@ +# +# STM32F103VE_longer.py +# Customizations for env:STM32F103VE_longer +# import os Import("env") @@ -14,7 +18,6 @@ for i, flag in enumerate(env["LINKFLAGS"]): elif flag == "-T": env["LINKFLAGS"][i + 1] = custom_ld_script - # Rename ${PROGNAME}.bin and save it as 'project.bin' (No encryption on the Longer3D) def encrypt(source, target, env): firmware = open(target[0].path, "rb") diff --git a/buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py b/buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py index 4849f59ceb..0ba5d71f26 100644 --- a/buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py +++ b/buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py @@ -1,3 +1,6 @@ +# +# STM32F1_create_variant.py +# import os,shutil from SCons.Script import DefaultEnvironment from platformio import util diff --git a/buildroot/share/PlatformIO/scripts/STEVAL__F401XX.py b/buildroot/share/PlatformIO/scripts/STM32F401VE_STEVAL.py similarity index 81% rename from buildroot/share/PlatformIO/scripts/STEVAL__F401XX.py rename to buildroot/share/PlatformIO/scripts/STM32F401VE_STEVAL.py index 580529c9c1..ffd5bcd42d 100644 --- a/buildroot/share/PlatformIO/scripts/STEVAL__F401XX.py +++ b/buildroot/share/PlatformIO/scripts/STM32F401VE_STEVAL.py @@ -1,3 +1,7 @@ +# +# STM32F401VE_STEVAL.py +# Customizations for env:STM32F401VE_STEVAL +# import os Import("env") diff --git a/buildroot/share/PlatformIO/scripts/add_nanolib.py b/buildroot/share/PlatformIO/scripts/add_nanolib.py new file mode 100644 index 0000000000..3b74b0d271 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/add_nanolib.py @@ -0,0 +1,5 @@ +# +# add_nanolib.py +# +Import("env") +env.Append(LINKFLAGS=["--specs=nano.specs"]) diff --git a/buildroot/share/PlatformIO/scripts/chitu_crypt.py b/buildroot/share/PlatformIO/scripts/chitu_crypt.py index aa675878e7..3d4854b51f 100644 --- a/buildroot/share/PlatformIO/scripts/chitu_crypt.py +++ b/buildroot/share/PlatformIO/scripts/chitu_crypt.py @@ -1,8 +1,9 @@ +# +# chitu_crypt.py +# Customizations for Chitu boards +# Import("env") -import os -import random -import struct -import uuid +import os,random,struct,uuid # Relocate firmware from 0x08000000 to 0x08008800 env['CPPDEFINES'].remove(("VECT_TAB_ADDR", "0x8000000")) diff --git a/buildroot/share/PlatformIO/scripts/common-cxxflags.py b/buildroot/share/PlatformIO/scripts/common-cxxflags.py index 3e75434ee7..36704af283 100644 --- a/buildroot/share/PlatformIO/scripts/common-cxxflags.py +++ b/buildroot/share/PlatformIO/scripts/common-cxxflags.py @@ -10,3 +10,25 @@ env.Append(CXXFLAGS=[ #"-Wno-maybe-uninitialized", #"-Wno-sign-compare" ]) + +# +# Add CPU frequency as a compile time constant instead of a runtime variable +# +def add_cpu_freq(): + if 'BOARD_F_CPU' in env: + env['BUILD_FLAGS'].append('-DBOARD_F_CPU=' + env['BOARD_F_CPU']) + +# Useful for JTAG debugging +# +# It will separe release and debug build folders. +# It useful when we need keep two live versions: one debug, for debugging, +# other release, for flashing (when upload is not done automatically by jlink/stlink). +# Without this, PIO will recompile everything twice for any small change. +if env.GetBuildType() == "debug" and env.get('UPLOAD_PROTOCOL') not in ['jlink', 'stlink']: + env['BUILD_DIR'] = '$PROJECT_BUILD_DIR/$PIOENV/debug' + +# On some platform, F_CPU is a runtime variable. Since it's used to convert from ns +# to CPU cycles, this adds overhead preventing small delay (in the order of less than +# 30 cycles) to be generated correctly. By using a compile time constant instead +# the compiler will perform the computation and this overhead will be avoided +add_cpu_freq() diff --git a/buildroot/share/PlatformIO/scripts/common-dependencies-post.py b/buildroot/share/PlatformIO/scripts/common-dependencies-post.py new file mode 100644 index 0000000000..2b1b948119 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/common-dependencies-post.py @@ -0,0 +1,16 @@ +# +# common-dependencies-post.py +# Convenience script to add build flags for Marlin Enabled Features +# + +Import("env") +Import("projenv") + +def apply_board_build_flags(): + if not 'BOARD_CUSTOM_BUILD_FLAGS' in env['MARLIN_FEATURES']: + return + projenv.Append(CCFLAGS=env['MARLIN_FEATURES']['BOARD_CUSTOM_BUILD_FLAGS'].split()) + +# We need to add the board build flags in a post script +# so the platform build script doesn't overwrite the custom CCFLAGS +apply_board_build_flags() diff --git a/buildroot/share/PlatformIO/scripts/common-dependencies.h b/buildroot/share/PlatformIO/scripts/common-dependencies.h index c96907bb3f..03fae56fdb 100644 --- a/buildroot/share/PlatformIO/scripts/common-dependencies.h +++ b/buildroot/share/PlatformIO/scripts/common-dependencies.h @@ -26,8 +26,6 @@ * Used by common-dependencies.py */ -#define NUM_SERIAL 1 // Normally provided by HAL/HAL.h - #include "../../../../Marlin/src/inc/MarlinConfig.h" // @@ -37,7 +35,9 @@ // Feature checks for SR_LCD_3W_NL #elif EITHER(LCD_I2C_TYPE_MCP23017, LCD_I2C_TYPE_MCP23008) #define USES_LIQUIDTWI2 -#elif ANY(HAS_MARLINUI_HD44780, LCD_I2C_TYPE_PCF8575, LCD_I2C_TYPE_PCA8574, SR_LCD_2W_NL, LCM1602) +#elif ENABLED(LCD_I2C_TYPE_PCA8574) + #define USES_LIQUIDCRYSTAL_I2C +#elif ANY(HAS_MARLINUI_HD44780, LCD_I2C_TYPE_PCF8575, SR_LCD_2W_NL , LCM1602) #define USES_LIQUIDCRYSTAL #endif @@ -109,6 +109,9 @@ #if ENABLED(TOUCH_SCREEN_CALIBRATION) #define HAS_MENU_TOUCH_SCREEN #endif + #if ENABLED(ASSISTED_TRAMMING_WIZARD) + #define HAS_MENU_TRAMMING + #endif #if ENABLED(AUTO_BED_LEVELING_UBL) #define HAS_MENU_UBL #endif diff --git a/buildroot/share/PlatformIO/scripts/common-dependencies.py b/buildroot/share/PlatformIO/scripts/common-dependencies.py index 4b4bba6258..3844d8298a 100644 --- a/buildroot/share/PlatformIO/scripts/common-dependencies.py +++ b/buildroot/share/PlatformIO/scripts/common-dependencies.py @@ -2,9 +2,7 @@ # common-dependencies.py # Convenience script to check dependencies and add libs and sources for Marlin Enabled Features # -import subprocess -import os -import re +import subprocess,os,re try: import configparser except ImportError: @@ -16,6 +14,30 @@ except ImportError: # PIO >= 4.4 from platformio.package.meta import PackageSpec as PackageManager +PIO_VERSION_MIN = (5, 0, 3) +try: + from platformio import VERSION as PIO_VERSION + weights = (1000, 100, 1) + version_min = sum([x[0] * float(re.sub(r'[^0-9]', '.', str(x[1]))) for x in zip(weights, PIO_VERSION_MIN)]) + version_cur = sum([x[0] * float(re.sub(r'[^0-9]', '.', str(x[1]))) for x in zip(weights, PIO_VERSION)]) + if version_cur < version_min: + print() + print("**************************************************") + print("****** An update to PlatformIO is ******") + print("****** required to build Marlin Firmware. ******") + print("****** ******") + print("****** Minimum version: ", PIO_VERSION_MIN, " ******") + print("****** Current Version: ", PIO_VERSION, " ******") + print("****** ******") + print("****** Update PlatformIO and try again. ******") + print("**************************************************") + print() + exit(1) +except SystemExit: + exit(1) +except: + print("Can't detect PlatformIO Version") + Import("env") #print(env.Dump()) @@ -45,16 +67,23 @@ def add_to_feat_cnf(feature, flines): except: FEATURE_CONFIG[feature] = {} + # Get a reference to the FEATURE_CONFIG under construction feat = FEATURE_CONFIG[feature] - atoms = re.sub(',\\s*', '\n', flines).strip().split('\n') - for dep in atoms: - parts = dep.split('=') + + # Split up passed lines on commas or newlines and iterate + # Add common options to the features config under construction + # For lib_deps replace a previous instance of the same library + atoms = re.sub(r',\\s*', '\n', flines).strip().split('\n') + for line in atoms: + parts = line.split('=') name = parts.pop(0) - rest = '='.join(parts) - if name in ['extra_scripts', 'src_filter', 'lib_ignore']: - feat[name] = rest + if name in ['build_flags', 'extra_scripts', 'src_filter', 'lib_ignore']: + feat[name] = '='.join(parts) else: - feat['lib_deps'] += [dep] + for dep in line.split(','): + lib_name = re.sub(r'@([~^]|[<>]=?)?[\d.]+', '', dep.strip()).split('=').pop(0) + lib_re = re.compile('(?!^' + lib_name + '\\b)') + feat['lib_deps'] = list(filter(lib_re.match, feat['lib_deps'])) + [dep] def load_config(): config = configparser.ConfigParser() @@ -108,8 +137,7 @@ def force_ignore_unused_libs(): known_libs = get_all_known_libs() diff = (list(set(known_libs) - set(env_libs))) lib_ignore = env.GetProjectOption('lib_ignore') + diff - if verbose: - print("Ignore libraries:", lib_ignore) + blab("Ignore libraries: %s" % lib_ignore) set_env_field('lib_ignore', lib_ignore) def apply_features_config(): @@ -148,6 +176,12 @@ def apply_features_config(): # Only add the missing dependencies set_env_field('lib_deps', deps + list(deps_to_add.values())) + if 'build_flags' in feat: + f = feat['build_flags'] + blab("Adding build_flags for %s: %s" % (feature, f)) + new_flags = env.GetProjectOption('build_flags') + [ f ] + env.Replace(BUILD_FLAGS=new_flags) + if 'extra_scripts' in feat: blab("Running extra_scripts for %s... " % feature) env.SConscript(feat['extra_scripts'], exports="env") @@ -156,8 +190,8 @@ def apply_features_config(): blab("Adding src_filter for %s... " % feature) src_filter = ' '.join(env.GetProjectOption('src_filter')) # first we need to remove the references to the same folder - my_srcs = re.findall( r'[+-](<.*?>)', feat['src_filter']) - cur_srcs = re.findall( r'[+-](<.*?>)', src_filter) + my_srcs = re.findall(r'[+-](<.*?>)', feat['src_filter']) + cur_srcs = re.findall(r'[+-](<.*?>)', src_filter) for d in my_srcs: if d in cur_srcs: src_filter = re.sub(r'[+-]' + d, '', src_filter) @@ -179,13 +213,13 @@ GCC_PATH_CACHE = os.path.join(ENV_BUILD_PATH, ".gcc_path") def search_compiler(): try: filepath = env.GetProjectOption('custom_gcc') - blab('Getting compiler from env') + blab("Getting compiler from env") return filepath except: pass if os.path.exists(GCC_PATH_CACHE): - blab('Getting g++ path from cache') + blab("Getting g++ path from cache") with open(GCC_PATH_CACHE, 'r') as f: return f.read() @@ -208,10 +242,11 @@ def search_compiler(): for filepath in os.listdir(pathdir): if not filepath.endswith(gcc): continue - + # Use entire path to not rely on env PATH + filepath = os.path.sep.join([pathdir, filepath]) # Cache the g++ path to no search always if os.path.exists(ENV_BUILD_PATH): - blab('Caching g++ for current env') + blab("Caching g++ for current env") with open(GCC_PATH_CACHE, 'w+') as f: f.write(filepath) @@ -233,7 +268,7 @@ def load_marlin_features(): build_flags = env.ParseFlagsExtended(build_flags) cxx = search_compiler() - cmd = [cxx] + cmd = ['"' + cxx + '"'] # Build flags from board.json #if 'BOARD' in env: diff --git a/buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py b/buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py index f7d3f0d03a..7ea7ac57f3 100644 --- a/buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py +++ b/buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py @@ -1,3 +1,6 @@ +# +# copy_marlin_variant_to_framework.py +# import os,shutil from SCons.Script import DefaultEnvironment from platformio import util diff --git a/buildroot/share/PlatformIO/scripts/download_mks_assets.py b/buildroot/share/PlatformIO/scripts/download_mks_assets.py index ae2ce467e8..33acab9e12 100644 --- a/buildroot/share/PlatformIO/scripts/download_mks_assets.py +++ b/buildroot/share/PlatformIO/scripts/download_mks_assets.py @@ -1,9 +1,8 @@ +# +# download_mks_assets.py +# Import("env") -import os -import requests -import zipfile -import tempfile -import shutil +import os,requests,zipfile,tempfile,shutil url = "https://github.com/makerbase-mks/Mks-Robin-Nano-Marlin2.0-Firmware/archive/master.zip" zip_path = os.path.join(env.Dictionary("PROJECT_LIBDEPS_DIR"), "mks-assets.zip") diff --git a/buildroot/share/PlatformIO/scripts/exc.S b/buildroot/share/PlatformIO/scripts/exc.S new file mode 100644 index 0000000000..1db462bb23 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/exc.S @@ -0,0 +1,104 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +# On an exception, push a fake stack thread mode stack frame and redirect +# thread execution to a thread mode error handler + +# From RM008: +# The SP is decremented by eight words by the completion of the stack push. +# Figure 5-1 shows the contents of the stack after an exception pre-empts the +# current program flow. +# +# Old SP--> +# xPSR +# PC +# LR +# r12 +# r3 +# r2 +# r1 +# SP--> r0 + +.text +.globl __exc_nmi +.weak __exc_nmi +.globl __exc_hardfault +.weak __exc_hardfault +.globl __exc_memmanage +.weak __exc_memmanage +.globl __exc_busfault +.weak __exc_busfault +.globl __exc_usagefault +.weak __exc_usagefault + +.code 16 +.thumb_func +__exc_nmi: + mov r0, #1 + b __default_exc + +.thumb_func +__exc_hardfault: + mov r0, #2 + b __default_exc + +.thumb_func +__exc_memmanage: + mov r0, #3 + b __default_exc + +.thumb_func +__exc_busfault: + mov r0, #4 + b __default_exc + +.thumb_func +__exc_usagefault: + mov r0, #5 + b __default_exc + +.thumb_func +__default_exc: + ldr r2, NVIC_CCR @ Enable returning to thread mode even if there are + mov r1 ,#1 @ pending exceptions. See flag NONEBASETHRDENA. + str r1, [r2] + cpsid i @ Disable global interrupts + ldr r2, SYSTICK_CSR @ Disable systick handler + mov r1, #0 + str r1, [r2] + ldr r1, CPSR_MASK @ Set default CPSR + push {r1} + ldr r1, TARGET_PC @ Set target pc + push {r1} + sub sp, sp, #24 @ Don't care + ldr r1, EXC_RETURN @ Return to thread mode + mov lr, r1 + bx lr @ Exception exit + +.align 4 +CPSR_MASK: .word 0x61000000 +EXC_RETURN: .word 0xFFFFFFF9 +TARGET_PC: .word __error +NVIC_CCR: .word 0xE000ED14 @ NVIC configuration control register +SYSTICK_CSR: .word 0xE000E010 @ Systick control register diff --git a/buildroot/share/PlatformIO/scripts/fix_framework_weakness.py b/buildroot/share/PlatformIO/scripts/fix_framework_weakness.py new file mode 100644 index 0000000000..29705de442 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/fix_framework_weakness.py @@ -0,0 +1,44 @@ +# +# fix_framework_weakness.py +# +from os.path import join, isfile +import shutil +from pprint import pprint + +Import("env") + +if env.MarlinFeatureIsEnabled("POSTMORTEM_DEBUGGING"): + FRAMEWORK_DIR = env.PioPlatform().get_package_dir("framework-arduinoststm32-maple") + patchflag_path = join(FRAMEWORK_DIR, ".exc-patching-done") + + # patch file only if we didn't do it before + if not isfile(patchflag_path): + print("Patching libmaple exception handlers") + original_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S") + backup_file = join(FRAMEWORK_DIR, "STM32F1", "cores", "maple", "libmaple", "exc.S.bak") + src_file = join("buildroot", "share", "PlatformIO", "scripts", "exc.S") + + assert isfile(original_file) and isfile(src_file) + shutil.copyfile(original_file, backup_file) + shutil.copyfile(src_file, original_file); + + def _touch(path): + with open(path, "w") as fp: + fp.write("") + + env.Execute(lambda *args, **kwargs: _touch(patchflag_path)) + print("Done patching exception handler") + + print("Libmaple modified and ready for post mortem debugging") + +mf = env["MARLIN_FEATURES"] +rxBuf = mf["RX_BUFFER_SIZE"] if "RX_BUFFER_SIZE" in mf else "0" +txBuf = mf["TX_BUFFER_SIZE"] if "TX_BUFFER_SIZE" in mf else "0" +if int(rxBuf) < 64: + rxBuf = "64" +if int(txBuf) < 64: + txBuf = "64" + +build_flags = env.get('BUILD_FLAGS') +build_flags.append("-DUSART_RX_BUF_SIZE=" + rxBuf + " -DUSART_TX_BUF_SIZE=" + txBuf) +env.Replace(BUILD_FLAGS=build_flags) diff --git a/buildroot/share/PlatformIO/scripts/fly_mini.py b/buildroot/share/PlatformIO/scripts/fly_mini.py new file mode 100644 index 0000000000..9c5df359ad --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/fly_mini.py @@ -0,0 +1,20 @@ +# +# fly_mini.py +# Customizations for env:FLY_MINI +# +import os +Import("env") + +# Relocate firmware from 0x08000000 to 0x08005000 +for define in env['CPPDEFINES']: + if define[0] == "VECT_TAB_ADDR": + env['CPPDEFINES'].remove(define) +env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000")) + +custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/fly_mini.ld") +for i, flag in enumerate(env["LINKFLAGS"]): + if "-Wl,-T" in flag: + env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script + elif flag == "-T": + env["LINKFLAGS"][i + 1] = custom_ld_script + diff --git a/buildroot/share/PlatformIO/scripts/fysetc_cheetah_v20.py b/buildroot/share/PlatformIO/scripts/fysetc_cheetah_v20.py new file mode 100644 index 0000000000..f36d51f972 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/fysetc_cheetah_v20.py @@ -0,0 +1,13 @@ +# +# STM32F401VE_STEVAL.py +# Customizations for env:STM32F401VE_STEVAL +# +import os +Import("env") + +custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/ldscript.ld") +for i, flag in enumerate(env["LINKFLAGS"]): + if "-Wl,-T" in flag: + env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script + elif flag == "-T": + env["LINKFLAGS"][i + 1] = custom_ld_script diff --git a/buildroot/share/PlatformIO/scripts/generic_create_variant.py b/buildroot/share/PlatformIO/scripts/generic_create_variant.py index 0b82c69f5a..aa79d39b51 100644 --- a/buildroot/share/PlatformIO/scripts/generic_create_variant.py +++ b/buildroot/share/PlatformIO/scripts/generic_create_variant.py @@ -1,3 +1,6 @@ +# +# Generate a generic variant +# import os,shutil from SCons.Script import DefaultEnvironment from platformio import util diff --git a/buildroot/share/PlatformIO/scripts/lerdge.py b/buildroot/share/PlatformIO/scripts/lerdge.py index fd934a1278..ff4f5e446b 100644 --- a/buildroot/share/PlatformIO/scripts/lerdge.py +++ b/buildroot/share/PlatformIO/scripts/lerdge.py @@ -1,3 +1,7 @@ +# +# lerdge.py +# Customizations for Lerdge build environments +# import os,sys Import("env") diff --git a/buildroot/share/PlatformIO/scripts/mks_encrypt.py b/buildroot/share/PlatformIO/scripts/mks_encrypt.py new file mode 100644 index 0000000000..0d53cdfbe9 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/mks_encrypt.py @@ -0,0 +1,32 @@ +import os,sys +Import("env") + +from SCons.Script import DefaultEnvironment +board = DefaultEnvironment().BoardConfig() + +# Encrypt ${PROGNAME}.bin and save it as build.firmware ('Robin.bin') +def encrypt(source, target, env): + key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] + + firmware = open(target[0].path, "rb") + robin = open(target[0].dir.path +'/'+ board.get("build.firmware"), "wb") + length = os.path.getsize(target[0].path) + position = 0 + try: + while position < length: + byte = firmware.read(1) + if position >= 320 and position < 31040: + byte = chr(ord(byte) ^ key[position & 31]) + if sys.version_info[0] > 2: + byte = bytes(byte, 'latin1') + robin.write(byte) + position += 1 + finally: + firmware.close() + robin.close() + +if 'firmware' in board.get("build").keys(): + env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt); +else: + print("You need to define output file via board_build.firmware = 'filename' parameter", file=sys.stderr) + exit(1); diff --git a/buildroot/share/PlatformIO/scripts/mks_robin_e3p.py b/buildroot/share/PlatformIO/scripts/mks_robin_e3p.py new file mode 100644 index 0000000000..2aab14bab7 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/mks_robin_e3p.py @@ -0,0 +1,40 @@ +import os +Import("env") + +# Relocate firmware from 0x08000000 to 0x08007000 +for define in env['CPPDEFINES']: + if define[0] == "VECT_TAB_ADDR": + env['CPPDEFINES'].remove(define) +env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000")) + +custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_e3p.ld") +for i, flag in enumerate(env["LINKFLAGS"]): + if "-Wl,-T" in flag: + env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script + elif flag == "-T": + env["LINKFLAGS"][i + 1] = custom_ld_script + + +# Encrypt ${PROGNAME}.bin and save it as 'mks_robin_e3p.bin' +def encrypt(source, target, env): + import sys + + key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] + + firmware = open(target[0].path, "rb") + robin = open(target[0].dir.path +'/Robin_e3p.bin', "wb") + length = os.path.getsize(target[0].path) + position = 0 + try: + while position < length: + byte = firmware.read(1) + if position >= 320 and position < 31040: + byte = chr(ord(byte) ^ key[position & 31]) + if sys.version_info[0] > 2: + byte = bytes(byte, 'latin1') + robin.write(byte) + position += 1 + finally: + firmware.close() + robin.close() +env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt); diff --git a/buildroot/share/PlatformIO/scripts/mks_robin_mini.py b/buildroot/share/PlatformIO/scripts/mks_robin_mini.py old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/scripts/mks_robin_nano.py b/buildroot/share/PlatformIO/scripts/mks_robin_nano.py old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/scripts/openblt.py b/buildroot/share/PlatformIO/scripts/openblt.py new file mode 100644 index 0000000000..2911a28e78 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/openblt.py @@ -0,0 +1,14 @@ +# Generate the firmware as OpenBLT needs + +import os,sys +from os.path import join + +Import("env") + +env.AddPostAction( + "$BUILD_DIR/${PROGNAME}.elf", + env.VerboseAction(" ".join([ + "$OBJCOPY", "-O", "srec", + "\"$BUILD_DIR/${PROGNAME}.elf\"", "\"$BUILD_DIR/${PROGNAME}.srec\"" + ]), "Building " + join("$BUILD_DIR","${PROGNAME}.srec")) +) diff --git a/buildroot/share/PlatformIO/scripts/preflight-checks.py b/buildroot/share/PlatformIO/scripts/preflight-checks.py new file mode 100644 index 0000000000..2ad1562a31 --- /dev/null +++ b/buildroot/share/PlatformIO/scripts/preflight-checks.py @@ -0,0 +1,75 @@ +# +# preflight-checks.py +# Check for common issues prior to compiling +# +import os,re,sys +Import("env") + +def get_envs_for_board(board): + with open(os.path.join("Marlin", "src", "pins", "pins.h"), "r") as file: + + if sys.platform == 'win32': + envregex = r"(?:env|win):" + elif sys.platform == 'darwin': + envregex = r"(?:env|mac|uni):" + elif sys.platform == 'linux': + envregex = r"(?:env|lin|uni):" + else: + envregex = r"(?:env):" + + r = re.compile(r"if\s+MB\((.+)\)") + if board.startswith("BOARD_"): + board = board[6:] + + for line in file: + mbs = r.findall(line) + if mbs and board in re.split(r",\s*", mbs[0]): + line = file.readline() + found_envs = re.match(r"\s*#include .+" + envregex, line) + if found_envs: + envlist = re.findall(envregex + r"(\w+)", line) + return [ "env:"+s for s in envlist ] + return [] + +def check_envs(build_env, board_envs, config): + if build_env in board_envs: + return True + ext = config.get(build_env, 'extends', default=None) + if ext: + if isinstance(ext, str): + return check_envs(ext, board_envs, config) + elif isinstance(ext, list): + for ext_env in ext: + if check_envs(ext_env, board_envs, config): + return True + return False + +# Sanity checks: +if 'PIOENV' not in env: + raise SystemExit("Error: PIOENV is not defined. This script is intended to be used with PlatformIO") + +if 'MARLIN_FEATURES' not in env: + raise SystemExit("Error: this script should be used after common Marlin scripts") + +if 'MOTHERBOARD' not in env['MARLIN_FEATURES']: + raise SystemExit("Error: MOTHERBOARD is not defined in Configuration.h") + +build_env = env['PIOENV'] +motherboard = env['MARLIN_FEATURES']['MOTHERBOARD'] +board_envs = get_envs_for_board(motherboard) +config = env.GetProjectConfig() +result = check_envs("env:"+build_env, board_envs, config) + +if not result: + err = "Error: Build environment '%s' is incompatible with %s. Use one of these: %s" % \ + ( build_env, motherboard, ", ".join([ e[4:] for e in board_envs if e.startswith("env:") ]) ) + raise SystemExit(err) + +# +# Check for Config files in two common incorrect places +# +for p in [ env['PROJECT_DIR'], os.path.join(env['PROJECT_DIR'], "config") ]: + for f in [ "Configuration.h", "Configuration_adv.h" ]: + if os.path.isfile(os.path.join(p, f)): + err = "ERROR: Config files found in directory %s. Please move them into the Marlin subfolder." % p + raise SystemExit(err) diff --git a/buildroot/share/PlatformIO/scripts/random-bin.py b/buildroot/share/PlatformIO/scripts/random-bin.py index 4d7ca5dc09..c03b863448 100644 --- a/buildroot/share/PlatformIO/scripts/random-bin.py +++ b/buildroot/share/PlatformIO/scripts/random-bin.py @@ -1,3 +1,7 @@ +# +# random-bin.py +# Set a unique firmware name based on current date and time +# Import("env") from datetime import datetime diff --git a/buildroot/share/PlatformIO/scripts/stm32_bootloader.py b/buildroot/share/PlatformIO/scripts/stm32_bootloader.py index d517f1c8d1..bbec61750c 100644 --- a/buildroot/share/PlatformIO/scripts/stm32_bootloader.py +++ b/buildroot/share/PlatformIO/scripts/stm32_bootloader.py @@ -1,3 +1,6 @@ +# +# stm32_bootloader.py +# import os,sys,shutil Import("env") @@ -6,9 +9,7 @@ board = DefaultEnvironment().BoardConfig() def noencrypt(source, target, env): firmware = os.path.join(target[0].dir.path, board.get("build.firmware")) - # do not overwrite encrypted firmware if present - if not os.path.isfile(firmware): - shutil.copy(target[0].path, firmware) + shutil.copy(target[0].path, firmware) if 'offset' in board.get("build").keys(): LD_FLASH_OFFSET = board.get("build.offset") @@ -26,5 +27,7 @@ if 'offset' in board.get("build").keys(): if "-Wl,--defsym=LD_MAX_DATA_SIZE" in flag: env["LINKFLAGS"][i] = "-Wl,--defsym=LD_MAX_DATA_SIZE=" + str(maximum_ram_size - 40) - if 'firmware' in board.get("build").keys(): - env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", noencrypt); +board_keys = board.get("build").keys() +# Only copy file if there's no encryptation +if 'firmware' in board_keys and not 'encrypt' in board_keys: + env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", noencrypt) diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c index cff269db0b..bee09b15b1 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c @@ -114,14 +114,10 @@ const PinMap PinMap_I2C_SCL[] = { #ifdef HAL_TIM_MODULE_ENABLED const PinMap PinMap_PWM[] = { - {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 HEATER0 - {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 HEATER1 - {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 HEATER2 - {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 BED - {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 FAN0 - {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 FAN1 - {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 FAN2 - {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 EXTENSION1-4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 BED + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 HEATER0 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 FAN0 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 FAN1 /** * Unused by specifications on BTT002. (PLEASE CONFIRM) @@ -132,9 +128,9 @@ const PinMap PinMap_PWM[] = { */ //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 BLTOUCH is a "servo" + //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 - //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 BLTOUCH is a "servo" + //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 @@ -154,8 +150,10 @@ const PinMap PinMap_PWM[] = { //{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 //{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + //{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 //{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N //{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + //{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 //{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N //{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 //{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 @@ -163,9 +161,7 @@ const PinMap PinMap_PWM[] = { //{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 //{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 //{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - //{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 //{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - //{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 //{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 //{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 //{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N @@ -180,7 +176,11 @@ const PinMap PinMap_PWM[] = { //{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 //{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 //{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + //{PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 //{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + //{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + //{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + //{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 //{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 //{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 //{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/hal_conf_extra.h index e0e8239aac..f7f9e23e99 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/hal_conf_extra.h +++ b/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/hal_conf_extra.h @@ -44,7 +44,7 @@ #undef HAL_IRDA_MODULE_ENABLED #undef HAL_SMARTCARD_MODULE_ENABLED #undef HAL_WWDG_MODULE_ENABLED -#undef HAL_HCD_MODULE_ENABLED +//#undef HAL_HCD_MODULE_ENABLED #undef HAL_FMPI2C_MODULE_ENABLED #undef HAL_SPDIFRX_MODULE_ENABLED #undef HAL_DFSDM_MODULE_ENABLED diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/hal_conf_extra.h index e0e8239aac..f7f9e23e99 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/hal_conf_extra.h +++ b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/hal_conf_extra.h @@ -44,7 +44,7 @@ #undef HAL_IRDA_MODULE_ENABLED #undef HAL_SMARTCARD_MODULE_ENABLED #undef HAL_WWDG_MODULE_ENABLED -#undef HAL_HCD_MODULE_ENABLED +//#undef HAL_HCD_MODULE_ENABLED #undef HAL_FMPI2C_MODULE_ENABLED #undef HAL_SPDIFRX_MODULE_ENABLED #undef HAL_DFSDM_MODULE_ENABLED diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/board.cpp b/buildroot/share/PlatformIO/variants/CHITU_F103/board.cpp old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/board/board.h b/buildroot/share/PlatformIO/variants/CHITU_F103/board/board.h old mode 100755 new mode 100644 index 20fd9d379f..a1e3346743 --- a/buildroot/share/PlatformIO/variants/CHITU_F103/board/board.h +++ b/buildroot/share/PlatformIO/variants/CHITU_F103/board/board.h @@ -69,14 +69,11 @@ #define BOARD_SPI1_MISO_PIN PA6 #define BOARD_SPI1_MOSI_PIN PA7 - - #define BOARD_SPI2_NSS_PIN PB12 #define BOARD_SPI2_SCK_PIN PB13 #define BOARD_SPI2_MISO_PIN PB14 #define BOARD_SPI2_MOSI_PIN PB15 - #define BOARD_SPI3_NSS_PIN PA15 #define BOARD_SPI3_SCK_PIN PB3 #define BOARD_SPI3_MISO_PIN PB4 diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/pins_arduino.h b/buildroot/share/PlatformIO/variants/CHITU_F103/pins_arduino.h old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/variant.h b/buildroot/share/PlatformIO/variants/CHITU_F103/variant.h old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards.cpp b/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards.cpp old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards_setup.cpp b/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards_setup.cpp old mode 100755 new mode 100644 diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PeripheralPins.c b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PeripheralPins.c new file mode 100644 index 0000000000..3957069f28 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PeripheralPins.c @@ -0,0 +1,266 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F401R[(B-C)|(D-E)]Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_PWM[] = { + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + // {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB_OTG_FS[] = { +#ifndef ARDUINO_CoreBoard_F401RC + {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID +#endif + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +//*** No USB_OTG_HS *** + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD[] = { + {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4 + {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5 + {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6 + {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7 + {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0 + {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1 + {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2 + {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3 + {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK + {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD + {NC, NP, 0} +}; +#endif diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PinNamesVar.h b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PinNamesVar.h new file mode 100644 index 0000000000..e1536bcf30 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/PinNamesVar.h @@ -0,0 +1,33 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, +#endif \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/hal_conf_custom.h b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/hal_conf_custom.h new file mode 100644 index 0000000000..1b9df2b47a --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/hal_conf_custom.h @@ -0,0 +1,496 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_CUSTOM +#define __STM32F4xx_HAL_CONF_CUSTOM + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ + /** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ +#define HAL_CRC_MODULE_ENABLED +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +//#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +#define HAL_FLASH_MODULE_ENABLED +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +#define HAL_IWDG_MODULE_ENABLED +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +#define HAL_PWR_MODULE_ENABLED +/* #define HAL_QSPI_MODULE_ENABLED */ +#define HAL_RCC_MODULE_ENABLED +/* #define HAL_RNG_MODULE_ENABLED */ +#define HAL_RTC_MODULE_ENABLED +/* #define HAL_SAI_MODULE_ENABLED */ +//#define HAL_SD_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +/* #define HAL_UART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_CORTEX_MODULE_ENABLED +#ifndef HAL_PCD_MODULE_ENABLED + #define HAL_PCD_MODULE_ENABLED //Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE) +#endif +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#ifndef HSE_VALUE +#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#ifndef HSE_STARTUP_TIMEOUT +#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#ifndef HSI_VALUE +#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#ifndef LSI_VALUE +#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz +The real value may vary depending on the variations +in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#ifndef LSE_VALUE +#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#ifndef LSE_STARTUP_TIMEOUT +#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#ifndef EXTERNAL_CLOCK_VALUE +#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#if !defined (VDD_VALUE) +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#endif +#if !defined (TICK_INT_PRIORITY) +#define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ +#endif +#if !defined (USE_RTOS) +#define USE_RTOS 0U +#endif +#if !defined (PREFETCH_ENABLE) +#define PREFETCH_ENABLE 1U +#endif +#if !defined (INSTRUCTION_CACHE_ENABLE) +#define INSTRUCTION_CACHE_ENABLE 1U +#endif +#if !defined (DATA_CACHE_ENABLE) +#define DATA_CACHE_ENABLE 1U +#endif + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY 0x000000FFU +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY 0x00000FFFU + +#define PHY_READ_TO 0x0000FFFFU +#define PHY_WRITE_TO 0x0000FFFFU + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ +#ifndef USE_SPI_CRC +#define USE_SPI_CRC 0U +#endif + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED +#include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED +#include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED +#include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED +#include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED +#include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED +#include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED +#include "stm32f4xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED +#include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED +#include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED +#include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED +#include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED +#include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED +#include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED +#include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED +#include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED +#include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED +#include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED +#include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED +#include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED +#include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED +#include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED +#include "stm32f4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED +#include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED +#include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED +#include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED +#include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED +#include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED +#include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED +#include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED +#include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED +#include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED +#include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED +#include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED +#include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED +#include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED +#include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED +#include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED +#include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED +#include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED +#include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED +#include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED +#include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED +#include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED +#include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED +#include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_CUSTOM_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/ldscript.ld b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/ldscript.ld new file mode 100644 index 0000000000..2dbc5177ac --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/ldscript.ld @@ -0,0 +1,187 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F401RETx Device with +** 512KByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20010000; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200;; /* required amount of heap */ +_Min_Stack_Size = 0x400;; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x800C000, LENGTH = 256K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text ALIGN(4): + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.cpp b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.cpp new file mode 100644 index 0000000000..71f3509ed5 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.cpp @@ -0,0 +1,238 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // Digital pin 0 + PA_1, // Digital pin 1 + PA_2, // Digital pin 2 + PA_3, // Digital pin 3 + PA_4, // Digital pin 4 + PA_5, // Digital pin 5 + PA_6, // Digital pin 6 + PA_7, // Digital pin 7 + PA_8, // Digital pin 8 + PA_9, // Digital pin 9 + PA_10, // Digital pin 10 + PA_11, // Digital pin 11 + PA_12, // Digital pin 12 + PA_13, // Digital pin 13 + PA_14, // Digital pin 14 + PA_15, // Digital pin 15 + + PB_0, // Digital pin 16 + PB_1, // Digital pin 17 + PB_2, // Digital pin 18 + PB_3, // Digital pin 19 + PB_4, // Digital pin 20 + PB_5, // Digital pin 21 + PB_6, // Digital pin 22 + PB_7, // Digital pin 23 + PB_8, // Digital pin 24 + PB_9, // Digital pin 25 + PB_10, // Digital pin 26 + PB_12, // Digital pin 27 + PB_13, // Digital pin 28 + PB_14, // Digital pin 29 + PB_15, // Digital pin 30 + + PC_0, // Digital pin 31 + PC_1, // Digital pin 32 + PC_2, // Digital pin 33 + PC_3, // Digital pin 34 + PC_4, // Digital pin 35 + PC_5, // Digital pin 36 + PC_6, // Digital pin 37 + PC_7, // Digital pin 38 + PC_8, // Digital pin 39 + PC_9, // Digital pin 40 + PC_10, // Digital pin 41 + PC_11, // Digital pin 42 + PC_12, // Digital pin 43 + PC_13, // Digital pin 44 + PC_14, // Digital pin 45 + PC_15, // Digital pin 46 + + PD_2, // Digital pin 47 + + PH_0, // Digital pin 48, used by the external oscillator + PH_1 // Digital pin 49, used by the external oscillator +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 31, // A10, PC0 + 32, // A11, PC1 + 33, // A12, PC2 + 34, // A13, PC3 + 35, // A14, PC4 + 36 // A15, PC5 +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +static uint8_t SetSysClock_PLL_HSE(uint8_t bypass) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + // Enable HSE oscillator and activate PLL with HSE as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + if (bypass == 0) { + RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT + } else { + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN + } + + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4) + RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + /* + if (bypass == 0) + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz + else + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz + */ + + return 1; // OK +} + +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + // Enable HSI oscillator and activate PLL with HSI as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16) + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4) + RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> freq is ok but not precise enough + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz + + return 1; // OK +} + +WEAK void SystemClock_Config(void) +{ + /* 1- If fail try to start with HSE and external xtal */ + if (SetSysClock_PLL_HSE(0) == 0) { + /* 2- Try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(1) == 0) { + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == 0) { + Error_Handler(); + } + } + } + /* Output clock on MCO2 pin(PC9) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); +} + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.h b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.h new file mode 100644 index 0000000000..d0fb0d9db0 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/FYSETC_CHEETAH_V20/variant.h @@ -0,0 +1,151 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + + +// | DIGITAL | ANALOG | USART | TWI | SPI | SPECIAL | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PA0 A0 // | 0 | A0 | | | | | +#define PA1 A1 // | 1 | A1 | | | | | +#define PA2 A2 // | 2 | A2 | USART2_TX | | | | +#define PA3 A3 // | 3 | A3 | USART2_RX | | | | +#define PA4 A4 // | 4 | A4 | | | SPI1_SS, (SPI3_SS) | | +#define PA5 A5 // | 5 | A5 | | | SPI1_SCK | | +#define PA6 A6 // | 6 | A6 | | | SPI1_MISO | | +#define PA7 A7 // | 7 | A7 | | | SPI1_MOSI | | +#define PA8 8 // | 8 | | | TWI3_SCL | | | +#define PA9 9 // | 9 | | USART1_TX | | | | +#define PA10 10 // | 10 | | USART1_RX | | | | +#define PA11 11 // | 11 | | USART6_TX | | | | +#define PA12 12 // | 12 | | USART6_RX | | | | +#define PA13 13 // | 13 | | | | | SWD_SWDIO | +#define PA14 14 // | 14 | | | | | SWD_SWCLK | +#define PA15 15 // | 15 | | | | SPI3_SS, (SPI1_SS) | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PB0 A8 // | 16 | A8 | | | | | +#define PB1 A9 // | 17 | A9 | | | | | +#define PB2 18 // | 18 | | | | | BOOT1 | +#define PB3 19 // | 19 | | | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | | +#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | | +#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | | +#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | | +#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | | +#define PB8 24 // | 24 | | | TWI1_SCL | | | +#define PB9 25 // | 25 | | | TWI1_SDA | SPI2_SS | | +#define PB10 26 // | 26 | | | TWI2_SCL | SPI2_SCK | | +#define PB12 27 // | 27 | | | | SPI2_SS | | +#define PB13 28 // | 28 | | | | SPI2_SCK | | +#define PB14 29 // | 29 | | | | SPI2_MISO | | +#define PB15 30 // | 30 | | | | SPI2_MOSI | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PC0 A10 // | 31 | A10 | | | | | +#define PC1 A11 // | 32 | A11 | | | | | +#define PC2 A12 // | 33 | A12 | | | SPI2_MISO | | +#define PC3 A13 // | 34 | A13 | | | SPI2_MOSI | | +#define PC4 A14 // | 35 | A14 | | | | | +#define PC5 A15 // | 36 | A15 | | | | | +#define PC6 37 // | 37 | | USART6_TX | | | | +#define PC7 38 // | 38 | | USART6_RX | | | | +#define PC8 39 // | 39 | | | | | | +#define PC9 40 // | 40 | | | TWI3_SDA | | | +#define PC10 41 // | 41 | | | | SPI3_SCK | | +#define PC11 42 // | 42 | | | | SPI3_MISO | | +#define PC12 43 // | 43 | | | | SPI3_MOSI | | +#define PC13 44 // | 44 | | | | | | +#define PC14 45 // | 45 | | | | | OSC32_IN | +#define PC15 46 // | 46 | | | | | OSC32_OUT | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PD2 47 // | 47 | | | | | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PH0 48 // | 48 | | | | | OSC_IN | +#define PH1 49 // | 49 | | | | | OSC_OUT | +// |---------|--------|-----------|----------|------------------------|-----------| + +// This must be a literal +#define NUM_DIGITAL_PINS 50 +#define NUM_ANALOG_INPUTS 16 + +// SPI definitions +#define PIN_SPI_SS PA4 +#define PIN_SPI_SS1 PA4 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 + + +// Timer Definitions +#define TIMER_TONE TIM2 +#define TIMER_SERVO TIM5 +#define TIMER_SERIAL TIM11 + +// UART Definitions +//#define ENABLE_HWSERIAL1 done automatically by the #define SERIAL_UART_INSTANCE below +#define ENABLE_HWSERIAL2 + + +// Define here Serial instance number to map on Serial generic name (if not already used by SerialUSB) +#define SERIAL_UART_INSTANCE 1 //1 for Serial = Serial1 (USART1) + +// Default pin used for 'Serial' instance +// Mandatory for Firmata +#define PIN_SERIAL_RX PA10 +#define PIN_SERIAL_TX PA9 + +// Used when user instanciate a hardware Serial using its peripheral name. +// Example: HardwareSerial mySerial(USART3); +// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined. +#define PIN_SERIAL1_RX PA10 +#define PIN_SERIAL1_TX PA9 +#define PIN_SERIAL2_RX PA3 +#define PIN_SERIAL2_TX PA2 + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial1 + #define SERIAL_PORT_HARDWARE_OPEN Serial2 +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c new file mode 100644 index 0000000000..c9d2bb88b8 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c @@ -0,0 +1,425 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + * Automatically generated from STM32F103V(F-G)Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + // {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 +#endif + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + // {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 +#endif + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + // {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 +#endif + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + // {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 +#endif + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + // {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + // {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + // {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + // {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + // {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + // {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + // {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 +#endif + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + // {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 +#endif + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + // {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 +#endif + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + // {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 +#endif + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + // {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + // {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#if defined(STM32F103xE) || defined(STM32F103xG) +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1 +#endif + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2 +#endif + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3 +#endif +#ifdef STM32F103xG + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1 +#endif + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4 +#else + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 +#endif +#if defined(STM32F103xG) + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 +#endif + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 +#if defined(STM32F103xG) + // {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 +#endif + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N + // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 + // {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N +#if defined(STM32F103xG) + // {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 +#endif + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 + // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2 + // {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3 + // {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4 + // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 + // {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3 + // {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N +#endif + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4 + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N +#endif + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 + // {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 +#if defined(STM32F103xG) + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 +#endif + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 +#if defined(STM32F103xG) + // {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 +#endif + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 + // {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 + // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N +#if defined(STM32F103xG) + // {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 +#endif + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N +#if defined(STM32F103xG) + // {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 +#endif + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1 +#endif + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2 +#endif + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3 + // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4 +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4 +#endif + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4 +#if defined(STM32F103xG) + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2 +#endif + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#else + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, +#endif +#if defined(STM32F103xE) || defined(STM32F103xG) + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#endif + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, +#else + {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, +#endif +#if defined(STM32F103xE) || defined(STM32F103xG) + {PD_2, UART5, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, +#endif + {PD_6, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#else + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, +#endif + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#else + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, +#endif + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#else + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, +#endif + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#if defined(STM32F103xE) || defined(STM32F103xG) + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, +#else + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, +#endif + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP + {NC, NP, 0} +}; +#endif + +//*** No USB_OTG_FS *** + +//*** No USB_OTG_HS *** + +//*** SD *** + +#if defined(STM32F103xE) || defined(STM32F103xG) +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD[] = { + {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4 + {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5 + {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6 + {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7 + {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0 + {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1 + {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2 + {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3 + {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK + {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD + {NC, NP, 0} +}; +#endif +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PinNamesVar.h new file mode 100644 index 0000000000..d9076b4dfb --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PinNamesVar.h @@ -0,0 +1,30 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/ldscript.ld new file mode 100644 index 0000000000..c9197c8b45 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/ldscript.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F103V(8/B/C/E/F/GTx Device from STM32F1 series +** 64/128/256/512/768/1024Kbytes FLASH +** 20/20/48/64/64/96/96Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.cpp new file mode 100644 index 0000000000..25b4b51145 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.cpp @@ -0,0 +1,235 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, //D0 + PA_1, //D1 + PA_2, //D2 + PA_3, //D3 + PA_4, //D4 + PA_5, //D5 + PA_6, //D6 + PA_7, //D7 + PA_8, //D8 + PA_9, //D9 + PA_10, //D10 + PA_11, //D11 + PA_12, //D12 + PA_13, //D13 + PA_14, //D14 + PA_15, //D15 + + PB_0, //D16 + PB_1, //D17 + PB_2, //D18 + PB_3, //D19 + PB_4, //D20 + PB_5, //D21 + PB_6, //D22 + PB_7, //D23 + PB_8, //D24 + PB_9, //D25 + PB_10, //D26 + PB_11, //D27 + PB_12, //D28 + PB_13, //D29 + PB_14, //D30 + PB_15, //D31 + + PC_0, //D32 + PC_1, //D33 + PC_2, //D34 + PC_3, //D35 + PC_4, //D36 + PC_5, //D37 + PC_6, //D38 + PC_7, //D39 + PC_8, //D40 + PC_9, //D41 + PC_10, //D42 + PC_11, //D43 + PC_12, //D44 + PC_13, //D45 + PC_14, //D46 + PC_15, //D47 + + PD_0, //D48 + PD_1, //D49 + PD_2, //D50 + PD_3, //D51 + PD_4, //D52 + PD_5, //D53 + PD_6, //D54 + PD_7, //D55 + PD_8, //D56 + PD_9, //D57 + PD_10, //D58 + PD_11, //D59 + PD_12, //D60 + PD_13, //D61 + PD_14, //D62 + PD_15, //D63 + + PE_0, //D64 + PE_1, //D65 + PE_2, //D66 + PE_3, //D67 + PE_4, //D68 + PE_5, //D69 + PE_6, //D70 + PE_7, //D71 + PE_8, //D72 + PE_9, //D73 + PE_10, //D74 + PE_11, //D75 + PE_12, //D76 + PE_13, //D77 + PE_14, //D78 + PE_15, //D79 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC2 + 35, // A13, PC3 + 36, // A14, PC4 + 37, // A15, PC5 +}; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +static bool SetSysClock_PLL_HSE(bool bypass) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + bool ret = false; + + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + if (bypass == false) { + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + } else { + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + } + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) { + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; + PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { + ret = true; + } + } + } + return ret; +} + +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +bool SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + bool ret = false; + + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) { + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; + PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { + ret = true; + } + } + } + return ret; +} + +WEAK void SystemClock_Config(void) +{ + /* + * If HSE_VALUE is not 8MHz and you want use it, then: + * - Redefine HSE_VALUE to the correct HSE_VALUE + * - Redefine SystemClock_Config() with the correct settings + */ +#if HSE_VALUE == 8000000U + /* 1- Try to start with HSE and external 8MHz xtal */ + if (SetSysClock_PLL_HSE(false) == false) { + /* 2- If fail try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(true) == false) { +#endif + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == false) { + Error_Handler(); + } +#if HSE_VALUE == 8000000U + } + } +#endif +} + +#ifdef __cplusplus +} +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.h new file mode 100644 index 0000000000..b622b39376 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.h @@ -0,0 +1,181 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ +#define PA0 0 +#define PA1 1 +#define PA2 2 +#define PA3 3 +#define PA4 4 +#define PA5 5 +#define PA6 6 +#define PA7 7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 + +#define PB0 16 +#define PB1 17 +#define PB2 18 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 + +#define PC0 32 +#define PC1 33 +#define PC2 34 +#define PC3 35 +#define PC4 36 +#define PC5 37 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 + +#define PD0 48 +#define PD1 49 +#define PD2 50 +#define PD3 51 +#define PD4 52 +#define PD5 53 +#define PD6 54 +#define PD7 55 +#define PD8 56 +#define PD9 57 +#define PD10 58 +#define PD11 59 +#define PD12 60 +#define PD13 61 +#define PD14 62 +#define PD15 63 + +#define PE0 64 +#define PE1 65 +#define PE2 66 +#define PE3 67 +#define PE4 68 +#define PE5 69 +#define PE6 70 +#define PE7 71 +#define PE8 72 +#define PE9 73 +#define PE10 74 +#define PE11 75 +#define PE12 76 +#define PE13 77 +#define PE14 78 +#define PE15 79 + +// This must be a literal +#define NUM_DIGITAL_PINS 80 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN +#define LED_BUILTIN PB11 +#endif + +// On-board user button +#ifndef USER_BTN +#define USER_BTN PC13 +#endif + +// SPI Definitions +#define PIN_SPI_SS PC4 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 + +// I2C Definitions +#define PIN_WIRE_SDA PB7 +#define PIN_WIRE_SCL PB6 + +// Timer Definitions (optional) +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#define TIMER_TONE TIM3 +#define TIMER_SERVO TIM2 + +// UART Definitions +// Define here Serial instance number to map on Serial generic name +#define SERIAL_UART_INSTANCE 1 + +// Extra HAL modules +#if defined(STM32F103xE) || defined(STM32F103xG) +#define HAL_DAC_MODULE_ENABLED +#define HAL_SD_MODULE_ENABLED +#define HAL_SRAM_MODULE_ENABLED +#endif + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#define PIN_SERIAL_RX PA10 +#define PIN_SERIAL_TX PA9 + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial1 +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PeripheralPins.c new file mode 100644 index 0000000000..5736e5206e --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PeripheralPins.c @@ -0,0 +1,368 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + * Automatically generated from STM32F103Z(C-D-E|F-G))Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + // {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + // {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + // {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + // {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + // {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + // {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + // {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + // {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + // {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + // {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + // {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + // {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + // {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + // {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + // {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + // {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + // {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + // {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + // {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + // {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + // {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + // {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + // {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + // {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 + // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3 +#ifdef STM32F103xG + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1 +#endif + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4 +#ifdef STM32F103xG + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 +#endif + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 +#ifdef STM32F103xG + // {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 +#endif + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N + // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N +#ifdef STM32F103xG + // {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 +#endif + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 + // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2 + // {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3 + // {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4 + // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 + // {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3 + // {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4 + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 + // {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 + // {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 +#ifdef STM32F103xG + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 +#endif + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 +#ifdef STM32F103xG + // {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 +#endif + // {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 + // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N +#ifdef STM32F103xG + // {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 +#endif + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N +#ifdef STM32F103xG + // {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 +#endif + // {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1 + // {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3 + // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4 + // {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4 +#ifdef STM32F103xG + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2 +#endif + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4 +#ifdef STM32F103xG + {PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM10_ENABLE, 1, 0)}, // TIM10_CH1 + {PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM11_ENABLE, 1, 0)}, // TIM11_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM13_ENABLE, 1, 0)}, // TIM13_CH1 + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM14_ENABLE, 1, 0)}, // TIM14_CH1 +#endif + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + // {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP + {NC, NP, 0} +}; +#endif + +//*** No USB_OTG_FS *** + +//*** No USB_OTG_HS *** + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD[] = { + // {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4 + // {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5 + // {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6 + // {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7 + {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0 + {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1 + {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2 + {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3 + {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK + {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD + {NC, NP, 0} +}; +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PinNamesVar.h new file mode 100644 index 0000000000..d9076b4dfb --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/PinNamesVar.h @@ -0,0 +1,30 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h new file mode 100644 index 0000000000..014943f311 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h @@ -0,0 +1,412 @@ +/** + ****************************************************************************** + * @file stm32f1xx_hal_conf_default.h + * @brief HAL default configuration file. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_HAL_CONF_DEFAULT_H +#define __STM32F1xx_HAL_CONF_DEFAULT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief Include the default list of modules to be used in the HAL driver + * and manage module deactivation + */ +#include "stm32yyxx_hal_conf.h" +#if 0 +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +#define HAL_CAN_MODULE_ENABLED +/*#define HAL_CAN_LEGACY_MODULE_ENABLED*/ +#define HAL_CEC_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CRC_MODULE_ENABLED +#define HAL_DAC_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_ETH_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_HCD_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +#define HAL_IRDA_MODULE_ENABLED +#define HAL_IWDG_MODULE_ENABLED +#define HAL_NAND_MODULE_ENABLED +#define HAL_NOR_MODULE_ENABLED +#define HAL_PCCARD_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_RTC_MODULE_ENABLED +#define HAL_SD_MODULE_ENABLED +#define HAL_SMARTCARD_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_SRAM_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +#define HAL_WWDG_MODULE_ENABLED +#define HAL_MMC_MODULE_ENABLED +#endif + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#if defined(USE_STM3210C_EVAL) +#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ +#else +#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) +#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) +#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) +#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) +#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) +#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#if !defined(VDD_VALUE) +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#endif +#if !defined (TICK_INT_PRIORITY) +#define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ +#endif +#if !defined (USE_RTOS) +#define USE_RTOS 0U +#endif +#if !defined (PREFETCH_ENABLE) +#define PREFETCH_ENABLE 1U +#endif + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY 0x000000FFU +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY 0x00000FFFU + +#define PHY_READ_TO 0x0000FFFFU +#define PHY_WRITE_TO 0x0000FFFFU + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ + +#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ + +#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ + +#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ +#if !defined (USE_SPI_CRC) +#define USE_SPI_CRC 0U +#endif + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED +#include "stm32f1xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED +#include "stm32f1xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32f1xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED +#include "stm32f1xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED +#include "stm32f1xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED +#include "stm32f1xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "Legacy/stm32f1xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED +#include "stm32f1xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED +#include "stm32f1xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED +#include "stm32f1xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED +#include "stm32f1xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED +#include "stm32f1xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED +#include "stm32f1xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED +#include "stm32f1xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED +#include "stm32f1xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED +#include "stm32f1xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED +#include "stm32f1xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED +#include "stm32f1xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED +#include "stm32f1xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED +#include "stm32f1xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED +#include "stm32f1xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED +#include "stm32f1xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED +#include "stm32f1xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED +#include "stm32f1xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED +#include "stm32f1xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED +#include "stm32f1xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED +#include "stm32f1xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED +#include "stm32f1xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED +#include "stm32f1xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED +#include "stm32f1xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED +#include "stm32f1xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED +#include "stm32f1xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED +#include "stm32f1xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_HAL_CONF_DEFAULT_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/ldscript.ld new file mode 100644 index 0000000000..09088b622c --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/ldscript.ld @@ -0,0 +1,197 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F103Z(C/D/E/G/GTx Device from STM32F1 series +** 256/386/512K/786/1024bytes FLASH +** 48/64/96Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.cpp new file mode 100644 index 0000000000..ff7ab771c0 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.cpp @@ -0,0 +1,222 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, //D0 + PA_1, //D1 + PA_2, //D2 + PA_3, //D3 + PA_4, //D4 + PA_5, //D5 + PA_6, //D6 + PA_7, //D7 + PA_8, //D8 + PA_9, //D9 + PA_10, //D10 + PA_11, //D11 + PA_12, //D12 + PA_13, //D13 + PA_14, //D14 + PA_15, //D15 + + PB_0, //D16 + PB_1, //D17 + PB_2, //D18 + PB_3, //D19 + PB_4, //D20 + PB_5, //D21 + PB_6, //D22 + PB_7, //D23 + PB_8, //D24 + PB_9, //D25 + PB_10, //D26 + PB_11, //D27 + PB_12, //D28 + PB_13, //D29 + PB_14, //D30 + PB_15, //D31 + + PC_0, //D32 + PC_1, //D33 + PC_2, //D34 + PC_3, //D35 + PC_4, //D36 + PC_5, //D37 + PC_6, //D38 + PC_7, //D39 + PC_8, //D40 + PC_9, //D41 + PC_10, //D42 + PC_11, //D43 + PC_12, //D44 + PC_13, //D45 + PC_14, //D46 + PC_15, //D47 + + PD_0, //D48 + PD_1, //D49 + PD_2, //D50 + PD_3, //D51 + PD_4, //D52 + PD_5, //D53 + PD_6, //D54 + PD_7, //D55 + PD_8, //D56 + PD_9, //D57 + PD_10, //D58 + PD_11, //D59 + PD_12, //D60 + PD_13, //D61 + PD_14, //D62 + PD_15, //D63 + + PE_0, //D64 + PE_1, //D65 + PE_2, //D66 + PE_3, //D67 + PE_4, //D68 + PE_5, //D69 + PE_6, //D70 + PE_7, //D71 + PE_8, //D72 + PE_9, //D73 + PE_10, //D74 + PE_11, //D75 + PE_12, //D76 + PE_13, //D77 + PE_14, //D78 + PE_15, //D79 + + PF_0, //D80 + PF_1, //D81 + PF_2, //D82 + PF_3, //D83 + PF_4, //D84 + PF_5, //D85 + PF_6, //D86 + PF_7, //D87 + PF_8, //D88 + PF_9, //D89 + PF_10, //D90 + PF_11, //D91 + PF_12, //D92 + PF_13, //D93 + PF_14, //D94 + PF_15, //D95 + + PG_0, //D96 + PG_1, //D97 + PG_2, //D98 + PG_3, //D99 + PG_4, //D100 + PG_5, //D101 + PG_6, //D102 + PG_7, //D103 + PG_8, //D104 + PG_9, //D105 + PG_10, //D106 + PG_11, //D107 + PG_12, //D108 + PG_13, //D109 + PG_14, //D110 + PG_15 //D111 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC2 + 35, // A13, PC3 + 36, // A14, PC4 + 37, // A15, PC5 + 86, // A16, PF6 + 87, // A17, PF7 + 88, // A18, PF8 + 89, // A19, PF9 + 90 // A20, PF10 +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; + PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} + + +#ifdef __cplusplus +} +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.h new file mode 100644 index 0000000000..fb878f8b78 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.h @@ -0,0 +1,232 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ +#define PA0 0 +#define PA1 1 +#define PA2 2 +#define PA3 3 +#define PA4 4 +#define PA5 5 +#define PA6 6 +#define PA7 7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 + +#define PB0 16 +#define PB1 17 +#define PB2 18 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 + +#define PC0 32 +#define PC1 33 +#define PC2 34 +#define PC3 35 +#define PC4 36 +#define PC5 37 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 + +#define PD0 48 +#define PD1 49 +#define PD2 50 +#define PD3 51 +#define PD4 52 +#define PD5 53 +#define PD6 54 +#define PD7 55 +#define PD8 56 +#define PD9 57 +#define PD10 58 +#define PD11 59 +#define PD12 60 +#define PD13 61 +#define PD14 62 +#define PD15 63 + +#define PE0 64 +#define PE1 65 +#define PE2 66 +#define PE3 67 +#define PE4 68 +#define PE5 69 +#define PE6 70 +#define PE7 71 +#define PE8 72 +#define PE9 73 +#define PE10 74 +#define PE11 75 +#define PE12 76 +#define PE13 77 +#define PE14 78 +#define PE15 79 + +#define PF0 80 +#define PF1 81 +#define PF2 82 +#define PF3 83 +#define PF4 84 +#define PF5 85 +#define PF6 86 +#define PF7 87 +#define PF8 88 +#define PF9 89 +#define PF10 90 +#define PF11 91 +#define PF12 92 +#define PF13 93 +#define PF14 94 +#define PF15 95 + +#define PG0 96 +#define PG1 97 +#define PG2 98 +#define PG3 99 +#define PG4 100 +#define PG5 101 +#define PG6 102 +#define PG7 103 +#define PG8 104 +#define PG9 105 +#define PG10 106 +#define PG11 107 +#define PG12 108 +#define PG13 109 +#define PG14 110 +#define PG15 111 + +// This must be a literal +#define NUM_DIGITAL_PINS 112 +#define NUM_ANALOG_INPUTS 21 + +// On-board LED pin number +#ifdef ARDUINO_VCCGND_F103ZET6_MINI +#define LED_BUILTIN PG15 +#elif defined(ARDUINO_VCCGND_F103ZET6) +#define LED_BUILTIN PC13 +#elif !defined(LED_BUILTIN) +#define LED_BUILTIN PC13 +#endif + +// On-board user button +#ifndef USER_BTN +#define USER_BTN PB1 +#endif + +// SPI Definitions +#ifdef ARDUINO_VCCGND_F103ZET6 +#define PIN_SPI_SS PA15 +#define PIN_SPI_MOSI PB5 +#define PIN_SPI_MISO PB4 +#define PIN_SPI_SCK PB3 +#else +#define PIN_SPI_SS PC4 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 +#endif + +// I2C Definitions +#define PIN_WIRE_SDA PB7 +#define PIN_WIRE_SCL PB6 + +// Timer Definitions (optional) +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#define TIMER_TONE TIM6 +#define TIMER_SERVO TIM7 + +// UART Definitions +// Define here Serial instance number to map on Serial generic name +#define SERIAL_UART_INSTANCE 1 + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#define PIN_SERIAL_RX PA10 +#define PIN_SERIAL_TX PA9 + +// Default pin used for 'Serial2' instance +#define PIN_SERIAL2_RX PA3 +#define PIN_SERIAL2_TX PA2 + +// Default pin used for 'Serial3' instance +#define PIN_SERIAL3_RX PB11 +#define PIN_SERIAL3_TX PB10 + +/* Extra HAL modules */ +#define HAL_DAC_MODULE_ENABLED +#define HAL_SD_MODULE_ENABLED +#define HAL_SRAM_MODULE_ENABLED + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial1 +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PeripheralPins.c new file mode 100644 index 0000000000..51ebf60581 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PeripheralPins.c @@ -0,0 +1,408 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + * Automatically generated from STM32F407V(E-G)Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + // {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + // {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + // {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + // {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + // {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + // {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + // {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + // {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + // {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + // {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + // {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + // {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + // {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + // {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + // {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + // {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + // {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + // {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + // {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + // {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + // {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + // {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + // {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + // {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +// Some pins can perform PWM from more than one timer. These were selected to utilize as many channels as +// possible from timers which were already dedicated to PWM output. + +// TIM1 = Pins are using for OTG FS +// TIM2 = [HEATER_BED], TIM2 is used OTG HS SOF +// TIM6 = Tone +// TIM8 = [FAN0, HEATER_1] OTG HS +// TIM7 = Servo +// TIM9 = [HEATER_0, ] +// TIM1, TIM8, TIM12 = Pins are using for OTG HS +// No timer = [FAN1 ] + +WEAK const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + // {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + // {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + // {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +WEAK const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {NC, NP, 0} +}; +#endif + +//*** No QUADSPI *** + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB_OTG_FS[] = { + // {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + // {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB_OTG_HS[] = { +#ifdef USE_USB_HS_IN_FS + // {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + // {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + // {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else + {PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* USE_USB_HS_IN_FS */ + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD[] = { + {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4 + {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5 + {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6 + {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7 + {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0 + {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1 + {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2 + {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3 + {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK + {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD + {NC, NP, 0} +}; +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PinNamesVar.h new file mode 100644 index 0000000000..2424885937 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/PinNamesVar.h @@ -0,0 +1,50 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_VBUS = PB_13, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ULPI_STP = PC_0, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_NXT = PC_3, +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h new file mode 100644 index 0000000000..d3c2f6bd02 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h @@ -0,0 +1,495 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +// #define HAL_CAN_MODULE_ENABLED +/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ +#define HAL_CRC_MODULE_ENABLED +// #define HAL_CEC_MODULE_ENABLED +// #define HAL_CRYP_MODULE_ENABLED +#define HAL_DAC_MODULE_ENABLED +// #define HAL_DCMI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +// #define HAL_DMA2D_MODULE_ENABLED +// #define HAL_ETH_MODULE_ENABLED +// #define HAL_FLASH_MODULE_ENABLED +// #define HAL_NAND_MODULE_ENABLED +// #define HAL_NOR_MODULE_ENABLED +// #define HAL_PCCARD_MODULE_ENABLED +// #define HAL_SRAM_MODULE_ENABLED +// #define HAL_SDRAM_MODULE_ENABLED +// #define HAL_HASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +// #define HAL_EXTI_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +// #define HAL_SMBUS_MODULE_ENABLED +// #define HAL_I2S_MODULE_ENABLED +// #define HAL_IWDG_MODULE_ENABLED +// #define HAL_LTDC_MODULE_ENABLED +// #define HAL_DSI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +// #define HAL_QSPI_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +// #define HAL_RNG_MODULE_ENABLED +// #define HAL_RTC_MODULE_ENABLED +// #define HAL_SAI_MODULE_ENABLED +// #define HAL_SD_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +// #define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +// #define HAL_IRDA_MODULE_ENABLED +// #define HAL_SMARTCARD_MODULE_ENABLED +// #define HAL_WWDG_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +// #define HAL_PCD_MODULE_ENABLED +// #define HAL_HCD_MODULE_ENABLED +// #define HAL_FMPI2C_MODULE_ENABLED +// #define HAL_SPDIFRX_MODULE_ENABLED +// #define HAL_DFSDM_MODULE_ENABLED +// #define HAL_LPTIM_MODULE_ENABLED +// #define HAL_MMC_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +// #define USE_FULL_ASSERT 1U + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY 0x000000FFU +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY 0x00000FFFU + +#define PHY_READ_TO 0x0000FFFFU +#define PHY_WRITE_TO 0x0000FFFFU + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ + +#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ + +#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ + +#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "stm32f4xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32f4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/ldscript.ld new file mode 100644 index 0000000000..19eec62fba --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/ldscript.ld @@ -0,0 +1,203 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F4x7Vx Device with +** 512/1024KByte FLASH, 192KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE +CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K +FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.cpp new file mode 100644 index 0000000000..3721d4f5b5 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.cpp @@ -0,0 +1,275 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // Digital pin 0 + PA_1, // Digital pin 1 + PA_2, // Digital pin 2 + PA_3, // Digital pin 3 + PA_4, // Digital pin 4 + PA_5, // Digital pin 5 + PA_6, // Digital pin 6 + PA_7, // Digital pin 7 + PA_8, // Digital pin 8 + PA_9, // Digital pin 9 + PA_10, // Digital pin 10 + PA_11, // Digital pin 11 + PA_12, // Digital pin 12 + PA_13, // Digital pin 13 + PA_14, // Digital pin 14 + PA_15, // Digital pin 15 + + PB_0, // Digital pin 16 + PB_1, // Digital pin 17 + PB_2, // Digital pin 18 + PB_3, // Digital pin 19 + PB_4, // Digital pin 20 + PB_5, // Digital pin 21 + PB_6, // Digital pin 22 + PB_7, // Digital pin 23 + PB_8, // Digital pin 24 + PB_9, // Digital pin 25 + PB_10, // Digital pin 26 + PB_11, // Digital pin 27 + PB_12, // Digital pin 28 + PB_13, // Digital pin 29 + PB_14, // Digital pin 30 + PB_15, // Digital pin 31 + + PC_0, // Digital pin 32 + PC_1, // Digital pin 33 + PC_2, // Digital pin 34 + PC_3, // Digital pin 35 + PC_4, // Digital pin 36 + PC_5, // Digital pin 37 + PC_6, // Digital pin 38 + PC_7, // Digital pin 39 + PC_8, // Digital pin 40 + PC_9, // Digital pin 41 + PC_10, // Digital pin 42 + PC_11, // Digital pin 43 + PC_12, // Digital pin 44 + PC_13, // Digital pin 45 + PC_14, // Digital pin 46 + PC_15, // Digital pin 47 + + PD_0, // Digital pin 48 + PD_1, // Digital pin 49 + PD_2, // Digital pin 50 + PD_3, // Digital pin 51 + PD_4, // Digital pin 52 + PD_5, // Digital pin 53 + PD_6, // Digital pin 54 + PD_7, // Digital pin 55 + PD_8, // Digital pin 56 + PD_9, // Digital pin 57 + PD_10, // Digital pin 58 + PD_11, // Digital pin 59 + PD_12, // Digital pin 60 + PD_13, // Digital pin 61 + PD_14, // Digital pin 62 + PD_15, // Digital pin 63 + + PE_0, // Digital pin 64 + PE_1, // Digital pin 65 + PE_2, // Digital pin 66 + PE_3, // Digital pin 67 + PE_4, // Digital pin 68 + PE_5, // Digital pin 69 + PE_6, // Digital pin 70 + PE_7, // Digital pin 71 + PE_8, // Digital pin 72 + PE_9, // Digital pin 73 + PE_10, // Digital pin 74 + PE_11, // Digital pin 75 + PE_12, // Digital pin 76 + PE_13, // Digital pin 77 + PE_14, // Digital pin 78 + PE_15, // Digital pin 79 + + PH_0, // Digital pin 80, used by the external oscillator + PH_1 // Digital pin 81, used by the external oscillator +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC2 + 35, // A13, PC3 + 36, // A14, PC4 + 37 // A15, PC5 +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +static uint8_t SetSysClock_PLL_HSE(uint8_t bypass) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + // Enable HSE oscillator and activate PLL with HSE as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + if (bypass == 0) { + RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT + } else { + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN + } + + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2) + RCC_OscInitStruct.PLL.PLLQ = 7; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + /* + if (bypass == 0) + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz + else + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz + */ + + return 1; // OK +} + +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + // Enable HSI oscillator and activate PLL with HSI as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16) + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2) + RCC_OscInitStruct.PLL.PLLQ = 7; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz + + return 1; // OK +} + +WEAK void SystemClock_Config(void) +{ + /* 1- If fail try to start with HSE and external xtal */ + if (SetSysClock_PLL_HSE(0) == 0) { + /* 2- Try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(1) == 0) { + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == 0) { + Error_Handler(); + } + } + } + + /* Ensure CCM RAM clock is enabled */ + __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); + + /* Output clock on MCO2 pin(PC9) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); +} + +#ifdef __cplusplus +} +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.h new file mode 100644 index 0000000000..94fa79c065 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/variant.h @@ -0,0 +1,203 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +// | DIGITAL | ANALOG IN | ANALOG OUT | UART/USART | TWI | SPI | SPECIAL | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PA0 PIN_A0 // | 0 | A0 (ADC1) | | UART4_TX | | | | +#define PA1 PIN_A1 // | 1 | A1 (ADC1) | | UART4_RX | | | | +#define PA2 PIN_A2 // | 2 | A2 (ADC1) | | USART2_TX | | | | +#define PA3 PIN_A3 // | 3 | A3 (ADC1) | | USART2_RX | | | | +#define PA4 PIN_A4 // | 4 | A4 (ADC1) | DAC_OUT1 | | | SPI1_SS, (SPI3_SS) | | +#define PA5 PIN_A5 // | 5 | A5 (ADC1) | DAC_OUT2 | | | SPI1_SCK | | +#define PA6 PIN_A6 // | 6 | A6 (ADC1) | | | | SPI1_MISO | | +#define PA7 PIN_A7 // | 7 | A7 (ADC1) | | | | SPI1_MOSI | | +#define PA8 8 // | 8 | | | | TWI3_SCL | | | +#define PA9 9 // | 9 | | | USART1_TX | | | | +#define PA10 10 // | 10 | | | USART1_RX | | | | +#define PA11 11 // | 11 | | | | | | | +#define PA12 12 // | 12 | | | | | | | +#define PA13 13 // | 13 | | | | | | SWD_SWDIO | +#define PA14 14 // | 14 | | | | | | SWD_SWCLK | +#define PA15 15 // | 15 | | | | | SPI3_SS, (SPI1_SS) | | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PB0 PIN_A8 // | 16 | A8 (ADC1) | | | | | | +#define PB1 PIN_A9 // | 17 | A9 (ADC1) | | | | | | +#define PB2 18 // | 18 | | | | | | BOOT1 | +#define PB3 19 // | 19 | | | | | SPI3_SCK, (SPI1_SCK) | | +#define PB4 20 // | 20 | | | | | SPI3_MISO, (SPI1_MISO) | | +#define PB5 21 // | 21 | | | | | SPI3_MOSI, (SPI1_MOSI) | | +#define PB6 22 // | 22 | | | USART1_TX | TWI1_SCL | | | +#define PB7 23 // | 23 | | | USART1_RX | TWI1_SDA | | | +#define PB8 24 // | 24 | | | | TWI1_SCL | | | +#define PB9 25 // | 25 | | | | TWI1_SDA | SPI2_SS | | +#define PB10 26 // | 26 | | | USART3_TX, (UART4_TX) | TWI2_SCL | SPI2_SCK | | +#define PB11 27 // | 27 | | | USART3_RX | TWI2_SDA | | | +#define PB12 28 // | 28 | | | | | SPI2_SS | | +#define PB13 29 // | 29 | | | | | SPI2_SCK | | +#define PB14 30 // | 30 | | | | | SPI2_MISO | | +#define PB15 31 // | 31 | | | | | SPI2_MOSI | | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PC0 PIN_A10 // | 32 | A10 (ADC1) | | | | | | +#define PC1 PIN_A11 // | 33 | A11 (ADC1) | | | | | | +#define PC2 PIN_A12 // | 34 | A12 (ADC1) | | | | SPI2_MISO | | +#define PC3 PIN_A13 // | 35 | A13 (ADC1) | | | | SPI2_MOSI | | +#define PC4 PIN_A14 // | 36 | A14 (ADC1) | | | | | | +#define PC5 PIN_A15 // | 37 | A15 (ADC1) | | USART3_RX | | | | +#define PC6 38 // | 38 | | | USART6_TX | | | | +#define PC7 39 // | 39 | | | USART6_RX | | | | +#define PC8 40 // | 40 | | | | | | | +#define PC9 41 // | 41 | | | USART3_TX | TWI3_SDA | | | +#define PC10 42 // | 42 | | | | | SPI3_SCK | | +#define PC11 43 // | 43 | | | USART3_RX, (UART4_RX) | | SPI3_MISO | | +#define PC12 44 // | 44 | | | UART5_TX | | SPI3_MOSI | | +#define PC13 45 // | 45 | | | | | | | +#define PC14 46 // | 46 | | | | | | OSC32_IN | +#define PC15 47 // | 47 | | | | | | OSC32_OUT | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PD0 48 // | 48 | | | | | | | +#define PD1 49 // | 49 | | | | | | | +#define PD2 50 // | 50 | | | UART5_RX | | | | +#define PD3 51 // | 51 | | | | | | | +#define PD4 52 // | 52 | | | | | | | +#define PD5 53 // | 53 | | | USART2_TX | | | | +#define PD6 54 // | 54 | | | USART2_RX | | | | +#define PD7 55 // | 55 | | | | | | | +#define PD8 56 // | 56 | | | USART3_TX | | | | +#define PD9 57 // | 57 | | | USART3_RX | | | | +#define PD10 58 // | 58 | | | | | | | +#define PD11 59 // | 59 | | | | | | | +#define PD12 60 // | 60 | | | | | | | +#define PD13 61 // | 61 | | | | | | | +#define PD14 62 // | 62 | | | | | | | +#define PD15 63 // | 63 | | | | | | | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PE0 64 // | 64 | | | | | | | +#define PE1 65 // | 65 | | | | | | | +#define PE2 66 // | 66 | | | | | | | +#define PE3 67 // | 67 | | | | | | | +#define PE4 68 // | 68 | | | | | | | +#define PE5 69 // | 69 | | | | | | | +#define PE6 70 // | 70 | | | | | | | +#define PE7 71 // | 71 | | | | | | | +#define PE8 72 // | 72 | | | | | | | +#define PE9 73 // | 73 | | | | | | | +#define PE10 74 // | 74 | | | | | | | +#define PE11 75 // | 75 | | | | | | | +#define PE12 76 // | 76 | | | | | | | +#define PE13 77 // | 77 | | | | | | | +#define PE14 78 // | 78 | | | | | | | +#define PE15 79 // | 79 | | | | | | | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| +#define PH0 80 // | 80 | | | | | | OSC_IN | +#define PH1 81 // | 81 | | | | | | OSC_OUT | +// |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------| + +/// This must be a literal +#define NUM_DIGITAL_PINS 82 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN +#define LED_BUILTIN PA5 +#endif +#define LED_GREEN LED_BUILTIN + +// On-board user button +#ifndef USER_BTN +#define USER_BTN PC13 +#endif + +// SPI definitions +#define PIN_SPI_SS PA4 +#define PIN_SPI_SS1 PA4 +#define PIN_SPI_SS2 PB12 +#define PIN_SPI_SS3 PA15 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB9 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB8 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif +#ifndef TIMER_SERIAL + #define TIMER_SERIAL TIM5 +#endif + +// UART Definitions +#define SERIAL_UART_INSTANCE 2 + +// Default pin used for 'Serial' instance +// Mandatory for Firmata +#define PIN_SERIAL_RX PA3 +#define PIN_SERIAL_TX PA2 + +/* Extra HAL modules */ +#define HAL_DAC_MODULE_ENABLED + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial1 +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PeripheralPins.c new file mode 100644 index 0000000000..cc700201aa --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PeripheralPins.c @@ -0,0 +1,361 @@ +/* + ******************************************************************************* + * Copyright (c) 2016, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +// ===== +// Note: Commented lines are alternative possibilities which are not used per default. +// If you change them, you will have to know what you do +// ===== + + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + // {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + // {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + // {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + // {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + // {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + // {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + // {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + // {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + // {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + // {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + // {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + // {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + // {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + // {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + // {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + // {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + // {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + // {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + // {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + // {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + // {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + // {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + // {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + // {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + // {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + // {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + // {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + // {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + // {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + // {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + // {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + // {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + // {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + // {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + // {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 - LD2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + // {PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PC_7, FMPI2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)}, + // {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PC_12, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + // {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PC_6, FMPI2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - STLink Tx + // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 - STLink Tx + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 - STLink Tx + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - STLink Rx + // {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - STLink Rx + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 - STLink Rx + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + // {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + //{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // Fan0, TIM8_CH2N + // {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // Fan1, TIM8_CH3N + {PB_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // Fan2, TIM2_CH4 + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // E0 Heater, TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // E1 Heater, TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // LED G, TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // LED R, TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // LED B, TIM4_CH2 + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + // {PB_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + // {PB_9, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + // {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + // {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + // {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + // {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + // {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + // {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + // {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + // {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + // {PC_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_7, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + // {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + // {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + // {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + // {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + // {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + // {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + // {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + // {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + // {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + // {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 + // {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_CLK + // {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS + // {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0 + // {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1 + // {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK2_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +const PinMap PinMap_USB_OTG_FS[] = { + // {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + // {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)}, // USB_OTG_FS_VBUS + // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +#ifdef HAL_PCD_MODULE_ENABLED +const PinMap PinMap_USB_OTG_HS[] = { + {NC, NP, 0} +}; +#endif + + diff --git a/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PinNamesVar.h new file mode 100644 index 0000000000..bff3f21349 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/PinNamesVar.h @@ -0,0 +1,30 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/ldscript.ld new file mode 100644 index 0000000000..2a61072cb1 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/ldscript.ld @@ -0,0 +1,187 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F407VETx Device with +** 512KByte FLASH, 128KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20020000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200;; /* required amount of heap */ +_Min_Stack_Size = 0x400;; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x8010000, LENGTH = 512K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text ALIGN(4): + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata ALIGN(4): + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /*_siccmram = LOADADDR(.ccmram);*/ + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.cpp new file mode 100644 index 0000000000..7e3df41f1b --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.cpp @@ -0,0 +1,201 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Pin number +const PinName digitalPin[] = { + PA_0, //D0 + PA_1, //D1 + PA_2, //D2 + PA_3, //D3 + PA_4, //D4 + PA_5, //D5 + PA_6, //D6 + PA_7, //D7 + PA_8, //D8 + PA_9, //D9 + PA_10, //D10 + PA_11, //D11 + PA_12, //D12 + PA_13, //D13 + PA_14, //D14 + PA_15, //D15 + PB_0, //D16 + PB_1, //D17 + PB_2, //D18 + PB_3, //D19 + PB_4, //D20 + PB_5, //D21 + PB_6, //D22 + PB_7, //D23 + PB_8, //D24 + PB_9, //D25 + PB_10, //D26 + PB_11, //D27 + PB_12, //D28 + PB_13, //D29 + PB_14, //D30 + PB_15, //D31 + PC_0, //D32 + PC_1, //D33 + PC_2, //D34 + PC_3, //D35 + PC_4, //D36 + PC_5, //D37 + PC_6, //D38 + PC_7, //D39 + PC_8, //D40 + PC_9, //D41 + PC_10, //D42 + PC_11, //D43 + PC_12, //D44 + PC_13, //D45 + PC_14, //D46 + PC_15, //D47 + PD_0, //D48 + PD_1, //D49 + PD_2, //D50 + PD_3, //D51 + PD_4, //D52 + PD_5, //D53 + PD_6, //D54 + PD_7, //D55 + PD_8, //D56 + PD_9, //D57 + PD_10, //D58 + PD_11, //D59 + PD_12, //D60 + PD_13, //D61 + PD_14, //D62 + PD_15, //D63 + PE_0, //D64 + PE_1, //D65 + PE_2, //D66 + PE_3, //D67 + PE_4, //D68 + PE_5, //D69 + PE_6, //D70 + PE_7, //D71 + PE_8, //D72 + PE_9, //D73 + PE_10, //D74 + PE_11, //D75 + PE_12, //D76 + PE_13, //D77 + PE_14, //D78 + PE_15, //D79 + + //Duplicated ADC Pins + PA_3, //D80/A0 + PA_4, //D81/A1 + PC_0, //D82/A2 + PC_1, //D83/A3 + PC_2, //D84/A4 + PC_3, //D85/A5 + PC_4 //D86/A6 +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * The system Clock is configured as follow : + * System Clock source = PLL (HSE) + * SYSCLK(Hz) = 180000000 + * HCLK(Hz) = 180000000 + * AHB Prescaler = 1 + * APB1 Prescaler = 4 + * APB2 Prescaler = 2 + * HSE Frequency(Hz) = 12000000 + * PLL_M = 6 + * PLL_N = 180 + * PLL_P = 2 + * PLL_Q = 7 + * VDD(V) = 3.3 + * Main regulator output voltage = Scale1 mode + * Flash Latency(WS) = 5 + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + +#ifdef HAL_PWR_MODULE_ENABLED + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); +#endif + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 6; + RCC_OscInitStruct.PLL.PLLN = 180; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + RCC_OscInitStruct.PLL.PLLR = 2; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + HAL_PWREx_EnableOverDrive(); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLRCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); + + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; + PeriphClkInitStruct.PLLSAI.PLLSAIM = 6; + PeriphClkInitStruct.PLLSAI.PLLSAIN = 96; + PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2; + PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4; + PeriphClkInitStruct.PLLSAIDivQ = 1; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +} + +#ifdef __cplusplus +} +#endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.h new file mode 100644 index 0000000000..4bd5b63dfe --- /dev/null +++ b/buildroot/share/PlatformIO/variants/MARLIN_FYSETC_S6/variant.h @@ -0,0 +1,184 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +#define PA0 0 //D0 +#define PA1 1 //D1 +#define PA2 2 //D2 +#define PA3 3 //D3 +#define PA4 4 //D4 +#define PA5 5 //D5 +#define PA6 6 //D6 +#define PA7 7 //D7 +#define PA8 8 //D8 +#define PA9 9 //D9 +#define PA10 10 //D10 +#define PA11 11 //D11 +#define PA12 12 //D12 +#define PA13 13 //D13 +#define PA14 14 //D14 +#define PA15 15 //D15 +#define PB0 16 //D16 +#define PB1 17 //D17 +#define PB2 18 //D18 +#define PB3 19 //D19 +#define PB4 20 //D20 +#define PB5 21 //D21 +#define PB6 22 //D22 +#define PB7 23 //D23 +#define PB8 24 //D24 +#define PB9 25 //D25 +#define PB10 26 //D26 +#define PB11 27 //D27 +#define PB12 28 //D28 +#define PB13 29 //D29 +#define PB14 30 //D30 +#define PB15 31 //D31 +#define PC0 32 //D32 +#define PC1 33 //D33 +#define PC2 34 //D34 +#define PC3 35 //D35 +#define PC4 36 //D36 +#define PC5 37 //D37 +#define PC6 38 //D38 +#define PC7 39 //D39 +#define PC8 40 //D40 +#define PC9 41 //D41 +#define PC10 42 //D42 +#define PC11 43 //D43 +#define PC12 44 //D44 +#define PC13 45 //D45 +#define PC14 46 //D46 +#define PC15 47 //D47 +#define PD0 48 //D48 +#define PD1 49 //D49 +#define PD2 50 //D50 +#define PD3 51 //D51 +#define PD4 52 //D52 +#define PD5 53 //D53 +#define PD6 54 //D54 +#define PD7 55 //D55 +#define PD8 56 //D56 +#define PD9 57 //D57 +#define PD10 58 //D58 +#define PD11 59 //D59 +#define PD12 60 //D60 +#define PD13 61 //D61 +#define PD14 62 //D62 +#define PD15 63 //D63 +#define PE0 64 //D64 +#define PE1 65 //D65 +#define PE2 66 //D66 +#define PE3 67 //D67 +#define PE4 68 //D68 +#define PE5 69 //D69 +#define PE6 70 //D70 +#define PE7 71 //D71 +#define PE8 72 //D72 +#define PE9 73 //D73 +#define PE10 74 //D74 +#define PE11 75 //D75 +#define PE12 76 //D76 +#define PE13 77 //D77 +#define PE14 78 //D78 +#define PE15 79 //D79 + +// This must be a literal with the same value as PEND +#define NUM_DIGITAL_PINS 87 +// This must be a literal with a value less than or equal to to MAX_ANALOG_INPUTS +#define NUM_ANALOG_INPUTS 7 +#define NUM_ANALOG_FIRST 80 + +//#define ADC_RESOLUTION 12 + +// PWM resolution +//#define PWM_RESOLUTION 12 +#define PWM_FREQUENCY 20000 // >= 20 Khz => inaudible noise for fans +#define PWM_MAX_DUTY_CYCLE 255 + +// SPI Definitions +#define PIN_SPI_SS PA4 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 + +// I2C Definitions +#define PIN_WIRE_SDA PB9 +#define PIN_WIRE_SCL PB8 + +// Timer Definitions +// Do not use timer used by PWM pin. See PinMap_PWM. +#define TIMER_TONE TIM6 +#define TIMER_SERVO TIM5 +#define TIMER_SERIAL TIM7 + +// UART Definitions +//#define SERIAL_UART_INSTANCE 1 // Connected to EXP3 header +/* Enable Serial 3 */ +#define HAVE_HWSERIAL1 +#define HAVE_HWSERIAL3 + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#define PIN_SERIAL_RX PA10 +#define PIN_SERIAL_TX PA9 + +/* HAL configuration */ +#define HSE_VALUE 12000000U + +#define FLASH_PAGE_SIZE (4U * 1024U) + +#ifdef __cplusplus +} // extern "C" +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_HARDWARE_OPEN Serial +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ diff --git a/buildroot/share/PlatformIO/variants/archim/.gitignore b/buildroot/share/PlatformIO/variants/archim/.gitignore new file mode 100644 index 0000000000..2827c7d4f0 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/.gitignore @@ -0,0 +1,2 @@ +# Exception for libsam +!libsam_sam3x8e_gcc_rel.a diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile b/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile new file mode 100644 index 0000000000..4332f36080 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile @@ -0,0 +1,42 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory + +#------------------------------------------------------------------------------- +# Rules +#------------------------------------------------------------------------------- + +all: arduino_due_x + +.PHONY: arduino_due_x +arduino_due_x: + @echo ------------------------------------------------------------------------------------ + @echo --- Making variant arduino_due_x + @$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk +# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk + @echo ------------------------------------------------------------------------------------ + +.PHONY: clean +clean: + @echo ------------------------------------------------------------------------------------ + @echo --- Cleaning variant arduino_due_x + @$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@ +# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@ + @echo ------------------------------------------------------------------------------------ + diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk new file mode 100644 index 0000000000..a3cc2337a8 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk @@ -0,0 +1,25 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Optimization level +# -O1 Optimize +# -O2 Optimize even more +# -O3 Optimize yet more +# -O0 Reduce compilation time and make debugging produce the expected results +# -Os Optimize for size +OPTIMIZATION = -g -O0 -DDEBUG diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk new file mode 100644 index 0000000000..32f35d264c --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk @@ -0,0 +1,82 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Tool suffix when cross-compiling +CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi- + +# Compilation tools +AR = $(CROSS_COMPILE)ar +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +AS = $(CROSS_COMPILE)as +NM = $(CROSS_COMPILE)nm +ifeq ($(OS),Windows_NT) +RM=cs-rm -Rf +else +RM=rm -Rf +endif + +SEP=\\ + +# --------------------------------------------------------------------------------------- +# C Flags + +CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int +CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses +CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused +CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef +CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings +CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes +CFLAGS += -Wmissing-prototypes -Wmissing-declarations +CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations +CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long +CFLAGS += -Wunreachable-code +CFLAGS += -Wcast-align +#CFLAGS += -Wmissing-noreturn +#CFLAGS += -Wconversion + +CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -nostdlib -std=c99 +CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT) + +# To reduce application size use only integer printf function. +CFLAGS += -Dprintf=iprintf + +# --------------------------------------------------------------------------------------- +# CPP Flags + +CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 +CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code +CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused +CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef +CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings +CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations +CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations +CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long +#CPPFLAGS += -Wmissing-noreturn +#CPPFLAGS += -Wconversion + +CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -std=c++98 +CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) + +# To reduce application size use only integer printf function. +CPPFLAGS += -Dprintf=iprintf + +# --------------------------------------------------------------------------------------- +# ASM Flags + +ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES) diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk new file mode 100644 index 0000000000..3f8b1b7603 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk @@ -0,0 +1,184 @@ +# +# Copyright (c) 2012 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Makefile for compiling libArduino +.SUFFIXES: .o .a .c .s + +CHIP=__SAM3X8E__ +VARIANT=arduino_due_x +LIBNAME=libvariant_$(VARIANT) +TOOLCHAIN=gcc + +#------------------------------------------------------------------------------- +# Path +#------------------------------------------------------------------------------- + +# Output directories +OUTPUT_BIN = ../../../cores/arduino + +# Libraries +PROJECT_BASE_PATH = .. +SYSTEM_PATH = ../../../system +CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS +CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include +CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL +#CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE) + +ARDUINO_PATH = ../../../cores/arduino +VARIANT_BASE_PATH = ../../../variants +VARIANT_PATH = ../../../variants/$(VARIANT) + +#------------------------------------------------------------------------------- +# Files +#------------------------------------------------------------------------------- + +#vpath %.h $(PROJECT_BASE_PATH) $(SYSTEM_PATH) $(VARIANT_PATH) +vpath %.cpp $(PROJECT_BASE_PATH) + +VPATH+=$(PROJECT_BASE_PATH) + +INCLUDES = +#INCLUDES += -I$(PROJECT_BASE_PATH) +INCLUDES += -I$(ARDUINO_PATH) +INCLUDES += -I$(ARDUINO_PATH)/USB +INCLUDES += -I$(SYSTEM_PATH) +INCLUDES += -I$(SYSTEM_PATH)/libsam +INCLUDES += -I$(SYSTEM_PATH)/USBHost +INCLUDES += -I$(VARIANT_BASE_PATH) +INCLUDES += -I$(VARIANT_PATH) +INCLUDES += -I$(CMSIS_ARM_PATH) +INCLUDES += -I$(CMSIS_ATMEL_PATH) + +#------------------------------------------------------------------------------- +ifdef DEBUG +include debug.mk +else +include release.mk +endif + +#------------------------------------------------------------------------------- +# Tools +#------------------------------------------------------------------------------- + +include $(TOOLCHAIN).mk + +#------------------------------------------------------------------------------- +ifdef DEBUG +OUTPUT_OBJ=debug +OUTPUT_LIB_POSTFIX=dbg +else +OUTPUT_OBJ=release +OUTPUT_LIB_POSTFIX=rel +endif + +OUTPUT_LIB=$(LIBNAME)_$(TOOLCHAIN)_$(OUTPUT_LIB_POSTFIX).a +OUTPUT_PATH=$(OUTPUT_OBJ)_$(VARIANT) + +#------------------------------------------------------------------------------- +# C source files and objects +#------------------------------------------------------------------------------- +C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c) + +C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC))) + +# during development, remove some files +C_OBJ_FILTER= + +C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# CPP source files and objects +#------------------------------------------------------------------------------- +CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp) + +CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC))) + +# during development, remove some files +CPP_OBJ_FILTER= + +CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# Assembler source files and objects +#------------------------------------------------------------------------------- +A_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.s) + +A_OBJ_TEMP=$(patsubst %.s, %.o, $(notdir $(A_SRC))) + +# during development, remove some files +A_OBJ_FILTER= + +A_OBJ=$(filter-out $(A_OBJ_FILTER), $(A_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# Rules +#------------------------------------------------------------------------------- +all: $(VARIANT) + +$(VARIANT): create_output $(OUTPUT_LIB) + +.PHONY: create_output +create_output: + @echo ------------------------------------------------------------------------------------ + @echo ------------------------- + @echo --- Preparing variant $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN) + @echo ------------------------- +# @echo *$(INCLUDES) +# @echo ------------------------- +# @echo *$(C_SRC) +# @echo ------------------------- +# @echo *$(C_OBJ) +# @echo ------------------------- +# @echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) +# @echo ------------------------- +# @echo *$(CPP_SRC) +# @echo ------------------------- +# @echo *$(CPP_OBJ) +# @echo ------------------------- +# @echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) +# @echo ------------------------- +# @echo *$(A_SRC) +# @echo ------------------------- + + -@mkdir $(OUTPUT_PATH) 1>NUL 2>&1 + @echo ------------------------------------------------------------------------------------ + +$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c +# @"$(CC)" -v -c $(CFLAGS) $< -o $@ + @"$(CC)" -c $(CFLAGS) $< -o $@ + +$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp +# @"$(CC)" -c $(CPPFLAGS) $< -o $@ + @"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@ + +$(addprefix $(OUTPUT_PATH)/,$(A_OBJ)): $(OUTPUT_PATH)/%.o: %.s + @"$(AS)" -c $(ASFLAGS) $< -o $@ + +$(OUTPUT_LIB): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ)) + @"$(AR)" -v -r "$(OUTPUT_BIN)/$@" $^ + @"$(NM)" "$(OUTPUT_BIN)/$@" > "$(OUTPUT_BIN)/$@.txt" + + +.PHONY: clean +clean: + @echo ------------------------------------------------------------------------------------ + @echo --- Cleaning $(VARIANT) files [$(OUTPUT_PATH)$(SEP)*.o] + -@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1 + -@$(RM) $(OUTPUT_BIN)/$(OUTPUT_LIB) 1>NUL 2>&1 + @echo ------------------------------------------------------------------------------------ + diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk new file mode 100644 index 0000000000..2659255bff --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk @@ -0,0 +1,25 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Optimization level +# -O1 Optimize +# -O2 Optimize even more +# -O3 Optimize yet more +# -O0 Reduce compilation time and make debugging produce the expected results +# -Os Optimize for size +OPTIMIZATION = -Os diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb new file mode 100644 index 0000000000..4e8375b5f1 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb @@ -0,0 +1,37 @@ +#******************************************************* +# +# Connect to J-Link and debug application in flash on SAM3X. +# + +# Define 'reset' command +define reset + +# Connect to the J-Link gdb server +target remote localhost:2331 + +# Reset the chip to get to a known state +monitor reset + +# Select flash device +monitor flash device = AT91SAM3X8E + +# Enable flash download and flash breakpoints +monitor flash download = 1 + +# Load the program +load + +# Reset peripheral (RSTC_CR) +set *0x400e1a00 = 0xA5000004 + +# Initialize PC and stack pointer +mon reg sp=(0x80000) +#set *0x80004 = *0x80004 & 0xFFFFFFFE +mon reg pc=(0x80004) + +info reg + +break main + +# End of 'reset' command +end diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb new file mode 100644 index 0000000000..15a1792a91 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb @@ -0,0 +1,37 @@ +#******************************************************* +# +# Connect to J-Link and debug application in sram on SAM3X. +# + +# Define 'reset' command +define reset + +# Connect to the J-Link gdb server +target remote localhost:2331 + +# Reset the chip to get to a known state +monitor reset + +# Select flash device +monitor flash device = AT91SAM3X8E + +# Enable flash download and flash breakpoints +monitor flash download = 1 + +# Load the program +load + +# Reset peripheral (RSTC_CR) +set *0x400e1a00 = 0xA5000004 + +# Initialize PC and stack pointer +mon reg sp=(0x20000000) +#set *0x20000004 = *0x20000004 & 0xFFFFFFFE +mon reg pc=(0x20000004) + +info reg + +break main + +# End of 'reset' command +end diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac new file mode 100644 index 0000000000..959583582c --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac @@ -0,0 +1,44 @@ +// --------------------------------------------------------- +// ATMEL Microcontroller Software Support - ROUSSET - +// --------------------------------------------------------- +// The software is delivered "AS IS" without warranty or +// condition of any kind, either express, implied or +// statutory. This includes without limitation any warranty +// or condition with respect to merchantability or fitness +// for any particular purpose, or against the infringements of +// intellectual property rights of others. +// --------------------------------------------------------- +// File: at91sam3u-ek-flash.mac +// User setup file for CSPY debugger. +// --------------------------------------------------------- +__var __mac_i; +__var __mac_pt; + +/********************************************************************* +* +* execUserReset() +*/ +execUserReset() +{ + __message "------------------------------ execUserReset ---------------------------------"; + __message "-------------------------------Set PC Reset ----------------------------------"; + + __hwReset(0); + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} + +/********************************************************************* +* +* execUserPreload() +*/ +execUserPreload() +{ + __message "------------------------------ execUserPreload ---------------------------------"; + + __hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac new file mode 100644 index 0000000000..d97a4ab6bb --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac @@ -0,0 +1,44 @@ +// --------------------------------------------------------- +// ATMEL Microcontroller Software Support - ROUSSET - +// --------------------------------------------------------- +// The software is delivered "AS IS" without warranty or +// condition of any kind, either express, implied or +// statutory. This includes without limitation any warranty +// or condition with respect to merchantability or fitness +// for any particular purpose, or against the infringements of +// intellectual property rights of others. +// --------------------------------------------------------- +// File: at91sam3u-ek-sram.mac +// User setup file for CSPY debugger. +// --------------------------------------------------------- +__var __mac_i; +__var __mac_pt; + +/********************************************************************* +* +* execUserReset() +*/ +execUserReset() +{ + __message "------------------------------ execUserReset ---------------------------------"; + __message "-------------------------------Set PC Reset ----------------------------------"; + + //__hwReset(50); + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} + +/********************************************************************* +* +* execUserPreload() +*/ +execUserPreload() +{ + __message "------------------------------ execUserPreload ---------------------------------"; + + __hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} diff --git a/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a b/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a new file mode 100644 index 0000000000..3e25e6cabd Binary files /dev/null and b/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a differ diff --git a/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt b/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt new file mode 100644 index 0000000000..9b614811bd --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt @@ -0,0 +1,576 @@ + +adc10_sam3u.o: + +adc12_sam3u.o: + +adc_sam3snxa.o: + +pio.o: +00000000 T PIO_Clear +00000000 T PIO_Configure +00000000 T PIO_DisableInterrupt +00000000 T PIO_Get +00000000 T PIO_GetOutputDataStatus +00000000 T PIO_PullUp +00000000 T PIO_Set +00000000 T PIO_SetDebounceFilter +00000000 T PIO_SetInput +00000000 T PIO_SetOutput +00000000 T PIO_SetPeripheral + +pmc.o: +00000000 T pmc_clr_fast_startup_input +00000000 T pmc_disable_all_pck +00000000 T pmc_disable_all_periph_clk +00000000 T pmc_disable_interrupt +00000000 T pmc_disable_pck +00000000 T pmc_disable_periph_clk +00000000 T pmc_disable_pllack +00000000 T pmc_disable_udpck +00000000 T pmc_disable_upll_clock +00000000 T pmc_enable_all_pck +00000000 T pmc_enable_all_periph_clk +00000000 T pmc_enable_backupmode +00000000 T pmc_enable_interrupt +00000000 T pmc_enable_pck +00000000 T pmc_enable_periph_clk +00000000 T pmc_enable_pllack +00000000 T pmc_enable_sleepmode +00000000 T pmc_enable_udpck +00000000 T pmc_enable_upll_clock +00000000 T pmc_enable_waitmode +00000000 T pmc_get_interrupt_mask +00000000 T pmc_get_status +00000000 T pmc_get_writeprotect_status +00000000 T pmc_is_locked_pllack +00000000 T pmc_is_locked_upll +00000000 T pmc_is_pck_enabled +00000000 T pmc_is_periph_clk_enabled +00000000 T pmc_mck_set_prescaler +00000000 T pmc_mck_set_source +00000000 T pmc_osc_disable_fastrc +00000000 T pmc_osc_disable_xtal +00000000 T pmc_osc_enable_fastrc +00000000 T pmc_osc_is_ready_32kxtal +00000000 T pmc_osc_is_ready_mainck +00000000 T pmc_pck_set_prescaler +00000000 T pmc_pck_set_source +00000000 T pmc_set_fast_startup_input +00000000 T pmc_set_writeprotect +00000000 T pmc_switch_mainck_to_fastrc +00000000 T pmc_switch_mainck_to_xtal +00000000 T pmc_switch_mck_to_mainck +00000000 T pmc_switch_mck_to_pllack +00000000 T pmc_switch_mck_to_sclk +00000000 T pmc_switch_mck_to_upllck +00000000 T pmc_switch_pck_to_mainck +00000000 T pmc_switch_pck_to_pllack +00000000 T pmc_switch_pck_to_sclk +00000000 T pmc_switch_pck_to_upllck +00000000 T pmc_switch_sclk_to_32kxtal +00000000 T pmc_switch_udpck_to_pllack +00000000 T pmc_switch_udpck_to_upllck + +pwmc.o: +00000000 t FindClockConfiguration +00000000 T PWMC_ConfigureChannel +00000000 T PWMC_ConfigureChannelExt +00000000 T PWMC_ConfigureClocks +00000000 T PWMC_ConfigureComparisonUnit +00000000 T PWMC_ConfigureEventLineMode +00000000 T PWMC_ConfigureSyncChannel +00000000 T PWMC_DisableChannel +00000000 T PWMC_DisableChannelIt +00000000 T PWMC_DisableIt +00000000 T PWMC_DisableOverrideOutput +00000000 T PWMC_EnableChannel +00000000 T PWMC_EnableChannelIt +00000000 T PWMC_EnableFaultProtection +00000000 T PWMC_EnableIt +00000000 T PWMC_EnableOverrideOutput +00000000 T PWMC_FaultClear +00000000 T PWMC_SetDeadTime +00000000 T PWMC_SetDutyCycle +00000000 T PWMC_SetFaultMode +00000000 T PWMC_SetFaultProtectionValue +00000000 T PWMC_SetOverrideValue +00000000 T PWMC_SetPeriod +00000000 T PWMC_SetSyncChannelUpdatePeriod +00000000 T PWMC_SetSyncChannelUpdateUnlock +00000000 T PWMC_WriteBuffer + U __assert_func +00000000 r __func__.6793 +00000000 r __func__.6804 +00000000 r __func__.6819 +00000000 r __func__.6830 +00000000 r __func__.6841 +00000000 r __func__.6848 +00000000 r __func__.6932 +00000000 r __func__.6938 + +rtc.o: +00000000 T RTC_ClearSCCR +00000000 T RTC_DisableIt +00000000 T RTC_EnableIt +00000000 T RTC_GetDate +00000000 T RTC_GetHourMode +00000000 T RTC_GetSR +00000000 T RTC_GetTime +00000000 T RTC_SetDate +00000000 T RTC_SetDateAlarm +00000000 T RTC_SetHourMode +00000000 T RTC_SetTime +00000000 T RTC_SetTimeAlarm + U __assert_func +00000000 r __func__.6790 +00000000 r __func__.6799 +00000000 r __func__.6804 + +rtt.o: +00000000 T RTT_EnableIT +00000000 T RTT_GetStatus +00000000 T RTT_GetTime +00000000 T RTT_SetAlarm +00000000 T RTT_SetPrescaler + U __assert_func +00000000 r __func__.6797 +00000000 r __func__.6805 + +spi.o: +00000000 T SPI_Configure +00000000 T SPI_ConfigureNPCS +00000000 T SPI_Disable +00000000 T SPI_DisableIt +00000000 T SPI_Enable +00000000 T SPI_EnableIt +00000000 T SPI_GetStatus +00000000 T SPI_IsFinished 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WDT_GetStatus +00000000 T WDT_Restart + +system_sam3xa.o: +00000000 D SystemCoreClock +00000000 T SystemCoreClockUpdate +00000000 T SystemInit +00000000 T system_init_flash + +startup_sam3xa.o: + U ADC_Handler + U BusFault_Handler + U CAN0_Handler + U CAN1_Handler + U DACC_Handler + U DMAC_Handler + U DebugMon_Handler + U EFC0_Handler + U EFC1_Handler + U EMAC_Handler + U HSMCI_Handler + U HardFault_Handler + U MemManage_Handler + U NMI_Handler + U PIOA_Handler + U PIOB_Handler + U PIOC_Handler + U PIOD_Handler + U PMC_Handler + U PWM_Handler + U PendSV_Handler + U RSTC_Handler + U RTC_Handler + U RTT_Handler +00000000 T Reset_Handler + U SMC_Handler + U SPI0_Handler + U SSC_Handler + U SUPC_Handler + U SVC_Handler + U SysTick_Handler + U TC0_Handler + U TC1_Handler + U TC2_Handler + U TC3_Handler + U TC4_Handler + U TC5_Handler + U TC6_Handler + U TC7_Handler + U TC8_Handler + U TRNG_Handler + U TWI0_Handler + U TWI1_Handler + U UART_Handler + U UOTGHS_Handler + U USART0_Handler + U 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g_interrupt_enabled + U gpf_isr + U pmc_enable_periph_clk + U pmc_enable_udpck + U pmc_enable_upll_clock + U pmc_switch_udpck_to_upllck +00000000 b uhd_state + +dacc.o: +00000000 T dacc_disable_channel +00000000 T dacc_disable_interrupt +00000000 T dacc_disable_trigger +00000000 T dacc_enable_channel +00000000 T dacc_enable_flexible_selection +00000000 T dacc_enable_interrupt +00000000 T dacc_get_analog_control +00000000 T dacc_get_channel_status +00000000 T dacc_get_interrupt_mask +00000000 T dacc_get_interrupt_status +00000000 T dacc_get_pdc_base +00000000 T dacc_get_writeprotect_status +00000000 T dacc_reset +00000000 T dacc_set_analog_control +00000000 T dacc_set_channel_selection +00000000 T dacc_set_power_save +00000000 T dacc_set_timing +00000000 T dacc_set_transfer_mode +00000000 T dacc_set_trigger +00000000 T dacc_set_writeprotect +00000000 T dacc_write_conversion_data + +can.o: +00000000 R can_bit_time +00000000 T can_disable +00000000 T can_disable_autobaud_listen_mode +00000000 T can_disable_interrupt +00000000 T can_disable_low_power_mode +00000000 T can_disable_overload_frame +00000000 T can_disable_time_triggered_mode +00000000 T can_disable_timer_freeze +00000000 T can_disable_tx_repeat +00000000 T can_enable +00000000 T can_enable_autobaud_listen_mode +00000000 T can_enable_interrupt +00000000 T can_enable_low_power_mode +00000000 T can_enable_overload_frame +00000000 T can_enable_time_triggered_mode +00000000 T can_enable_timer_freeze +00000000 T can_enable_tx_repeat +00000000 T can_get_internal_timer_value +00000000 T can_get_interrupt_mask +00000000 T can_get_rx_error_cnt +00000000 T can_get_status +00000000 T can_get_timestamp_value +00000000 T can_get_tx_error_cnt +00000000 T can_global_send_abort_cmd +00000000 T can_global_send_transfer_cmd +00000000 T can_init +00000000 T can_mailbox_get_status +00000000 T can_mailbox_init +00000000 T can_mailbox_read +00000000 T can_mailbox_send_abort_cmd +00000000 T can_mailbox_send_transfer_cmd +00000000 T can_mailbox_set_timemark +00000000 T can_mailbox_tx_remote_frame +00000000 T can_mailbox_write +00000000 T can_reset_all_mailbox +00000000 T can_reset_internal_timer +00000000 T can_reset_mailbox_data +00000000 T can_set_rx_sync_stage +00000000 T can_set_timestamp_capture_point + U memset + +efc.o: +00000000 T efc_disable_frdy_interrupt +00000000 T efc_enable_frdy_interrupt +00000000 T efc_get_flash_access_mode +00000000 T efc_get_result +00000000 T efc_get_status +00000000 T efc_get_wait_state +00000000 T efc_init +00000000 T efc_perform_command +0000006c T efc_perform_fcr +00000000 T efc_perform_read_sequence +00000000 T efc_set_flash_access_mode +00000000 T efc_set_wait_state +00000068 T efc_write_fmr +00000000 b iap_perform_command.7049 + +gpbr.o: +00000000 T gpbr_read +00000000 T gpbr_write + +ssc.o: + U memset +00000000 T ssc_disable_interrupt +00000000 T ssc_disable_rx +00000000 T ssc_disable_tx +00000000 T ssc_disable_tx_frame_sync_data +00000000 T ssc_enable_interrupt +00000000 T ssc_enable_rx +00000000 T ssc_enable_tx +00000000 T ssc_enable_tx_frame_sync_data +00000000 T ssc_get_interrupt_mask +00000000 T ssc_get_rx_access +00000000 T ssc_get_rx_compare +00000000 T ssc_get_status +00000000 T ssc_get_tx_access +00000000 T ssc_get_writeprotect_status +00000000 T ssc_i2s_set_receiver +00000000 T ssc_i2s_set_transmitter +00000000 T ssc_is_rx_enabled +00000000 T ssc_is_rx_ready +00000000 T ssc_is_tx_empty +00000000 T ssc_is_tx_enabled +00000000 T ssc_is_tx_ready +00000000 T ssc_read +00000000 T ssc_read_sync_data +00000000 T ssc_reset +00000000 T ssc_set_clock_divider +00000000 T ssc_set_loop_mode +00000000 T ssc_set_normal_mode +00000000 T ssc_set_receiver +00000000 T ssc_set_rx_compare +00000000 T ssc_set_rx_stop_selection +00000000 T ssc_set_td_default_level +00000000 T ssc_set_transmitter +00000000 T ssc_set_writeprotect +00000000 T ssc_write +00000000 T ssc_write_sync_data + +trng.o: +00000000 T trng_disable +00000000 T trng_disable_interrupt +00000000 T trng_enable +00000000 T trng_enable_interrupt +00000000 T trng_get_interrupt_mask +00000000 T trng_get_interrupt_status +00000000 T trng_read_output_data + +rstc.o: +00000000 T rstc_disable_user_reset +00000000 T rstc_disable_user_reset_interrupt +00000000 T rstc_enable_user_reset +00000000 T rstc_enable_user_reset_interrupt +00000000 T rstc_get_reset_cause +00000000 T rstc_get_status +00000000 T rstc_reset_extern +00000000 T rstc_set_external_reset +00000000 T rstc_start_software_reset + +emac.o: +00000000 t circ_inc +00000000 T emac_dev_get_tx_load +00000000 T emac_dev_init +00000000 T emac_dev_read +00000000 T emac_dev_reset +00000000 T emac_dev_set_rx_callback +00000000 T emac_dev_set_tx_wakeup_callback +00000000 T emac_dev_write +00000000 T emac_handler +00000000 T emac_phy_read +00000000 T emac_phy_write +00000000 t emac_reset_rx_mem +00000000 t emac_reset_tx_mem +00000000 b gs_rx_desc +00000000 b gs_tx_callback +00000000 b gs_tx_desc +00000000 b gs_uc_rx_buffer +00000000 b gs_uc_tx_buffer + U memcpy diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld new file mode 100644 index 0000000000..53f2b5f1f5 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld @@ -0,0 +1,146 @@ +/* ---------------------------------------------------------------------------- + * SAM Software Package License + * ---------------------------------------------------------------------------- + * Copyright (c) 2012, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following condition is met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ + sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ + sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ + ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ +} + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > rom + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + /* .bss section which is used for uninitialized data */ + .bss ALIGN(4) (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + . = ALIGN(4); + _end = . ; + + /* .stack_dummy section doesn't contains any symbols. It is only + used for linker to calculate size of stack sections, and assign + values to stack symbols later */ + .stack_dummy : + { + *(.stack*) + } > ram + + /* Set stack top to end of ram, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(_sstack = __StackLimit); + PROVIDE(_estack = __StackTop); +} diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld new file mode 100644 index 0000000000..2a0d54e179 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld @@ -0,0 +1,145 @@ +/* ---------------------------------------------------------------------------- + * SAM Software Package License + * ---------------------------------------------------------------------------- + * Copyright (c) 2012, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following condition is met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ + sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ + sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ + ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ +} + +/* The stack size used by the application. NOTE: you need to adjust */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > ram + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ram + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _end = . ; +} + diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf new file mode 100644 index 0000000000..956230fbd3 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf @@ -0,0 +1,49 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ +/*-Vector table start*/ +define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/ +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; +define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; +define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; +define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000; +define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF; +define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000; +define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF; +/*-Sizes-*/ +/*define symbol __ICFEDIT_size_cstack__ = 0x1000;*//*for nandflash*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x200; +/*-Specials-*/ +/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ +/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ +/*-Exports-*/ +/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/ +export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/ +/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ +define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; +define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; +/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | + mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ +define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__]; +define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; + +/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ +place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/ +place in ROM0_region { readonly }; +place in RAM0_region { readwrite, block HEAP }; +place in RAM1_region { block CSTACK }; /* for nandflash*/ +/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf new file mode 100644 index 0000000000..d7d33537ac --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ +/*-Vector table start*/ +define symbol __ICFEDIT_vector_start__ = 0x20000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; +define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; +define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x900; +define symbol __ICFEDIT_size_heap__ = 0x200; +/*-Exports-*/ +export symbol __ICFEDIT_vector_start__; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; +define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; +/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | + mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ + +/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; +place in RAM0_region { readonly }; +place in RAM1_region { readwrite, block CSTACK, block HEAP }; diff --git a/buildroot/share/PlatformIO/variants/archim/pins_arduino.h b/buildroot/share/PlatformIO/variants/archim/pins_arduino.h new file mode 100644 index 0000000000..4e279aa7be --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/pins_arduino.h @@ -0,0 +1,21 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +// API compatibility +#include "variant.h" + diff --git a/buildroot/share/PlatformIO/variants/archim/variant.cpp b/buildroot/share/PlatformIO/variants/archim/variant.cpp new file mode 100644 index 0000000000..72ad45ef46 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/variant.cpp @@ -0,0 +1,485 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "variant.h" + +/* + * DUE Board pin | PORT | Label + * ----------------+--------+------- + * 0 | PA8 | "RX0" + * 1 | PA9 | "TX0" + * 2 TIOA0 | PB25 | + * 3 TIOA7 | PC28 | + * 4 NPCS1 | PA29 | + * TIOB6 | PC26 | + * 5 TIOA6 | PC25 | + * 6 PWML7 | PC24 | + * 7 PWML6 | PC23 | + * 8 PWML5 | PC22 | + * 9 PWML4 | PC21 | + * 10 NPCS0 | PA28 | + * TIOB7 | PC29 | + * 11 TIOA8 | PD7 | + * 12 TIOB8 | PD8 | + * 13 TIOB0 | PB27 | LED AMBER "L" + * 14 TXD3 | PD4 | "TX3" + * 15 RXD3 | PD5 | "RX3" + * 16 TXD1 | PA13 | "TX2" + * 17 RXD1 | PA12 | "RX2" + * 18 TXD0 | PA11 | "TX1" + * 19 RXD0 | PA10 | "RX1" + * 20 | PB12 | "SDA" + * 21 | PB13 | "SCL" + * 22 | PB26 | + * 23 | PA14 | + * 24 | PA15 | + * 25 | PD0 | + * 26 | PD1 | + * 27 | PD2 | + * 28 | PD3 | + * 29 | PD6 | + * 30 | PD9 | + * 31 | PA7 | + * 32 | PD10 | + * 33 | PC1 | + * 34 | PC2 | + * 35 | PC3 | + * 36 | PC4 | + * 37 | PC5 | + * 38 | PC6 | + * 39 | PC7 | + * 40 | PC8 | + * 41 | PC9 | + * 42 | PA19 | + * 43 | PA20 | + * 44 | PC19 | + * 45 | PC18 | + * 46 | PC17 | + * 47 | PC16 | + * 48 | PC15 | + * 49 | PC14 | + * 50 | PC13 | + * 51 | PC12 | + * 52 NPCS2 | PB21 | + * 53 | PB14 | + * 54 | PA16 | "A0" + * 55 | PA24 | "A1" + * 56 | PA23 | "A2" + * 57 | PA22 | "A3" + * 58 TIOB2 | PA6 | "A4" + * 69 | PA4 | "A5" + * 60 TIOB1 | PA3 | "A6" + * 61 TIOA1 | PA2 | "A7" + * 62 | PB17 | "A8" + * 63 | PB18 | "A9" + * 64 | PB19 | "A10" + * 65 | PB20 | "A11" + * 66 | PB15 | "DAC0" + * 67 | PB16 | "DAC1" + * 68 | PA1 | "CANRX" + * 69 | PA0 | "CANTX" + * 70 | PA17 | "SDA1" + * 71 | PA18 | "SCL1" + * 72 | PC30 | LED AMBER "RX" + * 73 | PA21 | LED AMBER "TX" + * 74 MISO | PA25 | + * 75 MOSI | PA26 | + * 76 SCLK | PA27 | + * 77 NPCS0 | PA28 | + * 78 NPCS3 | PB23 | unconnected! + * + * USB pin | PORT + * ----------------+-------- + * ID | PB11 + * VBOF | PB10 + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Pins descriptions + */ +extern const PinDescription g_APinDescription[]= +{ + // 0 .. 53 - Digital pins + // ---------------------- + // 0/1 - UART (Serial) + { PIOA, PIO_PA8A_URXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // URXD + { PIOA, PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // UTXD + + // 2 + { PIOB, PIO_PB25B_TIOA0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHA0 }, // TIOA0 + { PIOC, PIO_PC28B_TIOA7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA7 }, // TIOA7 + { PIOC, PIO_PC26B_TIOB6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB6 }, // TIOB6 + + // 5 + { PIOC, PIO_PC25B_TIOA6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA6 }, // TIOA6 + { PIOC, PIO_PC24B_PWML7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH7, NOT_ON_TIMER }, // PWML7 + { PIOC, PIO_PC23B_PWML6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH6, NOT_ON_TIMER }, // PWML6 + { PIOC, PIO_PC22B_PWML5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWML5 + { PIOC, PIO_PC21B_PWML4, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH4, NOT_ON_TIMER }, // PWML4 + // 10 + { PIOC, PIO_PC29B_TIOB7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB7 }, // TIOB7 + { PIOD, PIO_PD7B_TIOA8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA8 }, // TIOA8 + { PIOD, PIO_PD8B_TIOB8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB8 }, // TIOB8 + + // 13 - AMBER LED + { PIOB, PIO_PB27B_TIOB0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHB0 }, // TIOB0 + + // 14/15 - USART3 (Serial3) + { PIOD, PIO_PD4B_TXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD3 + { PIOD, PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD3 + + // 16/17 - USART1 (Serial2) + { PIOA, PIO_PA13A_TXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD1 + { PIOA, PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD1 + + // 18/19 - USART0 (Serial1) + { PIOA, PIO_PA11A_TXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD0 + { PIOA, PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD0 + + // 20/21 - TWI1 + { PIOB, PIO_PB12A_TWD1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD1 - SDA0 + { PIOB, PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK1 - SCL0 + + // 22 + { PIOB, PIO_PB26, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 22 + { PIOA, PIO_PA14, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 23 + { PIOA, PIO_PA15, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 24 + { PIOD, PIO_PD0, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 25 + + // 26 + { PIOD, PIO_PD1, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 26 + { PIOD, PIO_PD2, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 27 + { PIOD, PIO_PD3, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 28 + { PIOD, PIO_PD6, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 29 + + // 30 + { PIOD, PIO_PD9, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 30 + { PIOA, PIO_PA7, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 31 + { PIOD, PIO_PD10, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 32 + { PIOC, PIO_PC1, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 33 + + // 34 + { PIOC, PIO_PC2, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 34 + { PIOC, PIO_PC3, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 35 +//{ PIOC, PIO_PC3B_PWMH0, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH0, NOT_ON_TIMER }, // PWMH0 PIN 35 + { PIOC, PIO_PC4, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 36 + { PIOC, PIO_PC5, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 37 +//{ PIOC, PIO_PC5B_PWMH1, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH1, NOT_ON_TIMER }, // PWMH1 PIN 37 + + // 38 + { PIOC, PIO_PC6, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 38 + { PIOC, PIO_PC7, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 39 +//{ PIOC, PIO_PC7B_PWMH2, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH2, NOT_ON_TIMER }, // PWMH2 PIN 39 + { PIOC, PIO_PC8, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 40 +//{ PIOC, PIO_PC8B_PWML3, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH3, NOT_ON_TIMER }, // PWML3 PIN 40 + { PIOC, PIO_PC9, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 41 + + // 42 + { PIOA, PIO_PA19, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 42 + { PIOA, PIO_PA20, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 43 + { PIOC, PIO_PC19, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 44 +//{ PIOC, PIO_PC19B_PWMH5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWMH5 PIN 44 + { PIOC, PIO_PC18, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 45 + + // 46 + { PIOC, PIO_PC17, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 46 + { PIOC, PIO_PC16, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 47 + { PIOC, PIO_PC15, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 48 + { PIOC, PIO_PC14, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 49 + + // 50 + { PIOC, PIO_PC13, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 50 + { PIOC, PIO_PC12, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 51 + { PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52 + { PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53 + + + // 54 .. 65 - Analog pins + // ---------------------- + { PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0 + { PIOA, PIO_PA24X1_AD6, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC1, ADC6, NOT_ON_PWM, NOT_ON_TIMER }, // AD1 + { PIOA, PIO_PA23X1_AD5, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC2, ADC5, NOT_ON_PWM, NOT_ON_TIMER }, // AD2 + { PIOA, PIO_PA22X1_AD4, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC3, ADC4, NOT_ON_PWM, NOT_ON_TIMER }, // AD3 + // 58 +//{ PIOA, PIO_PA6X1_AD3, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // AD4 + { PIOA, PIO_PA6A_TIOB2, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_TIMER|PIN_ATTR_DIGITAL), ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // TIOB2 + { PIOA, PIO_PA4X1_AD2, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC5, ADC2, NOT_ON_PWM, NOT_ON_TIMER }, // AD5 + { PIOA, PIO_PA3X1_AD1, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC6, ADC1, NOT_ON_PWM, TC0_CHB1 }, // AD6 + { PIOA, PIO_PA2X1_AD0, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC7, ADC0, NOT_ON_PWM, TC0_CHA1 }, // AD7 + // 62 + { PIOB, PIO_PB17X1_AD10, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC8, ADC10, NOT_ON_PWM, NOT_ON_TIMER }, // AD8 + { PIOB, PIO_PB18X1_AD11, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC9, ADC11, NOT_ON_PWM, NOT_ON_TIMER }, // AD9 + { PIOB, PIO_PB19X1_AD12, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC10, ADC12, NOT_ON_PWM, NOT_ON_TIMER }, // AD10 + { PIOB, PIO_PB20X1_AD13, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC11, ADC13, NOT_ON_PWM, NOT_ON_TIMER }, // AD11 + + // 66/67 - DAC0/DAC1 + { PIOB, PIO_PB15X1_DAC0, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC12, DA0, NOT_ON_PWM, NOT_ON_TIMER }, // DAC0 + { PIOB, PIO_PB16X1_DAC1, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC13, DA1, NOT_ON_PWM, NOT_ON_TIMER }, // DAC1 + + // 68/69 - CANRX0/CANTX0 + { PIOA, PIO_PA1A_CANRX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC14, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX + { PIOA, PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC15, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX + + // 70/71 - TWI0 + { PIOA, PIO_PA17A_TWD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD0 - SDA1 + { PIOA, PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK0 - SCL1 + + // 72/73 - LEDs + { PIOC, PIO_PC30, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER RXL + { PIOA, PIO_PA21, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER TXL + + // 74/75/76 - SPI + { PIOA, PIO_PA25A_SPI0_MISO,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MISO + { PIOA, PIO_PA26A_SPI0_MOSI,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MOSI + { PIOA, PIO_PA27A_SPI0_SPCK,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // SPCK + + // 77 - SPI CS0 + { PIOA, PIO_PA28A_SPI0_NPCS0,ID_PIOA,PIO_PERIPH_A,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS0 + + // 78 - SPI CS3 (unconnected) + { PIOB, PIO_PB23B_SPI0_NPCS3,ID_PIOB,PIO_PERIPH_B,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS3 + + // 79 .. 84 - "All pins" masks + + // 79 - TWI0 all pins + { PIOA, PIO_PA17A_TWD0|PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 80 - TWI1 all pins + { PIOB, PIO_PB12A_TWD1|PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 81 - UART (Serial) all pins + { PIOA, PIO_PA8A_URXD|PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 82 - USART0 (Serial1) all pins + { PIOA, PIO_PA11A_TXD0|PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 83 - USART1 (Serial2) all pins + { PIOA, PIO_PA13A_TXD1|PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 84 - USART3 (Serial3) all pins + { PIOD, PIO_PD4B_TXD3|PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + + // 85 - USB +//{ PIOB, PIO_PB11A_UOTGID|PIO_PB10A_UOTGVBOF, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF + // 85 - PB11 only + { PIOB, PIO_PB11A_UOTGID, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF + + // 86 - SPI CS2 + { PIOB, PIO_PB21B_SPI0_NPCS2, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS2 + + // 87 - SPI CS1 + { PIOA, PIO_PA29A_SPI0_NPCS1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS1 + + // 88/89 - CANRX1/CANTX1 (same physical pin for 66/53) + { PIOB, PIO_PB15A_CANRX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX1 + { PIOB, PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX1 + + // 90 .. 91 - "All CAN pins" masks + // 90 - CAN0 all pins + { PIOA, PIO_PA1A_CANRX0|PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 91 - CAN1 all pins + { PIOB, PIO_PB15A_CANRX1|PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + + // 92 - Extra AMBIT Pins + { PIOC, PIO_PC11, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 92 + { PIOB, PIO_PB2, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 93 + { PIOB, PIO_PB1, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 94 + { PIOB, PIO_PB0, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 95 + { PIOC, PIO_PC10, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 96 + { PIOB, PIO_PB24, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 97 + { PIOB, PIO_PB7, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 98 + { PIOB, PIO_PB6, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 99 + { PIOB, PIO_PB8, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 100 + { PIOB, PIO_PB5, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 101 + { PIOB, PIO_PB4, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 102 + { PIOB, PIO_PB3, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 103 + { PIOC, PIO_PC20, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 104 + { PIOB, PIO_PB22, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 105 + { PIOC, PIO_PC27, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 106 + { PIOB, PIO_PB10B_A18, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 107 + { PIOB, PIO_PB9, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 108 + { PIOA, PIO_PA5, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 109 + + // END + { NULL, 0, 0, PIO_NOT_A_PIN, PIO_DEFAULT, 0, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER } +} ; + + +uint8_t g_pinStatus[PINS_COUNT] = {0}; + +#ifdef __cplusplus +} +#endif + +/* + * UART objects + */ +RingBuffer rx_buffer1; +RingBuffer tx_buffer1; + +UARTClass Serial(UART, UART_IRQn, ID_UART, &rx_buffer1, &tx_buffer1); +void serialEvent() __attribute__((weak)); +void serialEvent() { } + +// IT handlers +void UART_Handler(void) +{ + Serial.IrqHandler(); +} + +// ---------------------------------------------------------------------------- +/* + * USART objects + */ +RingBuffer rx_buffer2; +RingBuffer rx_buffer3; +RingBuffer rx_buffer4; +RingBuffer tx_buffer2; +RingBuffer tx_buffer3; +RingBuffer tx_buffer4; + +USARTClass Serial1(USART0, USART0_IRQn, ID_USART0, &rx_buffer2, &tx_buffer2); +void serialEvent1() __attribute__((weak)); +void serialEvent1() { } +USARTClass Serial2(USART1, USART1_IRQn, ID_USART1, &rx_buffer3, &tx_buffer3); +void serialEvent2() __attribute__((weak)); +void serialEvent2() { } +USARTClass Serial3(USART3, USART3_IRQn, ID_USART3, &rx_buffer4, &tx_buffer4); +void serialEvent3() __attribute__((weak)); +void serialEvent3() { } + +// IT handlers +void USART0_Handler(void) +{ + Serial1.IrqHandler(); +} + +void USART1_Handler(void) +{ + Serial2.IrqHandler(); +} + +void USART3_Handler(void) +{ + Serial3.IrqHandler(); +} + +// ---------------------------------------------------------------------------- + +void serialEventRun(void) +{ + if (Serial.available()) serialEvent(); + if (Serial1.available()) serialEvent1(); + if (Serial2.available()) serialEvent2(); + if (Serial3.available()) serialEvent3(); +} + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +void __libc_init_array(void); + +void init( void ) +{ + SystemInit(); + + // Set Systick to 1ms interval, common to all SAM3 variants + if (SysTick_Config(SystemCoreClock / 1000)) + { + // Capture error + while (true); + } + + // Initialize C library + __libc_init_array(); + + // Disable pull-up on every pin + for (unsigned i = 0; i < PINS_COUNT; i++) + digitalWrite(i, LOW); + + // Enable parallel access on PIO output data registers + PIOA->PIO_OWER = 0xFFFFFFFF; + PIOB->PIO_OWER = 0xFFFFFFFF; + PIOC->PIO_OWER = 0xFFFFFFFF; + PIOD->PIO_OWER = 0xFFFFFFFF; + + // Set USB Full Speed for Archim + udd_low_speed_disable(); + udd_high_speed_disable(); + + // Initialize Serial port U(S)ART pins + PIO_Configure( + g_APinDescription[PINS_UART].pPort, + g_APinDescription[PINS_UART].ulPinType, + g_APinDescription[PINS_UART].ulPin, + g_APinDescription[PINS_UART].ulPinConfiguration); + digitalWrite(0, HIGH); // Enable pullup for RX0 + PIO_Configure( + g_APinDescription[PINS_USART0].pPort, + g_APinDescription[PINS_USART0].ulPinType, + g_APinDescription[PINS_USART0].ulPin, + g_APinDescription[PINS_USART0].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_USART1].pPort, + g_APinDescription[PINS_USART1].ulPinType, + g_APinDescription[PINS_USART1].ulPin, + g_APinDescription[PINS_USART1].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_USART3].pPort, + g_APinDescription[PINS_USART3].ulPinType, + g_APinDescription[PINS_USART3].ulPin, + g_APinDescription[PINS_USART3].ulPinConfiguration); + + // Initialize USB pins + PIO_Configure( + g_APinDescription[PINS_USB].pPort, + g_APinDescription[PINS_USB].ulPinType, + g_APinDescription[PINS_USB].ulPin, + g_APinDescription[PINS_USB].ulPinConfiguration); + + // Initialize CAN pins + PIO_Configure( + g_APinDescription[PINS_CAN0].pPort, + g_APinDescription[PINS_CAN0].ulPinType, + g_APinDescription[PINS_CAN0].ulPin, + g_APinDescription[PINS_CAN0].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_CAN1].pPort, + g_APinDescription[PINS_CAN1].ulPinType, + g_APinDescription[PINS_CAN1].ulPin, + g_APinDescription[PINS_CAN1].ulPinConfiguration); + + // Initialize Analog Controller + pmc_enable_periph_clk(ID_ADC); + adc_init(ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP_FAST); + adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1); + adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger. + adc_disable_interrupt(ADC, 0xFFFFFFFF); // Disable all ADC interrupts. + adc_disable_all_channel(ADC); + + // Initialize analogOutput module + analogOutputInit(); +} + +#ifdef __cplusplus +} +#endif + diff --git a/buildroot/share/PlatformIO/variants/archim/variant.h b/buildroot/share/PlatformIO/variants/archim/variant.h new file mode 100644 index 0000000000..11f8f63bfb --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/variant.h @@ -0,0 +1,284 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_DUE_X_ +#define _VARIANT_ARDUINO_DUE_X_ + +/*---------------------------------------------------------------------------- + * Definitions + *----------------------------------------------------------------------------*/ + +/** Frequency of the board main oscillator */ +#define VARIANT_MAINOSC 12000000 + +/** Master clock frequency */ +#define VARIANT_MCK 84000000 + +/*---------------------------------------------------------------------------- + * Headers + *----------------------------------------------------------------------------*/ + +#include "Arduino.h" +#ifdef __cplusplus +#include "UARTClass.h" +#include "USARTClass.h" +#endif + +#ifdef __cplusplus +extern "C"{ +#endif // __cplusplus + +/** + * Libc porting layers + */ +#if defined ( __GNUC__ ) /* GCC CS3 */ +# include /** RedHat Newlib minimal stub */ +#endif + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +// Number of pins defined in PinDescription array +#define PINS_COUNT 79 +#define NUM_DIGITAL_PINS 66 +#define NUM_ANALOG_INPUTS 12 +#define analogInputToDigitalPin(p) ((p < 12) ? (p) + 54 : -1) + +#define digitalPinToPort(P) ( g_APinDescription[P].pPort ) +#define digitalPinToBitMask(P) ( g_APinDescription[P].ulPin ) +//#define analogInPinToBit(P) ( ) +#define portOutputRegister(port) ( &(port->PIO_ODSR) ) +#define portInputRegister(port) ( &(port->PIO_PDSR) ) +#define digitalPinHasPWM(P) ( g_APinDescription[P].ulPWMChannel != NOT_ON_PWM || g_APinDescription[P].ulTCChannel != NOT_ON_TIMER ) + +/* + * portModeRegister(..) should return a register to set pin mode + * INPUT or OUTPUT by setting the corresponding bit to 0 or 1. + * Unfortunately on SAM architecture the PIO_OSR register is + * read-only and can be set only through the enable/disable registers + * pair PIO_OER/PIO_ODR. + */ +// #define portModeRegister(port) ( &(port->PIO_OSR) ) + +/* + * digitalPinToTimer(..) is AVR-specific and is not defined for SAM + * architecture. If you need to check if a pin supports PWM you must + * use digitalPinHasPWM(..). + * + * https://github.com/arduino/Arduino/issues/1833 + */ +// #define digitalPinToTimer(P) + +// Interrupts +#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) + +// LEDs +#define PIN_LED_13 (13U) +#define PIN_LED_RXL (72U) +#define PIN_LED_TXL (73U) +#define PIN_LED PIN_LED_13 +#define PIN_LED2 PIN_LED_RXL +#define PIN_LED3 PIN_LED_TXL +#define LED_BUILTIN 13 + +/* + * SPI Interfaces + */ +#define SPI_INTERFACES_COUNT 1 + +#define SPI_INTERFACE SPI0 +#define SPI_INTERFACE_ID ID_SPI0 +#define SPI_CHANNELS_NUM 4 +#define PIN_SPI_SS0 (77U) +#define PIN_SPI_SS1 (87U) +#define PIN_SPI_SS2 (86U) +#define PIN_SPI_SS3 (78U) +#define PIN_SPI_MOSI (75U) +#define PIN_SPI_MISO (74U) +#define PIN_SPI_SCK (76U) +#define BOARD_SPI_SS0 (77U) //(10U) +#define BOARD_SPI_SS1 (4U) +#define BOARD_SPI_SS2 (52U) +#define BOARD_SPI_SS3 PIN_SPI_SS3 +#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3 + +#define BOARD_PIN_TO_SPI_PIN(x) \ + (x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \ + (x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \ + (x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 ))) +#define BOARD_PIN_TO_SPI_CHANNEL(x) \ + (x==BOARD_SPI_SS0 ? 0 : \ + (x==BOARD_SPI_SS1 ? 1 : \ + (x==BOARD_SPI_SS2 ? 2 : 3))) + +static const uint8_t SS = BOARD_SPI_SS0; +static const uint8_t SS1 = BOARD_SPI_SS1; +static const uint8_t SS2 = BOARD_SPI_SS2; +static const uint8_t SS3 = BOARD_SPI_SS3; +static const uint8_t MOSI = PIN_SPI_MOSI; +static const uint8_t MISO = PIN_SPI_MISO; +static const uint8_t SCK = PIN_SPI_SCK; + +/* + * Wire Interfaces + */ +#define WIRE_INTERFACES_COUNT 2 + +#define PIN_WIRE_SDA (20U) +#define PIN_WIRE_SCL (21U) +#define WIRE_INTERFACE TWI1 +#define WIRE_INTERFACE_ID ID_TWI1 +#define WIRE_ISR_HANDLER TWI1_Handler +#define WIRE_ISR_ID TWI1_IRQn + +#define PIN_WIRE1_SDA (70U) +#define PIN_WIRE1_SCL (71U) +#define WIRE1_INTERFACE TWI0 +#define WIRE1_INTERFACE_ID ID_TWI0 +#define WIRE1_ISR_HANDLER TWI0_Handler +#define WIRE1_ISR_ID TWI0_IRQn + +static const uint8_t SDA = PIN_WIRE_SDA; +static const uint8_t SCL = PIN_WIRE_SCL; +static const uint8_t SDA1 = PIN_WIRE1_SDA; +static const uint8_t SCL1 = PIN_WIRE1_SCL; + +/* + * UART/USART Interfaces + */ +// Serial +#define PINS_UART (81U) +// Serial1 +#define PINS_USART0 (82U) +// Serial2 +#define PINS_USART1 (83U) +// Serial3 +#define PINS_USART3 (84U) + +/* + * USB Interfaces + */ +#define PINS_USB (85U) + +/* + * Analog pins + */ +static const uint8_t A0 = 54; +static const uint8_t A1 = 55; +static const uint8_t A2 = 56; +static const uint8_t A3 = 57; +static const uint8_t A4 = 58; +static const uint8_t A5 = 59; +static const uint8_t A6 = 60; +static const uint8_t A7 = 61; +static const uint8_t A8 = 62; +static const uint8_t A9 = 63; +static const uint8_t A10 = 64; +static const uint8_t A11 = 65; +static const uint8_t DAC0 = 66; +static const uint8_t DAC1 = 67; +static const uint8_t CANRX = 68; +static const uint8_t CANTX = 69; +#define ADC_RESOLUTION 12 + +/* + * Complementary CAN pins + */ +static const uint8_t CAN1RX = 88; +static const uint8_t CAN1TX = 89; + +// CAN0 +#define PINS_CAN0 (90U) +// CAN1 +#define PINS_CAN1 (91U) + + +/* + * DACC + */ +#define DACC_INTERFACE DACC +#define DACC_INTERFACE_ID ID_DACC +#define DACC_RESOLUTION 12 +#define DACC_ISR_HANDLER DACC_Handler +#define DACC_ISR_ID DACC_IRQn + +/* + * PWM + */ +#define PWM_INTERFACE PWM +#define PWM_INTERFACE_ID ID_PWM +#define PWM_FREQUENCY 31000 +#define PWM_MAX_DUTY_CYCLE 255 +#define PWM_MIN_DUTY_CYCLE 0 +#define PWM_RESOLUTION 8 + +/* + * TC + */ +#define TC_INTERFACE TC0 +#define TC_INTERFACE_ID ID_TC0 +#define TC_FREQUENCY 100000 +#define TC_MAX_DUTY_CYCLE 255 +#define TC_MIN_DUTY_CYCLE 0 +#define TC_RESOLUTION 8 + +#ifdef __cplusplus +} +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + +extern UARTClass Serial; +extern USARTClass Serial1; +extern USARTClass Serial2; +extern USARTClass Serial3; + +#endif + +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_USBVIRTUAL SerialUSB +#define SERIAL_PORT_HARDWARE_OPEN Serial1 +#define SERIAL_PORT_HARDWARE_OPEN1 Serial2 +#define SERIAL_PORT_HARDWARE_OPEN2 Serial3 +#define SERIAL_PORT_HARDWARE Serial +#define SERIAL_PORT_HARDWARE1 Serial1 +#define SERIAL_PORT_HARDWARE2 Serial2 +#define SERIAL_PORT_HARDWARE3 Serial3 + +#endif /* _VARIANT_ARDUINO_DUE_X_ */ + diff --git a/buildroot/share/PlatformIO/variants/megaextendedpins/pins_arduino.h b/buildroot/share/PlatformIO/variants/megaextendedpins/pins_arduino.h new file mode 100644 index 0000000000..81f2ae3e19 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/megaextendedpins/pins_arduino.h @@ -0,0 +1,461 @@ +/* + pins_arduino.h - Pin definition functions for Arduino + Part of Arduino - http://www.arduino.cc/ + + Copyright (c) 2007 David A. Mellis + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General + Public License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place, Suite 330, + Boston, MA 02111-1307 USA +*/ + +#ifndef Pins_Arduino_h +#define Pins_Arduino_h + +#include + +#define NUM_DIGITAL_PINS 86 +#define NUM_ANALOG_INPUTS 16 +#define analogInputToDigitalPin(p) ((p < 16) ? (p) + 54 : -1) +#define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 13) || ((p) >= 44 && (p)<= 46)) + +#define PIN_SPI_SS (53) +#define PIN_SPI_MOSI (51) +#define PIN_SPI_MISO (50) +#define PIN_SPI_SCK (52) + +static const uint8_t SS = PIN_SPI_SS; +static const uint8_t MOSI = PIN_SPI_MOSI; +static const uint8_t MISO = PIN_SPI_MISO; +static const uint8_t SCK = PIN_SPI_SCK; + +#define PIN_WIRE_SDA (20) +#define PIN_WIRE_SCL (21) + +static const uint8_t SDA = PIN_WIRE_SDA; +static const uint8_t SCL = PIN_WIRE_SCL; + +#define LED_BUILTIN 13 + +#define PIN_A0 (54) +#define PIN_A1 (55) +#define PIN_A2 (56) +#define PIN_A3 (57) +#define PIN_A4 (58) +#define PIN_A5 (59) +#define PIN_A6 (60) +#define PIN_A7 (61) +#define PIN_A8 (62) +#define PIN_A9 (63) +#define PIN_A10 (64) +#define PIN_A11 (65) +#define PIN_A12 (66) +#define PIN_A13 (67) +#define PIN_A14 (68) +#define PIN_A15 (69) + +static const uint8_t A0 = PIN_A0; +static const uint8_t A1 = PIN_A1; +static const uint8_t A2 = PIN_A2; +static const uint8_t A3 = PIN_A3; +static const uint8_t A4 = PIN_A4; +static const uint8_t A5 = PIN_A5; +static const uint8_t A6 = PIN_A6; +static const uint8_t A7 = PIN_A7; +static const uint8_t A8 = PIN_A8; +static const uint8_t A9 = PIN_A9; +static const uint8_t A10 = PIN_A10; +static const uint8_t A11 = PIN_A11; +static const uint8_t A12 = PIN_A12; +static const uint8_t A13 = PIN_A13; +static const uint8_t A14 = PIN_A14; +static const uint8_t A15 = PIN_A15; + +// A majority of the pins are NOT PCINTs, SO BE WARNED (i.e. you cannot use them as receive pins) +// Only pins available for RECEIVE (TRANSMIT can be on any pin): +// (I've deliberately left out pin mapping to the Hardware USARTs - seems senseless to me) +// Pins: 10, 11, 12, 13, 50, 51, 52, 53, 62, 63, 64, 65, 66, 67, 68, 69 + +#define digitalPinToPCICR(p) ( (((p) >= 10) && ((p) <= 13)) || \ + (((p) >= 50) && ((p) <= 53)) || \ + (((p) >= 62) && ((p) <= 69)) ? (&PCICR) : ((uint8_t *)0) ) + +#define digitalPinToPCICRbit(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? 0 : \ + ( (((p) >= 62) && ((p) <= 69)) ? 2 : \ + 0 ) ) + +#define digitalPinToPCMSK(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? (&PCMSK0) : \ + ( (((p) >= 62) && ((p) <= 69)) ? (&PCMSK2) : \ + ((uint8_t *)0) ) ) + +#define digitalPinToPCMSKbit(p) ( (((p) >= 10) && ((p) <= 13)) ? ((p) - 6) : \ + ( ((p) == 50) ? 3 : \ + ( ((p) == 51) ? 2 : \ + ( ((p) == 52) ? 1 : \ + ( ((p) == 53) ? 0 : \ + ( (((p) >= 62) && ((p) <= 69)) ? ((p) - 62) : \ + 0 ) ) ) ) ) ) + +#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : ((p) >= 18 && (p) <= 21 ? 23 - (p) : NOT_AN_INTERRUPT))) + +#ifdef ARDUINO_MAIN + +const uint16_t PROGMEM port_to_mode_PGM[] = { + NOT_A_PORT, + (uint16_t) &DDRA, + (uint16_t) &DDRB, + (uint16_t) &DDRC, + (uint16_t) &DDRD, + (uint16_t) &DDRE, + (uint16_t) &DDRF, + (uint16_t) &DDRG, + (uint16_t) &DDRH, + NOT_A_PORT, + (uint16_t) &DDRJ, + (uint16_t) &DDRK, + (uint16_t) &DDRL, +}; + +const uint16_t PROGMEM port_to_output_PGM[] = { + NOT_A_PORT, + (uint16_t) &PORTA, + (uint16_t) &PORTB, + (uint16_t) &PORTC, + (uint16_t) &PORTD, + (uint16_t) &PORTE, + (uint16_t) &PORTF, + (uint16_t) &PORTG, + (uint16_t) &PORTH, + NOT_A_PORT, + (uint16_t) &PORTJ, + (uint16_t) &PORTK, + (uint16_t) &PORTL, +}; + +const uint16_t PROGMEM port_to_input_PGM[] = { + NOT_A_PIN, + (uint16_t) &PINA, + (uint16_t) &PINB, + (uint16_t) &PINC, + (uint16_t) &PIND, + (uint16_t) &PINE, + (uint16_t) &PINF, + (uint16_t) &PING, + (uint16_t) &PINH, + NOT_A_PIN, + (uint16_t) &PINJ, + (uint16_t) &PINK, + (uint16_t) &PINL, +}; + +const uint8_t PROGMEM digital_pin_to_port_PGM[] = { + // PORTLIST + // ------------------------------------------- + PE , // PE 0 ** 0 ** USART0_RX + PE , // PE 1 ** 1 ** USART0_TX + PE , // PE 4 ** 2 ** PWM2 + PE , // PE 5 ** 3 ** PWM3 + PG , // PG 5 ** 4 ** PWM4 + PE , // PE 3 ** 5 ** PWM5 + PH , // PH 3 ** 6 ** PWM6 + PH , // PH 4 ** 7 ** PWM7 + PH , // PH 5 ** 8 ** PWM8 + PH , // PH 6 ** 9 ** PWM9 + PB , // PB 4 ** 10 ** PWM10 + PB , // PB 5 ** 11 ** PWM11 + PB , // PB 6 ** 12 ** PWM12 + PB , // PB 7 ** 13 ** PWM13 + PJ , // PJ 1 ** 14 ** USART3_TX + PJ , // PJ 0 ** 15 ** USART3_RX + PH , // PH 1 ** 16 ** USART2_TX + PH , // PH 0 ** 17 ** USART2_RX + PD , // PD 3 ** 18 ** USART1_TX + PD , // PD 2 ** 19 ** USART1_RX + PD , // PD 1 ** 20 ** I2C_SDA + PD , // PD 0 ** 21 ** I2C_SCL + PA , // PA 0 ** 22 ** D22 + PA , // PA 1 ** 23 ** D23 + PA , // PA 2 ** 24 ** D24 + PA , // PA 3 ** 25 ** D25 + PA , // PA 4 ** 26 ** D26 + PA , // PA 5 ** 27 ** D27 + PA , // PA 6 ** 28 ** D28 + PA , // PA 7 ** 29 ** D29 + PC , // PC 7 ** 30 ** D30 + PC , // PC 6 ** 31 ** D31 + PC , // PC 5 ** 32 ** D32 + PC , // PC 4 ** 33 ** D33 + PC , // PC 3 ** 34 ** D34 + PC , // PC 2 ** 35 ** D35 + PC , // PC 1 ** 36 ** D36 + PC , // PC 0 ** 37 ** D37 + PD , // PD 7 ** 38 ** D38 + PG , // PG 2 ** 39 ** D39 + PG , // PG 1 ** 40 ** D40 + PG , // PG 0 ** 41 ** D41 + PL , // PL 7 ** 42 ** D42 + PL , // PL 6 ** 43 ** D43 + PL , // PL 5 ** 44 ** D44 + PL , // PL 4 ** 45 ** D45 + PL , // PL 3 ** 46 ** D46 + PL , // PL 2 ** 47 ** D47 + PL , // PL 1 ** 48 ** D48 + PL , // PL 0 ** 49 ** D49 + PB , // PB 3 ** 50 ** SPI_MISO + PB , // PB 2 ** 51 ** SPI_MOSI + PB , // PB 1 ** 52 ** SPI_SCK + PB , // PB 0 ** 53 ** SPI_SS + PF , // PF 0 ** 54 ** A0 + PF , // PF 1 ** 55 ** A1 + PF , // PF 2 ** 56 ** A2 + PF , // PF 3 ** 57 ** A3 + PF , // PF 4 ** 58 ** A4 + PF , // PF 5 ** 59 ** A5 + PF , // PF 6 ** 60 ** A6 + PF , // PF 7 ** 61 ** A7 + PK , // PK 0 ** 62 ** A8 + PK , // PK 1 ** 63 ** A9 + PK , // PK 2 ** 64 ** A10 + PK , // PK 3 ** 65 ** A11 + PK , // PK 4 ** 66 ** A12 + PK , // PK 5 ** 67 ** A13 + PK , // PK 6 ** 68 ** A14 + PK , // PK 7 ** 69 ** A15 + PG , // PG 4 ** 70 ** D70 + PG , // PG 3 ** 71 ** D71 + PJ , // PJ 2 ** 72 ** D72 + PJ , // PJ 3 ** 73 ** D73 + PJ , // PJ 7 ** 74 ** D74 + PJ , // PJ 4 ** 75 ** D75 + PJ , // PJ 5 ** 76 ** D76 + PJ , // PJ 6 ** 77 ** D77 + PE , // PE 2 ** 78 ** D78 + PE , // PE 6 ** 79 ** D79 + PE , // PE 7 ** 80 ** D80 + PD , // PD 4 ** 81 ** D81 + PD , // PD 5 ** 82 ** D82 + PD , // PD 6 ** 83 ** D83 + PH , // PH 2 ** 84 ** D84 + PH , // PH 7 ** 85 ** D85 +}; + +const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = { + // PIN IN PORT + // ------------------------------------------- + _BV( 0 ) , // PE 0 ** 0 ** USART0_RX + _BV( 1 ) , // PE 1 ** 1 ** USART0_TX + _BV( 4 ) , // PE 4 ** 2 ** PWM2 + _BV( 5 ) , // PE 5 ** 3 ** PWM3 + _BV( 5 ) , // PG 5 ** 4 ** PWM4 + _BV( 3 ) , // PE 3 ** 5 ** PWM5 + _BV( 3 ) , // PH 3 ** 6 ** PWM6 + _BV( 4 ) , // PH 4 ** 7 ** PWM7 + _BV( 5 ) , // PH 5 ** 8 ** PWM8 + _BV( 6 ) , // PH 6 ** 9 ** PWM9 + _BV( 4 ) , // PB 4 ** 10 ** PWM10 + _BV( 5 ) , // PB 5 ** 11 ** PWM11 + _BV( 6 ) , // PB 6 ** 12 ** PWM12 + _BV( 7 ) , // PB 7 ** 13 ** PWM13 + _BV( 1 ) , // PJ 1 ** 14 ** USART3_TX + _BV( 0 ) , // PJ 0 ** 15 ** USART3_RX + _BV( 1 ) , // PH 1 ** 16 ** USART2_TX + _BV( 0 ) , // PH 0 ** 17 ** USART2_RX + _BV( 3 ) , // PD 3 ** 18 ** USART1_TX + _BV( 2 ) , // PD 2 ** 19 ** USART1_RX + _BV( 1 ) , // PD 1 ** 20 ** I2C_SDA + _BV( 0 ) , // PD 0 ** 21 ** I2C_SCL + _BV( 0 ) , // PA 0 ** 22 ** D22 + _BV( 1 ) , // PA 1 ** 23 ** D23 + _BV( 2 ) , // PA 2 ** 24 ** D24 + _BV( 3 ) , // PA 3 ** 25 ** D25 + _BV( 4 ) , // PA 4 ** 26 ** D26 + _BV( 5 ) , // PA 5 ** 27 ** D27 + _BV( 6 ) , // PA 6 ** 28 ** D28 + _BV( 7 ) , // PA 7 ** 29 ** D29 + _BV( 7 ) , // PC 7 ** 30 ** D30 + _BV( 6 ) , // PC 6 ** 31 ** D31 + _BV( 5 ) , // PC 5 ** 32 ** D32 + _BV( 4 ) , // PC 4 ** 33 ** D33 + _BV( 3 ) , // PC 3 ** 34 ** D34 + _BV( 2 ) , // PC 2 ** 35 ** D35 + _BV( 1 ) , // PC 1 ** 36 ** D36 + _BV( 0 ) , // PC 0 ** 37 ** D37 + _BV( 7 ) , // PD 7 ** 38 ** D38 + _BV( 2 ) , // PG 2 ** 39 ** D39 + _BV( 1 ) , // PG 1 ** 40 ** D40 + _BV( 0 ) , // PG 0 ** 41 ** D41 + _BV( 7 ) , // PL 7 ** 42 ** D42 + _BV( 6 ) , // PL 6 ** 43 ** D43 + _BV( 5 ) , // PL 5 ** 44 ** D44 + _BV( 4 ) , // PL 4 ** 45 ** D45 + _BV( 3 ) , // PL 3 ** 46 ** D46 + _BV( 2 ) , // PL 2 ** 47 ** D47 + _BV( 1 ) , // PL 1 ** 48 ** D48 + _BV( 0 ) , // PL 0 ** 49 ** D49 + _BV( 3 ) , // PB 3 ** 50 ** SPI_MISO + _BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI + _BV( 1 ) , // PB 1 ** 52 ** SPI_SCK + _BV( 0 ) , // PB 0 ** 53 ** SPI_SS + _BV( 0 ) , // PF 0 ** 54 ** A0 + _BV( 1 ) , // PF 1 ** 55 ** A1 + _BV( 2 ) , // PF 2 ** 56 ** A2 + _BV( 3 ) , // PF 3 ** 57 ** A3 + _BV( 4 ) , // PF 4 ** 58 ** A4 + _BV( 5 ) , // PF 5 ** 59 ** A5 + _BV( 6 ) , // PF 6 ** 60 ** A6 + _BV( 7 ) , // PF 7 ** 61 ** A7 + _BV( 0 ) , // PK 0 ** 62 ** A8 + _BV( 1 ) , // PK 1 ** 63 ** A9 + _BV( 2 ) , // PK 2 ** 64 ** A10 + _BV( 3 ) , // PK 3 ** 65 ** A11 + _BV( 4 ) , // PK 4 ** 66 ** A12 + _BV( 5 ) , // PK 5 ** 67 ** A13 + _BV( 6 ) , // PK 6 ** 68 ** A14 + _BV( 7 ) , // PK 7 ** 69 ** A15 + _BV( 4 ) , // PG 4 ** 70 ** D70 + _BV( 3 ) , // PG 3 ** 71 ** D71 + _BV( 2 ) , // PJ 2 ** 72 ** D72 + _BV( 3 ) , // PJ 3 ** 73 ** D73 + _BV( 7 ) , // PJ 7 ** 74 ** D74 + _BV( 4 ) , // PJ 4 ** 75 ** D75 + _BV( 5 ) , // PJ 5 ** 76 ** D76 + _BV( 6 ) , // PJ 6 ** 77 ** D77 + _BV( 2 ) , // PE 2 ** 78 ** D78 + _BV( 6 ) , // PE 6 ** 79 ** D79 + _BV( 7 ) , // PE 7 ** 80 ** D80 + _BV( 4 ) , // PD 4 ** 81 ** D81 + _BV( 5 ) , // PD 5 ** 82 ** D82 + _BV( 6 ) , // PD 6 ** 83 ** D83 + _BV( 2 ) , // PH 2 ** 84 ** D84 + _BV( 7 ) , // PH 7 ** 85 ** D85 +}; + +const uint8_t PROGMEM digital_pin_to_timer_PGM[] = { + // TIMERS + // ------------------------------------------- + NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX + NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX + TIMER3B , // PE 4 ** 2 ** PWM2 + TIMER3C , // PE 5 ** 3 ** PWM3 + TIMER0B , // PG 5 ** 4 ** PWM4 + TIMER3A , // PE 3 ** 5 ** PWM5 + TIMER4A , // PH 3 ** 6 ** PWM6 + TIMER4B , // PH 4 ** 7 ** PWM7 + TIMER4C , // PH 5 ** 8 ** PWM8 + TIMER2B , // PH 6 ** 9 ** PWM9 + TIMER2A , // PB 4 ** 10 ** PWM10 + TIMER1A , // PB 5 ** 11 ** PWM11 + TIMER1B , // PB 6 ** 12 ** PWM12 + TIMER0A , // PB 7 ** 13 ** PWM13 + NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX + NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX + NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX + NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX + NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX + NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX + NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA + NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL + NOT_ON_TIMER , // PA 0 ** 22 ** D22 + NOT_ON_TIMER , // PA 1 ** 23 ** D23 + NOT_ON_TIMER , // PA 2 ** 24 ** D24 + NOT_ON_TIMER , // PA 3 ** 25 ** D25 + NOT_ON_TIMER , // PA 4 ** 26 ** D26 + NOT_ON_TIMER , // PA 5 ** 27 ** D27 + NOT_ON_TIMER , // PA 6 ** 28 ** D28 + NOT_ON_TIMER , // PA 7 ** 29 ** D29 + NOT_ON_TIMER , // PC 7 ** 30 ** D30 + NOT_ON_TIMER , // PC 6 ** 31 ** D31 + NOT_ON_TIMER , // PC 5 ** 32 ** D32 + NOT_ON_TIMER , // PC 4 ** 33 ** D33 + NOT_ON_TIMER , // PC 3 ** 34 ** D34 + NOT_ON_TIMER , // PC 2 ** 35 ** D35 + NOT_ON_TIMER , // PC 1 ** 36 ** D36 + NOT_ON_TIMER , // PC 0 ** 37 ** D37 + NOT_ON_TIMER , // PD 7 ** 38 ** D38 + NOT_ON_TIMER , // PG 2 ** 39 ** D39 + NOT_ON_TIMER , // PG 1 ** 40 ** D40 + NOT_ON_TIMER , // PG 0 ** 41 ** D41 + NOT_ON_TIMER , // PL 7 ** 42 ** D42 + NOT_ON_TIMER , // PL 6 ** 43 ** D43 + TIMER5C , // PL 5 ** 44 ** D44 + TIMER5B , // PL 4 ** 45 ** D45 + TIMER5A , // PL 3 ** 46 ** D46 + NOT_ON_TIMER , // PL 2 ** 47 ** D47 + NOT_ON_TIMER , // PL 1 ** 48 ** D48 + NOT_ON_TIMER , // PL 0 ** 49 ** D49 + NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO + NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI + NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK + NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS + NOT_ON_TIMER , // PF 0 ** 54 ** A0 + NOT_ON_TIMER , // PF 1 ** 55 ** A1 + NOT_ON_TIMER , // PF 2 ** 56 ** A2 + NOT_ON_TIMER , // PF 3 ** 57 ** A3 + NOT_ON_TIMER , // PF 4 ** 58 ** A4 + NOT_ON_TIMER , // PF 5 ** 59 ** A5 + NOT_ON_TIMER , // PF 6 ** 60 ** A6 + NOT_ON_TIMER , // PF 7 ** 61 ** A7 + NOT_ON_TIMER , // PK 0 ** 62 ** A8 + NOT_ON_TIMER , // PK 1 ** 63 ** A9 + NOT_ON_TIMER , // PK 2 ** 64 ** A10 + NOT_ON_TIMER , // PK 3 ** 65 ** A11 + NOT_ON_TIMER , // PK 4 ** 66 ** A12 + NOT_ON_TIMER , // PK 5 ** 67 ** A13 + NOT_ON_TIMER , // PK 6 ** 68 ** A14 + NOT_ON_TIMER , // PK 7 ** 69 ** A15 + NOT_ON_TIMER , // PG 4 ** 70 ** D70 + NOT_ON_TIMER , // PG 3 ** 71 ** D71 + NOT_ON_TIMER , // PJ 2 ** 72 ** D72 + NOT_ON_TIMER , // PJ 3 ** 73 ** D73 + NOT_ON_TIMER , // PJ 7 ** 74 ** D74 + NOT_ON_TIMER , // PJ 4 ** 75 ** D75 + NOT_ON_TIMER , // PJ 5 ** 76 ** D76 + NOT_ON_TIMER , // PJ 6 ** 77 ** D77 + NOT_ON_TIMER , // PE 2 ** 78 ** D78 + NOT_ON_TIMER , // PE 6 ** 79 ** D79 + NOT_ON_TIMER , // PE 7 ** 80 ** D80 + NOT_ON_TIMER , // PD 4 ** 81 ** D81 + NOT_ON_TIMER , // PD 5 ** 82 ** D82 + NOT_ON_TIMER , // PD 6 ** 83 ** D83 + NOT_ON_TIMER , // PH 2 ** 84 ** D84 + NOT_ON_TIMER , // PH 7 ** 85 ** D85 +}; + +#endif + +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_HARDWARE Serial +#define SERIAL_PORT_HARDWARE1 Serial1 +#define SERIAL_PORT_HARDWARE2 Serial2 +#define SERIAL_PORT_HARDWARE3 Serial3 +#define SERIAL_PORT_HARDWARE_OPEN Serial1 +#define SERIAL_PORT_HARDWARE_OPEN1 Serial2 +#define SERIAL_PORT_HARDWARE_OPEN2 Serial3 + +#endif diff --git a/buildroot/share/fonts/genallfont.sh b/buildroot/share/fonts/genallfont.sh index 66f8e2c84f..0a66990212 100755 --- a/buildroot/share/fonts/genallfont.sh +++ b/buildroot/share/fonts/genallfont.sh @@ -57,12 +57,12 @@ OLDWD=`pwd` # # Compile the 'genpages' command in-place # -(cd ${DN_EXEC}; gcc -o genpages genpages.c getline.c) +(cd ${DN_EXEC}; cc -o genpages genpages.c getline.c) # # By default loop through all languages # -LANGS_DEFAULT="an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana ko_KR nl pl pt pt_br ro ru sk tr uk vi zh_CN zh_TW test" +LANGS_DEFAULT="an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana ko_KR nl pl pt pt_br ro ru sk sv tr uk vi zh_CN zh_TW test" # # Generate data for language list MARLIN_LANGS or all if not provided diff --git a/buildroot/share/fonts/genpages.c b/buildroot/share/fonts/genpages.c index 2a87b19d47..c855ceac50 100644 --- a/buildroot/share/fonts/genpages.c +++ b/buildroot/share/fonts/genpages.c @@ -71,63 +71,49 @@ uint8_t* get_utf8_value(uint8_t *pstart, wchar_t *pval) { assert(NULL != pstart); + #define NEXT_6_BITS() do{ val <<= 6; p++; val |= (*p & 0x3F); }while(0) + if (0 == (0x80 & *p)) { val = (size_t)*p; p++; } else if (0xC0 == (0xE0 & *p)) { val = *p & 0x1F; - val <<= 6; - p++; - val |= (*p & 0x3F); + NEXT_6_BITS(); p++; assert((wchar_t)val == get_val_utf82uni(pstart)); } else if (0xE0 == (0xF0 & *p)) { val = *p & 0x0F; - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); + NEXT_6_BITS(); + NEXT_6_BITS(); p++; assert((wchar_t)val == get_val_utf82uni(pstart)); } else if (0xF0 == (0xF8 & *p)) { val = *p & 0x07; - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); p++; assert((wchar_t)val == get_val_utf82uni(pstart)); } else if (0xF8 == (0xFC & *p)) { val = *p & 0x03; - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); p++; assert((wchar_t)val == get_val_utf82uni(pstart)); } else if (0xFC == (0xFE & *p)) { val = *p & 0x01; - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); - val <<= 6; p++; - val |= (*p & 0x3F); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); + NEXT_6_BITS(); p++; assert((wchar_t)val == get_val_utf82uni(pstart)); } diff --git a/buildroot/share/fonts/marlin-6x9.bdf b/buildroot/share/fonts/marlin-6x9.bdf new file mode 100644 index 0000000000..0b26834710 --- /dev/null +++ b/buildroot/share/fonts/marlin-6x9.bdf @@ -0,0 +1,16606 @@ +STARTFONT 2.1 +FONT -Misc-Fixed-Medium-R-Normal--9-90-75-75-C-60-ISO10646-1 +SIZE 9 75 75 +FONTBOUNDINGBOX 6 9 0 -2 +COMMENT "Generated by fontforge, http://fontforge.sourceforge.net" +STARTPROPERTIES 24 +FONTNAME_REGISTRY "" +FOUNDRY "Misc" +FAMILY_NAME "Fixed" +WEIGHT_NAME "Medium" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 9 +POINT_SIZE 90 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "C" +AVERAGE_WIDTH 60 +CHARSET_REGISTRY "ISO10646" +CHARSET_ENCODING "1" +COPYRIGHT "Public domain font. Share and enjoy." +_XMBDFED_INFO "Edited with xmbdfed 4.5." +CAP_HEIGHT 6 +X_HEIGHT 4 +WEIGHT 10 +QUAD_WIDTH 6 +DEFAULT_CHAR 0 +FONT_DESCENT 2 +FONT_ASCENT 7 +ENDPROPERTIES +CHARS 1305 +STARTCHAR char0 +ENCODING 0 +SWIDTH 640 0 +DWIDTH 6 0 +BBX 4 6 1 0 +BITMAP +50 +80 +10 +80 +10 +A0 +ENDCHAR +STARTCHAR uni0001 +ENCODING 1 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 5 7 0 0 +BITMAP +40 +F0 +C8 +88 +98 +78 +10 +ENDCHAR +STARTCHAR uni0002 +ENCODING 2 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 5 7 0 0 +BITMAP +C0 +F8 +88 +88 +88 +88 +F8 +ENDCHAR +STARTCHAR uni0003 +ENCODING 3 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 5 5 0 1 +BITMAP +20 +30 +F8 +30 +20 +ENDCHAR +STARTCHAR uni0004 +ENCODING 4 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 5 7 0 0 +BITMAP +20 +70 +F8 +20 +20 +20 +E0 +ENDCHAR +STARTCHAR uni0005 +ENCODING 5 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 5 7 0 0 +BITMAP +20 +70 +A8 +B8 +88 +70 +20 +ENDCHAR +STARTCHAR uni0006 +ENCODING 6 +SWIDTH 1000 0 +DWIDTH 0 0 +BBX 6 5 0 0 +BITMAP +B0 +D8 +6C +D8 +B0 +ENDCHAR +STARTCHAR uni0007 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'BASE' branch from 'init-repo'. +# - Add Marlin config files, but reset all to defaults. +# - Commit this so changes will be clear in following commits. +# - Add changed Marlin config files and commit. +# +# manual - Manually import changes from the Marlin repo +# - Replace 'default' configs with those from the Marlin repo. +# - Wait for manual propagation to the rest of the configs. +# - Run init with the given 'source' and 'dest' +# + +REPOHOME="`dirname ~/Projects/Maker/Firmware/.`" +MARLINREPO="$REPOHOME/MarlinFirmware" +CONFIGREPO="$REPOHOME/Configurations" + +CEXA=config/examples +CDEF=config/default +BC=Configuration.h +AC=Configuration_adv.h + +COMMIT_STEPS=0 + +#cd "$CONFIGREPO" 2>/dev/null || { echo "Can't find Configurations repo!" ; exit 1; } + +ACTION=${1:-init} +IMPORT=${2:-"import-2.0.x"} +EXPORT=${3:-"bugfix-2.0.x"} + +echo -n "Doing grhh ... " ; grhh ; echo + +if [[ $ACTION == "manual" ]]; then + + # + # Copy the latest default configs from MarlinFirmware/Marlin + # or one of the import branches here, then use them to construct + # a 'BASE' branch with only defaults as a starting point. + # + + echo "- Updating '$IMPORT' from Marlin..." + + git checkout $IMPORT || exit + + # Reset from the latest complete state + #git reset --hard master + + cp "$MARLINREPO/Marlin/"Configuration*.h "$CDEF/" + #git add . && git commit -m "Changes from Marlin ($(date '+%Y-%m-%d %H:%M'))." + + echo "- Fix up the import branch and come back." + + read -p "- Ready to init [y/N] ?" INIT_YES + echo + + [[ $INIT_YES == 'Y' || $INIT_YES == 'y' ]] || { echo "Done." ; exit ; } + + ACTION='init' +fi + +if [[ $ACTION == "init" ]]; then + # + # Copy all configs from a source such as MarlinFirmware/Marlin + # or one of the import branches here, then use them to construct + # a 'BASE' branch with only defaults as a starting point. + # + + echo "- Initializing BASE branch..." + + # Use the import branch as the source + git checkout $IMPORT || exit + + # Copy to a temporary location + TEMP=$( mktemp -d ) ; cp -R config $TEMP + + # Make sure we're not on the 'BASE' branch... + git checkout master >/dev/null 2>&1 || exit + + # Create 'BASE' as a copy of 'init-repo' (README, LICENSE, etc.) + git branch -D BASE 2>/dev/null + git checkout init-repo -b BASE || exit + + # Copy all config files into place + echo "- Copying configs from Marlin..." + cp -R "$TEMP/config" . + + # Delete anything that's not a Configuration file + find config -type f \! -name "Configuration*" -exec rm "{}" \; + + # DEBUG: Commit the original config files for comparison + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Commit for comparison" >/dev/null + + # Init Cartesian configurations to default + echo "- Initializing configs to default state..." + + find "$CEXA" -name $BC ! -path */delta/* -print0 \ + | while read -d $'\0' F ; do cp "$CDEF/$BC" "$F" ; done + find "$CEXA" -name $AC ! -path */delta/* -print0 \ + | while read -d $'\0' F ; do cp "$CDEF/$AC" "$F" ; done + + # DEBUG: Commit the reset for review + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Reset Cartesian/SCARA configs..." >/dev/null + + # Create base Delta configurations + cp "$CDEF"/* "$CEXA/delta/generic" + + # DEBUG: Commit the reset for review + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Reset Generic Delta..." >/dev/null + + cp -R "$TEMP/$CEXA/delta/generic"/Conf* "$CEXA/delta/generic" + + # DEBUG: Commit Generic Delta changes for review + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Apply Generic Delta..." >/dev/null + + find "$CEXA/delta" -name $BC ! -path */generic/* -print0 \ + | while read -d $'\0' F ; do cp "$CEXA/delta/generic/$BC" "$F" ; done + find "$CEXA/delta" -name $AC ! -path */generic/* -print0 \ + | while read -d $'\0' F ; do cp "$CEXA/delta/generic/$AC" "$F" ; done + + # DEBUG: Commit the reset for review + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Reset Delta configs..." >/dev/null + + # SCARA configurations + find "$CEXA/SCARA" -name $BC \ + | while read -d $'\0' F ; do cp "$CDEF/$BC" "$F" ; done + find "$CEXA/SCARA" -name $AC \ + | while read -d $'\0' F ; do cp "$CDEF/$AC" "$F" ; done + + # DEBUG: Commit the reset for review or... + ((COMMIT_STEPS)) && git add . >/dev/null && git commit -m "Reset SCARA..." >/dev/null + + # Update the %VERSION% in the README.md file + SED=$(which gsed || which sed) + VERS=$( echo $EXPORT | $SED 's/release-//' ) + eval "${SED} -E -i~ -e 's/%VERSION%/$VERS/g' README.md" + rm -f README.md~ + + # NOT DEBUGGING: Commit the 'BASE', ready for customizations + ((COMMIT_STEPS)) || git add . >/dev/null && git commit --amend --no-edit >/dev/null + + # Create a new branch from 'BASE' for the final result + echo "- Creating '$EXPORT' branch for the result..." + git branch -D $EXPORT 2>/dev/null + git checkout -b $EXPORT || exit + + # Delete temporary branch + git branch -D BASE 2>/dev/null + + echo "- Applying example config customizations..." + cp -R "$TEMP/config" . + find config -type f \! -name "Configuration*" -exec rm "{}" \; + + echo "- Adding path labels to all configs..." + config-labels.py >/dev/null 2>&1 + + git add . >/dev/null && git commit -m "Examples Customizations" >/dev/null + + echo "- Copying extras from Marlin..." + cp -R "$TEMP/config" . + + # Apply labels again! + config-labels.py >/dev/null 2>&1 + + git add . >/dev/null && git commit -m "Examples Extras" >/dev/null + + rm -rf $TEMP + + git push -f --set-upstream upstream "$EXPORT" + +else + + echo "Usage: mfconfig init|manual|rebase" + +fi diff --git a/buildroot/share/git/mftest b/buildroot/share/git/mftest deleted file mode 100755 index cfb5dd05f3..0000000000 --- a/buildroot/share/git/mftest +++ /dev/null @@ -1,236 +0,0 @@ -#!/usr/bin/env bash -# -# mftest Select a test to apply and build -# mftest -b [#] Build the auto-detected environment -# mftest -u [#] Upload the auto-detected environment -# mftest [name] [index] [-y] Set config options and optionally build a test -# - -MFINFO=$(mfinfo) || exit 1 -[[ -d Marlin/src ]] || { echo "Please 'cd' up to repo root." ; exit 1 ; } - -TESTPATH=buildroot/tests - -STATE_FILE=$( echo ./.pio/.mftestrc ) -SED=$(which gsed || which sed) - -shopt -s extglob nocasematch - -# Matching patterns -ISNUM='^[0-9]+$' -ISCMD='^(restore|opt|exec|use|pins|env)_' -ISEXEC='^exec_' -ISCONT='\\ *$' - -# Get the environment and test number from the command -TESTENV=${1:-'-'} -CHOICE=${2:-0} -AUTOENV=0 - -# Allow shorthand for test name -case $TESTENV in - tree) pio run -d . -e include_tree ; exit 1 ;; - due) TESTENV='DUE' ;; - esp) TESTENV='esp32' ;; - lin*) TESTENV='linux_native' ;; - lpc?(8)) TESTENV='LPC1768' ;; - lpc9) TESTENV='LPC1769' ;; - m128) TESTENV='mega1280' ;; - m256) TESTENV='mega2560' ;; - mega) TESTENV='mega2560' ;; - stm) TESTENV='STM32F103RE' ;; - f1) TESTENV='STM32F103RE' ;; - f4) TESTENV='STM32F4' ;; - f7) TESTENV='STM32F7' ;; - s6) TESTENV='FYSETC_S6' ;; - teensy) TESTENV='teensy31' ;; - t31) TESTENV='teensy31' ;; - t32) TESTENV='teensy31' ;; - t35) TESTENV='teensy35' ;; - t36) TESTENV='teensy35' ;; - t40) TESTENV='teensy41' ;; - t41) TESTENV='teensy41' ;; - --h|--help) echo -e "$(basename $0) : Marlin Firmware test, build, and upload\n" - echo "Usage: $(basename $0) ................. Select env and test to apply / run" - echo " $(basename $0) [-y] env ........ Select a test for env to apply / run" - echo " $(basename $0) [-y] env test ... Apply / run the specified env test" - echo " $(basename $0) -b [variant] .... Auto-build the specified variant" - echo " $(basename $0) -u [variant] .... Auto-build and upload the specified variant" - echo - echo "env shortcuts: tree due esp lin lpc|lpc8 lpc9 m128 m256|mega stm|f1 f4 f7 s6 teensy|t31|t32 t35|t36 t40|t41" - exit - ;; - - # Build with the last-built env - -r) [[ -f "$STATE_FILE" ]] || { echo "No previous (-r) build state found." ; exit 1 ; } - read TESTENV <"$STATE_FILE" - pio run -d . -e $TESTENV - exit - ;; - - -[bu]) MB=$( grep -E "^\s*#define MOTHERBOARD" Marlin/Configuration.h | awk '{ print $3 }' | $SED 's/BOARD_//' ) - [[ -z $MB ]] && { echo "Error - Can't read MOTHERBOARD setting." ; exit 1 ; } - BLINE=$( grep -E "define\s+BOARD_$MB\b" Marlin/src/core/boards.h ) - BNUM=$( $SED -E 's/^.+BOARD_[^ ]+ +([0-9]+).+$/\1/' <<<"$BLINE" ) - BDESC=$( $SED -E 's/^.+\/\/ *(.+)$/\1/' <<<"$BLINE" ) - [[ -z $BNUM ]] && { echo "Error - Can't find $MB in boards list." ; exit 1 ; } - readarray -t ENVS <<< $( grep -EA1 "MB\(.*\b$MB\b.*\)" Marlin/src/pins/pins.h | grep -E '#include.+//.+env:.+' | grep -oE 'env:[^ ]+' | $SED -E 's/env://' ) - [[ -z $ENVS ]] && { echo "Error - Can't find target(s) for $MB ($BNUM)." ; exit 1 ; } - ECOUNT=${#ENVS[*]} - - if [[ $ECOUNT == 1 ]]; then - TARGET=$ENVS - else - if [[ $CHOICE == 0 ]]; then - # - # List env names and numbers. Get selection. - # - echo "Available targets for \"$BDESC\" | $MB ($BNUM):" - - IND=0 ; for ENV in "${ENVS[@]}"; do let IND++ ; echo " $IND) $ENV" ; done - - if [[ $ECOUNT > 1 ]]; then - for (( ; ; )) - do - read -p "Select a target for '$MB' (1-$ECOUNT) : " CHOICE - [[ -z "$CHOICE" ]] && { echo '(canceled)' ; exit 1 ; } - [[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= ECOUNT)) && break - echo ">>> Invalid environment choice '$CHOICE'." - done - echo - fi - else - echo "Detected \"$BDESC\" | $MB ($BNUM)." - [[ $CHOICE > $ECOUNT ]] && { echo "Environment selection out of range." ; exit 1 ; } - fi - TARGET="${ENVS[$CHOICE-1]}" - echo "Selected $TARGET" - fi - - echo "$TARGET" >"$STATE_FILE" - - if [[ $TESTENV == "-u" ]]; then - echo "Build/Uploading environment $TARGET for board $MB ($BNUM)..." ; echo - pio run -t upload -e $TARGET - else - echo "Building environment $TARGET for board $MB ($BNUM)..." ; echo - pio run -e $TARGET - fi - exit - ;; - - # The -y flag may come first - -y) TESTENV=${2:-'-'} ; CHOICE=${3:-0} ;; - - -[a-z]) echo "Unknown flag $TESTENV" ; exit 1 ;; - -) ;; -esac - -# -# List available tests and ask for selection -# - -if [[ $TESTENV == '-' ]]; then - IND=0 - NAMES=() - for FILE in $( ls -1 $TESTPATH/*-tests ) - do - let IND++ - TNAME=${FILE/-tests/} - TNAME=${TNAME/$TESTPATH\//} - NAMES+=($TNAME) - (( IND < 10 )) && echo -n " " - echo " $IND) $TNAME" - done - - echo - for (( ; ; )) - do - read -p "Select a test to apply (1-$IND) : " NAMEIND - [[ -z "$NAMEIND" ]] && { echo '(canceled)' ; exit 1 ; } - [[ $NAMEIND =~ $ISNUM ]] && ((NAMEIND >= 1 && NAMEIND <= IND)) && { TESTENV=${NAMES[$NAMEIND-1]} ; echo ; break ; } - echo "Invalid selection." - done -fi - -# Get the contents of the test file -OUT=$( cat $TESTPATH/$TESTENV-tests 2>/dev/null ) || { echo "Can't find test '$TESTENV'." ; exit 1 ; } - -# Count up the number of tests -TESTCOUNT=$( awk "/$ISEXEC/{a++}END{print a}" <<<"$OUT" ) - -# User entered a number? -(( CHOICE && CHOICE > TESTCOUNT )) && { echo "Invalid test selection '$CHOICE' (1-$TESTCOUNT)." ; exit 1 ; } - -if [[ $CHOICE == 0 ]]; then - # - # List test descriptions with numbers and get selection - # - echo "Available '$TESTENV' tests:" ; echo "$OUT" | { - IND=0 - while IFS= read -r LINE - do - if [[ $LINE =~ $ISEXEC ]]; then - DESC=$( "$SED" -E 's/^.+"(.*)".*$/\1/g' <<<"$LINE" ) - (( ++IND < 10 )) && echo -n " " - echo " $IND) $DESC" - fi - done - } - CHOICE=1 - if [[ $TESTCOUNT > 1 ]]; then - for (( ; ; )) - do - read -p "Select a '$TESTENV' test (1-$TESTCOUNT) : " CHOICE - [[ -z "$CHOICE" ]] && { echo '(canceled)' ; exit 1 ; } - [[ $CHOICE =~ $ISNUM ]] && ((CHOICE >= 1 && CHOICE <= TESTCOUNT)) && break - echo ">>> Invalid test selection '$CHOICE'." - done - fi -fi - -# -# Run the specified test lines -# -echo "$OUT" | { - IND=0 - GOTX=0 - CMD="" - while IFS= read -r LINE - do - if [[ $LINE =~ $ISCMD || $GOTX == 1 ]]; then - ((!IND)) && let IND++ - if [[ $LINE =~ $ISEXEC ]]; then - ((IND++ > CHOICE)) && break - else - ((!HEADER)) && { - HEADER=1 - echo -e "\n#\n# Test $TESTENV ($CHOICE) $DESC\n#" - } - ((IND == CHOICE)) && { - GOTX=1 - [[ $CMD == "" ]] && CMD="$LINE" || CMD=$( echo -e "$CMD$LINE" | $SED -e 's/\\//g' ) - [[ $LINE =~ $ISCONT ]] || { echo $CMD ; eval "$CMD" ; CMD="" ; } - } - fi - fi - done -} - -# Make clear it's a TEST -opt_set CUSTOM_MACHINE_NAME "\"$TESTENV-tests ($CHOICE)\"" - -# Get a -y parameter the lazy way -[[ "$2" == "-y" || "$3" == "-y" ]] && BUILD_YES='Y' - -# Build the test too? -if [[ $BUILD_YES != 'Y' ]]; then - echo - read -p "Build $TESTENV test #$CHOICE (y/N) ? " BUILD_YES -fi - -[[ $BUILD_YES == 'Y' || $BUILD_YES == 'Yes' ]] && { - pio run -d . -e $TESTENV - echo "$TESTENV" >"$STATE_FILE" -} diff --git a/buildroot/share/scripts/config-labels.py b/buildroot/share/scripts/config-labels.py index 267aa2d273..700604e452 100755 --- a/buildroot/share/scripts/config-labels.py +++ b/buildroot/share/scripts/config-labels.py @@ -22,8 +22,7 @@ # 2020-06-05 SRL style tweaks #----------------------------------- # -import sys -import os +import sys,os from pathlib import Path from distutils.dir_util import copy_tree # for copy_tree, because shutil.copytree can't handle existing files, dirs diff --git a/buildroot/share/scripts/createTemperatureLookupMarlin.py b/buildroot/share/scripts/createTemperatureLookupMarlin.py index b2d8964f55..b3343de1a0 100755 --- a/buildroot/share/scripts/createTemperatureLookupMarlin.py +++ b/buildroot/share/scripts/createTemperatureLookupMarlin.py @@ -22,8 +22,7 @@ from __future__ import print_function from __future__ import division from math import * -import sys -import getopt +import sys,getopt "Constants" ZERO = 273.15 # zero point of Kelvin scale diff --git a/buildroot/share/scripts/gen-tft-image.py b/buildroot/share/scripts/gen-tft-image.py new file mode 100644 index 0000000000..d89245fea4 --- /dev/null +++ b/buildroot/share/scripts/gen-tft-image.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python3 +# +# Marlin 3D Printer Firmware +# Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] +# +# Based on Sprinter and grbl. +# Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# + +# Generate Marlin TFT Images from bitmaps/PNG/JPG + +import sys,re,struct +from PIL import Image,ImageDraw + +def image2bin(image, output_file): + if output_file.endswith(('.c', '.cpp')): + f = open(output_file, 'wt') + is_cpp = True + f.write("const uint16_t image[%d] = {\n" % (image.size[1] * image.size[0])) + else: + f = open(output_file, 'wb') + is_cpp = False + pixs = image.load() + for y in range(image.size[1]): + for x in range(image.size[0]): + R = pixs[x, y][0] >> 3 + G = pixs[x, y][1] >> 2 + B = pixs[x, y][2] >> 3 + rgb = (R << 11) | (G << 5) | B + if is_cpp: + strHex = '0x{0:04X}, '.format(rgb) + f.write(strHex) + else: + f.write(struct.pack("B", (rgb & 0xFF))) + f.write(struct.pack("B", (rgb >> 8) & 0xFF)) + if is_cpp: + f.write("\n") + if is_cpp: + f.write("};\n") + f.close() + +if len(sys.argv) <= 2: + print("Utility to export a image in Marlin TFT friendly format.") + print("It will dump a raw bin RGB565 image or create a CPP file with an array of 16 bit image pixels.") + print("Usage: gen-tft-image.py INPUT_IMAGE.(png|bmp|jpg) OUTPUT_FILE.(cpp|bin)") + print("Author: rhapsodyv") + exit(1) + +output_img = sys.argv[2] +img = Image.open(sys.argv[1]) +image2bin(img, output_img) diff --git a/buildroot/share/sublime/MarlinFirmware.sublime-project b/buildroot/share/sublime/MarlinFirmware.sublime-project index 9b5234f7a1..e0cf953fa8 100644 --- a/buildroot/share/sublime/MarlinFirmware.sublime-project +++ b/buildroot/share/sublime/MarlinFirmware.sublime-project @@ -11,7 +11,7 @@ ".vscode" ], "binary_file_patterns": - [ "*.psd", "*.png", "*.jpg", "*.jpeg", "*.bdf", "*.patch", "avrdude_5.*", "*.svg" ], + [ "*.psd", "*.png", "*.jpg", "*.jpeg", "*.bdf", "*.patch", "avrdude_5.*", "*.svg", "*.bin", "*.woff" ], "file_exclude_patterns": [ "Marlin/platformio.ini", @@ -19,7 +19,8 @@ "Marlin/.gitignore", "Marlin/*/platformio.ini", "Marlin/*/.travis.yml", - "Marlin/*/.gitignore" + "Marlin/*/.gitignore", + "*.d" ], "path": "../../.." } diff --git a/buildroot/share/vscode/auto_build.py b/buildroot/share/vscode/auto_build.py index 5dd2d0d8a3..ac8432729f 100644 --- a/buildroot/share/vscode/auto_build.py +++ b/buildroot/share/vscode/auto_build.py @@ -72,13 +72,12 @@ from __future__ import print_function from __future__ import division -import sys -import os +import sys,os pwd = os.getcwd() # make sure we're executing from the correct directory level pwd = pwd.replace('\\', '/') -if 0 <= pwd.find('buildroot/share/atom'): - pwd = pwd[:pwd.find('buildroot/share/atom')] +if 0 <= pwd.find('buildroot/share/vscode'): + pwd = pwd[:pwd.find('buildroot/share/vscode')] os.chdir(pwd) print('pwd: ', pwd) diff --git a/buildroot/share/vscode/create_custom_upload_command_CDC.py b/buildroot/share/vscode/create_custom_upload_command_CDC.py index acfd1787fb..4662dd26cb 100644 --- a/buildroot/share/vscode/create_custom_upload_command_CDC.py +++ b/buildroot/share/vscode/create_custom_upload_command_CDC.py @@ -13,11 +13,9 @@ from __future__ import print_function from __future__ import division -import subprocess -import os -import sys +import subprocess,os,sys,platform from SCons.Script import DefaultEnvironment -import platform + current_OS = platform.system() env = DefaultEnvironment() @@ -92,9 +90,9 @@ else: get_com_port('COM', 'Hardware ID:', 13) # avrdude_conf_path = env.get("PIOHOME_DIR") + '\\packages\\toolchain-atmelavr\\etc\\avrdude.conf' - avrdude_conf_path = 'buildroot\\share\\atom\\avrdude.conf' + avrdude_conf_path = 'buildroot\\share\\vscode\\avrdude.conf' - avrdude_exe_path = 'buildroot\\share\\atom\\avrdude_5.10.exe' + avrdude_exe_path = 'buildroot\\share\\vscode\\avrdude_5.10.exe' # source_path = env.get("PROJECTBUILD_DIR") + '\\' + env.get("PIOENV") + '\\firmware.hex' source_path = '.pio\\build\\' + env.get("PIOENV") + '\\firmware.hex' diff --git a/buildroot/share/vscode/create_custom_upload_command_DFU.py b/buildroot/share/vscode/create_custom_upload_command_DFU.py index 9082699bf4..562e284e63 100644 --- a/buildroot/share/vscode/create_custom_upload_command_DFU.py +++ b/buildroot/share/vscode/create_custom_upload_command_DFU.py @@ -9,8 +9,7 @@ # Will continue on if a COM port isn't found so that the compilation can be done. # -import os -import sys +import os,sys from SCons.Script import DefaultEnvironment import platform current_OS = platform.system() diff --git a/buildroot/test-gcode/M808-loops.gcode b/buildroot/test-gcode/M808-loops.gcode new file mode 100644 index 0000000000..6248c9cc31 --- /dev/null +++ b/buildroot/test-gcode/M808-loops.gcode @@ -0,0 +1,16 @@ +; +; M808 Repeat Marker Test +; + +M808 L3 ; Marker at 54 + +M118 Outer Loop +M300 S220 P100 + +M808 L5 ; Marker at 111 + +M118 Inner Loop +M300 S110 P100 + +M808 +M808 diff --git a/buildroot/tests/ARMED-tests b/buildroot/tests/ARMED old mode 100644 new mode 100755 similarity index 80% rename from buildroot/tests/ARMED-tests rename to buildroot/tests/ARMED index e5959a4383..8764d47e84 --- a/buildroot/tests/ARMED-tests +++ b/buildroot/tests/ARMED @@ -11,9 +11,8 @@ set -e # restore_configs use_example_configs ArmEd -opt_set X_DRIVER_TYPE TMC2130 -opt_set Y_DRIVER_TYPE TMC2208 -exec_test $1 $2 "ArmEd Example Configuration with mixed TMC Drivers" +opt_set X_DRIVER_TYPE TMC2130 Y_DRIVER_TYPE TMC2208 +exec_test $1 $2 "ArmEd Example Configuration with mixed TMC Drivers" "$3" # clean up restore_configs diff --git a/buildroot/tests/BIGTREE_BTT002-tests b/buildroot/tests/BIGTREE_BTT002 old mode 100644 new mode 100755 similarity index 64% rename from buildroot/tests/BIGTREE_BTT002-tests rename to buildroot/tests/BIGTREE_BTT002 index 64e6322eca..ba13e3eafd --- a/buildroot/tests/BIGTREE_BTT002-tests +++ b/buildroot/tests/BIGTREE_BTT002 @@ -10,11 +10,11 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_BTT_BTT002_V1_0 -opt_set SERIAL_PORT 1 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2130 -exec_test $1 $2 "BigTreeTech BTT002 Default Configuration plus TMC steppers" +opt_set MOTHERBOARD BOARD_BTT_BTT002_V1_0 \ + SERIAL_PORT 1 \ + X_DRIVER_TYPE TMC2209 \ + Y_DRIVER_TYPE TMC2130 +exec_test $1 $2 "BigTreeTech BTT002 Default Configuration plus TMC steppers" "$3" # clean up restore_configs diff --git a/buildroot/tests/BIGTREE_GTR_V1_0 b/buildroot/tests/BIGTREE_GTR_V1_0 new file mode 100755 index 0000000000..95a1e0acac --- /dev/null +++ b/buildroot/tests/BIGTREE_GTR_V1_0 @@ -0,0 +1,30 @@ +#!/usr/bin/env bash +# +# Build tests for BigTreeTech GTR 1.0 +# + +# exit on first failure +set -e + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_GTR_V1_0 SERIAL_PORT -1 \ + EXTRUDERS 8 TEMP_SENSOR_1 1 TEMP_SENSOR_2 1 TEMP_SENSOR_3 1 TEMP_SENSOR_4 1 TEMP_SENSOR_5 1 TEMP_SENSOR_6 1 TEMP_SENSOR_7 1 +# Not necessary to enable auto-fan for all extruders to hit problematic code paths +opt_set E0_AUTO_FAN_PIN PC10 E1_AUTO_FAN_PIN PC11 E2_AUTO_FAN_PIN PC12 NEOPIXEL_PIN PF13 \ + X_DRIVER_TYPE TMC2208 Y_DRIVER_TYPE TMC2130 \ + FIL_RUNOUT_PIN 3 FIL_RUNOUT2_PIN 4 FIL_RUNOUT3_PIN 5 FIL_RUNOUT4_PIN 6 FIL_RUNOUT5_PIN 7 FIL_RUNOUT6_PIN 8 FIL_RUNOUT7_PIN 9 FIL_RUNOUT8_PIN 10 \ + FIL_RUNOUT4_STATE HIGH FIL_RUNOUT8_STATE HIGH +opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER BLTOUCH NEOPIXEL_LED Z_SAFE_HOMING NOZZLE_PARK_FEATURE ADVANCED_PAUSE_FEATURE \ + FILAMENT_RUNOUT_SENSOR FIL_RUNOUT4_PULLUP FIL_RUNOUT8_PULLUP +exec_test $1 $2 "BigTreeTech GTR | 8 Extruders | Auto-Fan | Mixed TMC Drivers | Runout Sensors w/ distinct states" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_GTR_V1_0 SERIAL_PORT -1 \ + EXTRUDERS 6 TEMP_SENSOR_1 1 TEMP_SENSOR_2 1 TEMP_SENSOR_3 1 TEMP_SENSOR_4 1 TEMP_SENSOR_5 1 \ + NUM_Z_STEPPER_DRIVERS 3 \ + DEFAULT_Kp_LIST '{ 22.2, 20.0, 21.0, 19.0, 18.0, 17.0 }' DEFAULT_Ki_LIST '{ 1.08 }' DEFAULT_Kd_LIST '{ 114.0, 112.0, 110.0, 108.0 }' +opt_enable TOOLCHANGE_FILAMENT_SWAP TOOLCHANGE_MIGRATION_FEATURE TOOLCHANGE_FS_INIT_BEFORE_SWAP TOOLCHANGE_FS_PRIME_FIRST_USED PID_PARAMS_PER_HOTEND +exec_test $1 $2 "BigTreeTech GTR | 6 Extruders | Triple Z" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/BIGTREE_GTR_V1_0-tests b/buildroot/tests/BIGTREE_GTR_V1_0-tests deleted file mode 100644 index e8d47562aa..0000000000 --- a/buildroot/tests/BIGTREE_GTR_V1_0-tests +++ /dev/null @@ -1,46 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for BigTreeTech GTR 1.0 -# - -# exit on first failure -set -e - -restore_configs -opt_set MOTHERBOARD BOARD_BTT_GTR_V1_0 -opt_set SERIAL_PORT -1 -opt_set EXTRUDERS 8 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_2 1 -opt_set TEMP_SENSOR_3 1 -opt_set TEMP_SENSOR_4 1 -opt_set TEMP_SENSOR_5 1 -opt_set TEMP_SENSOR_6 1 -opt_set TEMP_SENSOR_7 1 -# Not necessary to enable auto-fan for all extruders to hit problematic code paths -opt_set E0_AUTO_FAN_PIN PC10 -opt_set E1_AUTO_FAN_PIN PC11 -opt_set E2_AUTO_FAN_PIN PC12 -opt_set X_DRIVER_TYPE TMC2208 -opt_set Y_DRIVER_TYPE TMC2130 -opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER -exec_test $1 $2 "BigTreeTech GTR 8 Extruders with Auto-Fan and Mixed TMC Drivers" - -restore_configs -opt_set MOTHERBOARD BOARD_BTT_GTR_V1_0 -opt_set SERIAL_PORT -1 -opt_set EXTRUDERS 6 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_2 1 -opt_set TEMP_SENSOR_3 1 -opt_set TEMP_SENSOR_4 1 -opt_set TEMP_SENSOR_5 1 -opt_set NUM_Z_STEPPER_DRIVERS 3 -opt_set DEFAULT_Kp_LIST "{ 22.2, 20.0, 21.0, 19.0, 18.0, 17.0 }" -opt_set DEFAULT_Ki_LIST "{ 1.08 }" -opt_set DEFAULT_Kd_LIST "{ 114.0, 112.0, 110.0, 108.0 }" -opt_enable TOOLCHANGE_FILAMENT_SWAP TOOLCHANGE_MIGRATION_FEATURE TOOLCHANGE_FS_INIT_BEFORE_SWAP TOOLCHANGE_FS_PRIME_FIRST_USED PID_PARAMS_PER_HOTEND -exec_test $1 $2 "BigTreeTech GTR 6 Extruders Triple Z" - -# clean up -restore_configs diff --git a/buildroot/tests/BIGTREE_GTR_V1_0_usb_flash_drive b/buildroot/tests/BIGTREE_GTR_V1_0_usb_flash_drive new file mode 100755 index 0000000000..197ece5dfd --- /dev/null +++ b/buildroot/tests/BIGTREE_GTR_V1_0_usb_flash_drive @@ -0,0 +1,24 @@ +#!/usr/bin/env bash +# +# Build tests for BigTreeTech GTR 1.0 +# + +# exit on first failure +set -e + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_GTR_V1_0 SERIAL_PORT 3 \ + EXTRUDERS 8 TEMP_SENSOR_1 1 TEMP_SENSOR_2 1 TEMP_SENSOR_3 1 TEMP_SENSOR_4 1 TEMP_SENSOR_5 1 TEMP_SENSOR_6 1 TEMP_SENSOR_7 1 +opt_enable SDSUPPORT USB_FLASH_DRIVE_SUPPORT USE_OTG_USB_HOST \ + REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER BLTOUCH NEOPIXEL_LED Z_SAFE_HOMING \ + FILAMENT_RUNOUT_SENSOR NOZZLE_PARK_FEATURE ADVANCED_PAUSE_FEATURE +# Not necessary to enable auto-fan for all extruders to hit problematic code paths +opt_set E0_AUTO_FAN_PIN PC10 E1_AUTO_FAN_PIN PC11 E2_AUTO_FAN_PIN PC12 NEOPIXEL_PIN PF13 \ + X_DRIVER_TYPE TMC2208 Y_DRIVER_TYPE TMC2130 \ + FIL_RUNOUT_PIN 3 FIL_RUNOUT2_PIN 4 FIL_RUNOUT3_PIN 5 FIL_RUNOUT4_PIN 6 FIL_RUNOUT5_PIN 7 FIL_RUNOUT6_PIN 8 FIL_RUNOUT7_PIN 9 FIL_RUNOUT8_PIN 10 \ + FIL_RUNOUT4_STATE HIGH FIL_RUNOUT8_STATE HIGH +opt_enable FIL_RUNOUT4_PULLUP FIL_RUNOUT8_PULLUP +exec_test $1 $2 "GTT GTR | OTG USB Flash Drive | 8 Extruders | Auto-Fan | Mixed TMC Drivers | Runout Sensors (distinct)" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/BIGTREE_SKR_PRO b/buildroot/tests/BIGTREE_SKR_PRO new file mode 100755 index 0000000000..025d8cbce8 --- /dev/null +++ b/buildroot/tests/BIGTREE_SKR_PRO @@ -0,0 +1,33 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F407ZG BigTreeTech SKR Pro +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_PRO_V1_1 SERIAL_PORT 1 +exec_test $1 $2 "BigTreeTech SKR Pro | Default Configuration" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_PRO_V1_1 SERIAL_PORT -1 \ + EXTRUDERS 3 TEMP_SENSOR_1 1 TEMP_SENSOR_2 1 \ + E0_AUTO_FAN_PIN PC10 E1_AUTO_FAN_PIN PC11 E2_AUTO_FAN_PIN PC12 \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2130 +opt_enable BLTOUCH EEPROM_SETTINGS AUTO_BED_LEVELING_3POINT Z_SAFE_HOMING PINS_DEBUGGING +exec_test $1 $2 "BigTreeTech SKR Pro | 3 Extruders | Auto-Fan | BLTOUCH | Mixed TMC" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_PRO_V1_1 SERIAL_PORT -1 \ + CUTTER_POWER_UNIT PERCENT \ + SPINDLE_LASER_PWM_PIN HEATER_1_PIN SPINDLE_LASER_ENA_PIN HEATER_2_PIN \ + TEMP_SENSOR_COOLER 1000 TEMP_COOLER_PIN PD13 +opt_enable LASER_FEATURE REPRAP_DISCOUNT_SMART_CONTROLLER +exec_test $1 $2 "BigTreeTech SKR Pro | Laser (Percent) | Cooling | LCD" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/BIGTREE_SKR_PRO-tests b/buildroot/tests/BIGTREE_SKR_PRO-tests deleted file mode 100644 index 1295f5858c..0000000000 --- a/buildroot/tests/BIGTREE_SKR_PRO-tests +++ /dev/null @@ -1,32 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F407ZG BigTreeTech SKR Pro -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_PRO_V1_1 -opt_set SERIAL_PORT 1 -exec_test $1 $2 "BigTreeTech SKR Pro Default Configuration" - -restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_PRO_V1_1 -opt_set SERIAL_PORT -1 -opt_set EXTRUDERS 3 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_2 1 -opt_set E0_AUTO_FAN_PIN PC10 -opt_set E1_AUTO_FAN_PIN PC11 -opt_set E2_AUTO_FAN_PIN PC12 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2130 -opt_enable BLTOUCH EEPROM_SETTINGS AUTO_BED_LEVELING_3POINT Z_SAFE_HOMING -exec_test $1 $2 "BigTreeTech SKR Pro 3 Extruders, Auto-Fan, BLTOUCH, mixed TMC drivers" - -# clean up -restore_configs diff --git a/buildroot/tests/DUE-tests b/buildroot/tests/DUE similarity index 67% rename from buildroot/tests/DUE-tests rename to buildroot/tests/DUE index 7f488f6126..d1601edf5a 100755 --- a/buildroot/tests/DUE-tests +++ b/buildroot/tests/DUE @@ -7,17 +7,18 @@ set -e restore_configs -opt_set LCD_LANGUAGE bg -opt_set MOTHERBOARD BOARD_RAMPS4DUE_EFB -opt_set TEMP_SENSOR_0 -2 -opt_set TEMP_SENSOR_BED 2 -opt_set GRID_MAX_POINTS_X 16 -opt_set FANMUX0_PIN 53 +opt_set MOTHERBOARD BOARD_RAMPS4DUE_EFB \ + LCD_LANGUAGE bg \ + TEMP_SENSOR_0 -2 TEMP_SENSOR_BED 2 \ + GRID_MAX_POINTS_X 16 \ + E0_AUTO_FAN_PIN 8 FANMUX0_PIN 53 EXTRUDER_AUTO_FAN_SPEED 100 \ + TEMP_SENSOR_CHAMBER 3 TEMP_CHAMBER_PIN 6 HEATER_CHAMBER_PIN 45 opt_enable S_CURVE_ACCELERATION EEPROM_SETTINGS GCODE_MACROS \ - FIX_MOUNTED_PROBE Z_SAFE_HOMING CODEPENDENT_XY_HOMING ASSISTED_TRAMMING \ + FIX_MOUNTED_PROBE Z_SAFE_HOMING CODEPENDENT_XY_HOMING \ + ASSISTED_TRAMMING ASSISTED_TRAMMING_WIZARD REPORT_TRAMMING_MM ASSISTED_TRAMMING_WAIT_POSITION \ EEPROM_SETTINGS SDSUPPORT BINARY_FILE_TRANSFER \ BLINKM PCA9533 PCA9632 RGB_LED RGB_LED_R_PIN RGB_LED_G_PIN RGB_LED_B_PIN LED_CONTROL_MENU \ - NEOPIXEL_LED CASE_LIGHT_ENABLE CASE_LIGHT_USE_NEOPIXEL CASE_LIGHT_MENU \ + NEOPIXEL_LED CASE_LIGHT_ENABLE CASE_LIGHT_USE_NEOPIXEL CASE_LIGHT_USE_RGB_LED CASE_LIGHT_MENU \ NOZZLE_PARK_FEATURE ADVANCED_PAUSE_FEATURE FILAMENT_RUNOUT_DISTANCE_MM FILAMENT_RUNOUT_SENSOR \ AUTO_BED_LEVELING_BILINEAR Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ SKEW_CORRECTION SKEW_CORRECTION_FOR_Z SKEW_CORRECTION_GCODE CALIBRATION_GCODE \ @@ -27,36 +28,25 @@ opt_enable S_CURVE_ACCELERATION EEPROM_SETTINGS GCODE_MACROS \ PIDTEMPBED SLOW_PWM_HEATERS THERMAL_PROTECTION_CHAMBER \ PINS_DEBUGGING MAX7219_DEBUG M114_DETAIL \ EXTENSIBLE_UI -opt_add EXTUI_EXAMPLE -opt_set E0_AUTO_FAN_PIN 8 -opt_set EXTRUDER_AUTO_FAN_SPEED 100 -opt_set TEMP_SENSOR_CHAMBER 3 -opt_add TEMP_CHAMBER_PIN 6 -opt_set HEATER_CHAMBER_PIN 45 -exec_test $1 $2 "RAMPS4DUE_EFB with ABL (Bilinear), ExtUI, S-Curve, many options." +opt_add EXTUI_EXAMPLE +exec_test $1 $2 "RAMPS4DUE_EFB with ABL (Bilinear), ExtUI, S-Curve, many options." "$3" +# +# RADDS with BLTouch, ABL(B), 3 x Z auto-align +# restore_configs -opt_set MOTHERBOARD BOARD_RADDS +opt_set MOTHERBOARD BOARD_RADDS NUM_Z_STEPPER_DRIVERS 3 opt_enable USE_XMAX_PLUG USE_YMAX_PLUG ENDSTOPPULLUPS BLTOUCH AUTO_BED_LEVELING_BILINEAR \ - Z_MULTI_ENDSTOPS Z_STEPPER_AUTO_ALIGN Z_STEPPER_ALIGN_KNOWN_STEPPER_POSITIONS \ - Z_SAFE_HOMING + Z_STEPPER_AUTO_ALIGN Z_STEPPER_ALIGN_KNOWN_STEPPER_POSITIONS Z_SAFE_HOMING #TOUCH_UI_FTDI_EVE LCD_ALEPHOBJECTS_CLCD_UI OTHER_PIN_LAYOUT -opt_set NUM_Z_STEPPER_DRIVERS 3 -opt_add Z2_MAX_ENDSTOP_INVERTING false -opt_add Z3_MAX_ENDSTOP_INVERTING false -opt_add Z2_MAX_PIN 2 -opt_add Z3_MAX_PIN 3 pins_set ramps/RAMPS X_MAX_PIN -1 pins_set ramps/RAMPS Y_MAX_PIN -1 -exec_test $1 $2 "RADDS with ABL (Bilinear), Triple Z Axis, Z_STEPPER_AUTO_ALIGN" +exec_test $1 $2 "RADDS with ABL (Bilinear), Triple Z Axis, Z_STEPPER_AUTO_ALIGN" "$3" # # Test SWITCHING_EXTRUDER # restore_configs -opt_set LCD_LANGUAGE fi -opt_set MOTHERBOARD BOARD_RAMPS4DUE_EEF -opt_set EXTRUDERS 2 -opt_set NUM_SERVOS 1 +opt_set MOTHERBOARD BOARD_RAMPS4DUE_EEF LCD_LANGUAGE fi EXTRUDERS 2 NUM_SERVOS 1 opt_enable SWITCHING_EXTRUDER ULTIMAKERCONTROLLER BEEP_ON_FEEDRATE_CHANGE POWER_LOSS_RECOVERY -exec_test $1 $2 "RAMPS4DUE_EEF with SWITCHING_EXTRUDER, POWER_LOSS_RECOVERY" +exec_test $1 $2 "RAMPS4DUE_EEF with SWITCHING_EXTRUDER, POWER_LOSS_RECOVERY" "$3" diff --git a/buildroot/tests/DUE_archim b/buildroot/tests/DUE_archim new file mode 100755 index 0000000000..f1711a8f3d --- /dev/null +++ b/buildroot/tests/DUE_archim @@ -0,0 +1,21 @@ +#!/usr/bin/env bash +# +# Build tests for DUE (Atmel SAM3X8E ARM Cortex-M3) +# + +# exit on first failure +set -e + +# +# Test Archim 1 +# +use_example_configs UltiMachine/Archim1 +exec_test $1 $2 "Archim 1 base configuration" "$3" + +# +# Test Archim 2 +# +use_example_configs UltiMachine/Archim2 +exec_test $1 $2 "Archim 2 base configuration" "$3" + +restore_configs diff --git a/buildroot/tests/FLYF407ZG-tests b/buildroot/tests/FLYF407ZG old mode 100644 new mode 100755 similarity index 63% rename from buildroot/tests/FLYF407ZG-tests rename to buildroot/tests/FLYF407ZG index f1a65da6cb..22dd3488c8 --- a/buildroot/tests/FLYF407ZG-tests +++ b/buildroot/tests/FLYF407ZG @@ -8,11 +8,8 @@ set -e # Build examples restore_configs -opt_set MOTHERBOARD BOARD_FLYF407ZG -opt_set SERIAL_PORT -1 -opt_set X_DRIVER_TYPE TMC2208 -opt_set Y_DRIVER_TYPE TMC2130 -exec_test $1 $2 "FLYF407ZG Default Config with mixed TMC Drivers" +opt_set MOTHERBOARD BOARD_FLYF407ZG SERIAL_PORT -1 X_DRIVER_TYPE TMC2208 Y_DRIVER_TYPE TMC2130 +exec_test $1 $2 "FLYF407ZG Default Config with mixed TMC Drivers" "$3" # cleanup restore_configs diff --git a/buildroot/tests/FYSETC_F6 b/buildroot/tests/FYSETC_F6 new file mode 100755 index 0000000000..3fe59d59a1 --- /dev/null +++ b/buildroot/tests/FYSETC_F6 @@ -0,0 +1,67 @@ +#!/usr/bin/env bash +# +# Build tests for AVR ATmega FYSETC F6 1.3 +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_FYSETC_F6_13 +opt_enable DGUS_LCD_UI_FYSETC +exec_test $1 $2 "FYSETC F6 1.3 with DGUS" "$3" + +# +# Delta Config (generic) + UBL + ALLEN_KEY + EEPROM_SETTINGS + OLED_PANEL_TINYBOY2 +# +use_example_configs delta/generic +opt_set MOTHERBOARD BOARD_FYSETC_F6_13 \ + LCD_LANGUAGE ko_KR \ + X_DRIVER_TYPE L6470 Y_DRIVER_TYPE L6470 Z_DRIVER_TYPE L6470 \ + L6470_CHAIN_SCK_PIN 53 L6470_CHAIN_MISO_PIN 49 L6470_CHAIN_MOSI_PIN 40 L6470_CHAIN_SS_PIN 42 \ + 'ENABLE_RESET_L64XX_CHIPS(V)' NOOP +opt_enable RESTORE_LEVELING_AFTER_G28 EEPROM_SETTINGS EEPROM_CHITCHAT \ + Z_PROBE_ALLEN_KEY AUTO_BED_LEVELING_UBL \ + OLED_PANEL_TINYBOY2 MESH_EDIT_GFX_OVERLAY DELTA_CALIBRATION_MENU +exec_test $1 $2 "DELTA, RAMPS, L6470, UBL, Allen Key, EEPROM, OLED_PANEL_TINYBOY2..." "$3" + +# +# Test mixed TMC config +# +restore_configs +opt_set MOTHERBOARD BOARD_FYSETC_F6_13 \ + LCD_LANGUAGE vi LCD_LANGUAGE_2 fr \ + X_DRIVER_TYPE TMC2160 Y_DRIVER_TYPE TMC5160 Z_DRIVER_TYPE TMC2208_STANDALONE E0_DRIVER_TYPE TMC2130 \ + X_MIN_ENDSTOP_INVERTING true Y_MIN_ENDSTOP_INVERTING true +opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER \ + MARLIN_BRICKOUT MARLIN_INVADERS MARLIN_SNAKE \ + MONITOR_DRIVER_STATUS STEALTHCHOP_XY STEALTHCHOP_Z STEALTHCHOP_E HYBRID_THRESHOLD \ + USE_ZMIN_PLUG SENSORLESS_HOMING TMC_DEBUG M114_DETAIL +exec_test $1 $2 "RAMPS | Mixed TMC | Sensorless | RRDFGSC | Games" "$3" + +# +# Delta Config (FLSUN AC because it's complex) +# +use_example_configs delta/FLSUN/auto_calibrate +opt_set MOTHERBOARD BOARD_FYSETC_F6_13 +exec_test $1 $2 "RAMPS 1.3 | DELTA | FLSUN AC Config" "$3" + +# +# SCARA with Mixed TMC +# +use_example_configs SCARA/Morgan +opt_set MOTHERBOARD BOARD_FYSETC_F6_13 \ + LCD_LANGUAGE es \ + X_MAX_ENDSTOP_INVERTING false \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2130 Z_DRIVER_TYPE TMC2130_STANDALONE E0_DRIVER_TYPE TMC2660 \ + X_HARDWARE_SERIAL Serial2 +opt_enable USE_ZMIN_PLUG FIX_MOUNTED_PROBE AUTO_BED_LEVELING_BILINEAR PAUSE_BEFORE_DEPLOY_STOW \ + FYSETC_242_OLED_12864 EEPROM_SETTINGS EEPROM_CHITCHAT M114_DETAIL Z_SAFE_HOMING \ + STEALTHCHOP_XY STEALTHCHOP_Z STEALTHCHOP_E HYBRID_THRESHOLD SENSORLESS_HOMING SQUARE_WAVE_STEPPING +exec_test $1 $2 "FYSETC_F6 | SCARA | Mixed TMC | EEPROM" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/FYSETC_F6_13-tests b/buildroot/tests/FYSETC_F6_13-tests deleted file mode 100644 index 631a117785..0000000000 --- a/buildroot/tests/FYSETC_F6_13-tests +++ /dev/null @@ -1,18 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for AVR ATmega FYSETC F6 1.3 -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_FYSETC_F6_13 -opt_enable DGUS_LCD_UI_FYSETC -exec_test $1 $2 "FYSETC F6 1.3 with DGUS" - -# clean up -restore_configs diff --git a/buildroot/tests/FYSETC_S6-tests b/buildroot/tests/FYSETC_S6 old mode 100644 new mode 100755 similarity index 57% rename from buildroot/tests/FYSETC_S6-tests rename to buildroot/tests/FYSETC_S6 index c75629156b..4794e11354 --- a/buildroot/tests/FYSETC_S6-tests +++ b/buildroot/tests/FYSETC_S6 @@ -9,9 +9,9 @@ set -e # Build examples restore_configs use_example_configs FYSETC/S6 -opt_set Y_DRIVER_TYPE TMC2209 -opt_set Z_DRIVER_TYPE TMC2130 -exec_test $1 $2 "FYSETC S6 Example" +opt_enable MEATPACK_ON_SERIAL_PORT_1 +opt_set Y_DRIVER_TYPE TMC2209 Z_DRIVER_TYPE TMC2130 +exec_test $1 $2 "FYSETC S6 Example" "$3" # cleanup restore_configs diff --git a/buildroot/tests/LERDGEX-tests b/buildroot/tests/LERDGEX old mode 100644 new mode 100755 similarity index 62% rename from buildroot/tests/LERDGEX-tests rename to buildroot/tests/LERDGEX index c2d72e0d77..cf7dfebfea --- a/buildroot/tests/LERDGEX-tests +++ b/buildroot/tests/LERDGEX @@ -10,9 +10,8 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_LERDGE_X -opt_set SERIAL_PORT 1 -exec_test $1 $2 "LERDGE X with Default Configuration" +opt_set MOTHERBOARD BOARD_LERDGE_X SERIAL_PORT 1 +exec_test $1 $2 "LERDGE X with Default Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/LPC1768-tests b/buildroot/tests/LPC1768 similarity index 52% rename from buildroot/tests/LPC1768-tests rename to buildroot/tests/LPC1768 index 2f206f02f2..a6829e85ea 100755 --- a/buildroot/tests/LPC1768-tests +++ b/buildroot/tests/LPC1768 @@ -11,43 +11,40 @@ set -e # #restore_configs #opt_set MOTHERBOARD BOARD_RAMPS_14_RE_ARM_EFB -#exec_test $1 $2 "Default Configuration" +#exec_test $1 $2 "Default Configuration" "$3" restore_configs -opt_set MOTHERBOARD BOARD_RAMPS_14_RE_ARM_EFB +opt_set MOTHERBOARD BOARD_RAMPS_14_RE_ARM_EFB NEOPIXEL_PIN P1_16 opt_enable VIKI2 SDSUPPORT SDCARD_READONLY SERIAL_PORT_2 NEOPIXEL_LED -opt_set NEOPIXEL_PIN P1_16 -exec_test $1 $2 "ReARM EFB VIKI2, SDSUPPORT, 2 Serial ports (USB CDC + UART0), NeoPixel" +exec_test $1 $2 "ReARM EFB VIKI2, SDSUPPORT, 2 Serial ports (USB CDC + UART0), NeoPixel" "$3" #restore_configs #use_example_configs Mks/Sbase -#exec_test $1 $2 "MKS SBASE Example Config" +#exec_test $1 $2 "MKS SBASE Example Config" "$3" restore_configs -opt_set MOTHERBOARD BOARD_MKS_SBASE -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 1 -opt_set NUM_SERVOS 2 -opt_set SERVO_DELAY "{ 300, 300 }" +opt_set MOTHERBOARD BOARD_MKS_SBASE \ + EXTRUDERS 2 TEMP_SENSOR_1 1 \ + NUM_SERVOS 2 SERVO_DELAY '{ 300, 300 }' opt_enable SWITCHING_NOZZLE SWITCHING_NOZZLE_E1_SERVO_NR ULTIMAKERCONTROLLER -exec_test $1 $2 "MKS SBASE with SWITCHING_NOZZLE" +exec_test $1 $2 "MKS SBASE with SWITCHING_NOZZLE" "$3" restore_configs -opt_set MOTHERBOARD BOARD_RAMPS_14_RE_ARM_EEB -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 -1 -opt_set TEMP_SENSOR_BED 5 -opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER SDSUPPORT ADAPTIVE_FAN_SLOWING NO_FAN_SLOWING_IN_PID_TUNING \ - FILAMENT_WIDTH_SENSOR FILAMENT_LCD_DISPLAY PID_EXTRUSION_SCALING \ - NOZZLE_AS_PROBE AUTO_BED_LEVELING_BILINEAR G29_RETRY_AND_RECOVER Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ +opt_set MOTHERBOARD BOARD_RAMPS_14_RE_ARM_EEB \ + EXTRUDERS 2 TEMP_SENSOR_1 -1 TEMP_SENSOR_BED 5 \ + GRID_MAX_POINTS_X 16 \ + NOZZLE_TO_PROBE_OFFSET '{ 0, 0, 0 }' \ + NOZZLE_CLEAN_MIN_TEMP 170 +opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER ADAPTIVE_FAN_SLOWING NO_FAN_SLOWING_IN_PID_TUNING \ + FILAMENT_WIDTH_SENSOR FILAMENT_LCD_DISPLAY PID_EXTRUSION_SCALING SOUND_MENU_ITEM \ + NOZZLE_AS_PROBE AUTO_BED_LEVELING_BILINEAR PREHEAT_BEFORE_LEVELING G29_RETRY_AND_RECOVER Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET BABYSTEP_ZPROBE_GFX_OVERLAY \ PRINTCOUNTER NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE SLOW_PWM_HEATERS PIDTEMPBED EEPROM_SETTINGS INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT \ Z_SAFE_HOMING ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE \ HOST_KEEPALIVE_FEATURE HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT \ - LCD_INFO_MENU ARC_SUPPORT BEZIER_CURVE_SUPPORT EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES SDCARD_SORT_ALPHA EMERGENCY_PARSER -opt_set GRID_MAX_POINTS_X 16 -opt_set NOZZLE_TO_PROBE_OFFSET "{ 0, 0, 0 }" -exec_test $1 $2 "Re-ARM with NOZZLE_AS_PROBE and many features." + LCD_INFO_MENU ARC_SUPPORT BEZIER_CURVE_SUPPORT EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES \ + SDSUPPORT SDCARD_SORT_ALPHA AUTO_REPORT_SD_STATUS EMERGENCY_PARSER +exec_test $1 $2 "Re-ARM with NOZZLE_AS_PROBE and many features." "$3" # clean up restore_configs diff --git a/buildroot/tests/LPC1769-tests b/buildroot/tests/LPC1769 similarity index 55% rename from buildroot/tests/LPC1769-tests rename to buildroot/tests/LPC1769 index 4314b0d5ff..5ca7114543 100755 --- a/buildroot/tests/LPC1769-tests +++ b/buildroot/tests/LPC1769 @@ -10,35 +10,19 @@ set -e # Build with the default configurations # use_example_configs Azteeg/X5GT -exec_test $1 $2 "Azteeg X5GT Example Configuration" +exec_test $1 $2 "Azteeg X5GT Example Configuration" "$3" restore_configs -opt_set MOTHERBOARD BOARD_SMOOTHIEBOARD -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 -1 -opt_set TEMP_SENSOR_BED 5 -opt_enable VIKI2 SDSUPPORT ADAPTIVE_FAN_SLOWING NO_FAN_SLOWING_IN_PID_TUNING \ - FIX_MOUNTED_PROBE AUTO_BED_LEVELING_BILINEAR G29_RETRY_AND_RECOVER Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ - BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET BABYSTEP_ZPROBE_GFX_OVERLAY \ - PRINTCOUNTER NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE SLOW_PWM_HEATERS PIDTEMPBED EEPROM_SETTINGS INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT \ - Z_SAFE_HOMING ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE \ - LCD_INFO_MENU ARC_SUPPORT BEZIER_CURVE_SUPPORT EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES SDCARD_SORT_ALPHA EMERGENCY_PARSER -opt_set GRID_MAX_POINTS_X 16 -exec_test $1 $2 "Smoothieboard with many features" - -restore_configs -opt_set MOTHERBOARD BOARD_SMOOTHIEBOARD -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 -1 -opt_set TEMP_SENSOR_BED 5 +opt_set MOTHERBOARD BOARD_SMOOTHIEBOARD \ + EXTRUDERS 2 TEMP_SENSOR_1 -1 TEMP_SENSOR_BED 5 \ + GRID_MAX_POINTS_X 16 opt_enable TFTGLCD_PANEL_SPI SDSUPPORT ADAPTIVE_FAN_SLOWING NO_FAN_SLOWING_IN_PID_TUNING \ FIX_MOUNTED_PROBE AUTO_BED_LEVELING_BILINEAR G29_RETRY_AND_RECOVER Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ - BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET \ + BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET LEVEL_CORNERS_USE_PROBE LEVEL_CORNERS_VERIFY_RAISED \ PRINTCOUNTER NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE SLOW_PWM_HEATERS PIDTEMPBED EEPROM_SETTINGS INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT \ Z_SAFE_HOMING ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE \ LCD_INFO_MENU ARC_SUPPORT BEZIER_CURVE_SUPPORT EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES SDCARD_SORT_ALPHA EMERGENCY_PARSER -opt_set GRID_MAX_POINTS_X 16 -exec_test $1 $2 "Smoothieboard with TFTGLCD_PANEL_SPI" +exec_test $1 $2 "Smoothieboard with TFTGLCD_PANEL_SPI and many features" "$3" #restore_configs #opt_set MOTHERBOARD BOARD_AZTEEG_X5_MINI_WIFI @@ -50,23 +34,19 @@ exec_test $1 $2 "Smoothieboard with TFTGLCD_PANEL_SPI" # SD_ABORT_ON_ENDSTOP_HIT ADVANCED_OK GCODE_MACROS \ # VOLUMETRIC_DEFAULT_ON NO_WORKSPACE_OFFSETS \ # EXTRA_FAN_SPEED FWRETRACT MENU_ADDAUTOSTART SDCARD_SORT_ALPHA -#opt_set FAN_MIN_PWM 50 -#opt_set FAN_KICKSTART_TIME 100 -#opt_set XY_FREQUENCY_LIMIT 15 -#exec_test $1 $2 "Azteeg X5 MINI WIFI Many less common options" +#opt_set FAN_MIN_PWM 50 FAN_KICKSTART_TIME 100 XY_FREQUENCY_LIMIT 15 +#exec_test $1 $2 "Azteeg X5 MINI WIFI Many less common options" "$3" restore_configs use_example_configs delta/generic -opt_set MOTHERBOARD BOARD_COHESION3D_REMIX -opt_set X_DRIVER_TYPE TMC2130 -opt_set Y_DRIVER_TYPE TMC2130 -opt_set Z_DRIVER_TYPE TMC2130 +opt_set MOTHERBOARD BOARD_COHESION3D_REMIX \ + X_DRIVER_TYPE TMC2130 Y_DRIVER_TYPE TMC2130 Z_DRIVER_TYPE TMC2130 opt_enable AUTO_BED_LEVELING_BILINEAR EEPROM_SETTINGS EEPROM_CHITCHAT MECHANICAL_GANTRY_CALIBRATION \ TMC_USE_SW_SPI MONITOR_DRIVER_STATUS STEALTHCHOP_XY STEALTHCHOP_Z HYBRID_THRESHOLD \ SENSORLESS_PROBING Z_SAFE_HOMING X_STALL_SENSITIVITY Y_STALL_SENSITIVITY Z_STALL_SENSITIVITY TMC_DEBUG \ EXPERIMENTAL_I2CBUS -opt_disable PSU_CONTROL -exec_test $1 $2 "Cohesion3D Remix DELTA + ABL Bilinear + EEPROM + SENSORLESS_PROBING" +opt_disable PSU_CONTROL Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN +exec_test $1 $2 "Cohesion3D Remix DELTA + ABL Bilinear + EEPROM + SENSORLESS_PROBING" "$3" # clean up restore_configs diff --git a/buildroot/tests/NUCLEO_F767ZI b/buildroot/tests/NUCLEO_F767ZI new file mode 100755 index 0000000000..9e23246606 --- /dev/null +++ b/buildroot/tests/NUCLEO_F767ZI @@ -0,0 +1,18 @@ +#!/usr/bin/env bash +# +# Build tests for NUCLEO_F767ZI +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_NUCLEO_F767ZI SERIAL_PORT -1 X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2208 +opt_enable BLTOUCH Z_SAFE_HOMING SPEAKER SOFTWARE_DRIVER_ENABLE +exec_test $1 $2 "Mixed timer usage" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/STM32F7-tests b/buildroot/tests/REMRAM_V1 old mode 100644 new mode 100755 similarity index 73% rename from buildroot/tests/STM32F7-tests rename to buildroot/tests/REMRAM_V1 index 281222f156..f5944ff5af --- a/buildroot/tests/STM32F7-tests +++ b/buildroot/tests/REMRAM_V1 @@ -1,6 +1,6 @@ #!/usr/bin/env bash # -# Build tests for STM32F7 +# Build tests for REMRAM_V1 # # exit on first failure @@ -12,7 +12,7 @@ set -e restore_configs opt_set MOTHERBOARD BOARD_REMRAM_V1 opt_set SERIAL_PORT 1 -exec_test $1 $2 "Default Configuration" +exec_test $1 $2 "Default Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/SAMD51_grandcentral_m4-tests b/buildroot/tests/SAMD51_grandcentral_m4 old mode 100644 new mode 100755 similarity index 67% rename from buildroot/tests/SAMD51_grandcentral_m4-tests rename to buildroot/tests/SAMD51_grandcentral_m4 index fbaf5fb7e5..92a62c9d37 --- a/buildroot/tests/SAMD51_grandcentral_m4-tests +++ b/buildroot/tests/SAMD51_grandcentral_m4 @@ -10,20 +10,14 @@ set -e # Build with the default configurations # restore_configs -opt_set SERIAL_PORT -1 -opt_set MOTHERBOARD BOARD_AGCM4_RAMPS_144 -opt_set TEMP_SENSOR_0 11 -opt_set TEMP_SENSOR_BED 11 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2209 -opt_set Z_DRIVER_TYPE TMC2209 -opt_set Z2_DRIVER_TYPE TMC2209 -opt_set E0_DRIVER_TYPE TMC2209 -opt_set RESTORE_LEVELING_AFTER_G28 false -opt_set LCD_LANGUAGE it -opt_set NUM_Z_STEPPER_DRIVERS 2 -opt_set HOMING_BUMP_MM "{ 0, 0, 0 }" -opt_set SDCARD_CONNECTION LCD +opt_set MOTHERBOARD BOARD_AGCM4_RAMPS_144 SERIAL_PORT -1 \ + TEMP_SENSOR_0 11 TEMP_SENSOR_BED 11 \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2209 Z_DRIVER_TYPE TMC2209 Z2_DRIVER_TYPE TMC2209 E0_DRIVER_TYPE TMC2209 \ + RESTORE_LEVELING_AFTER_G28 false \ + LCD_LANGUAGE it \ + SDCARD_CONNECTION LCD \ + NUM_Z_STEPPER_DRIVERS 2 \ + HOMING_BUMP_MM '{ 0, 0, 0 }' opt_enable ENDSTOP_INTERRUPTS_FEATURE S_CURVE_ACCELERATION BLTOUCH Z_MIN_PROBE_REPEATABILITY_TEST \ FILAMENT_RUNOUT_SENSOR G26_MESH_VALIDATION MESH_EDIT_GFX_OVERLAY Z_SAFE_HOMING \ EEPROM_SETTINGS NOZZLE_PARK_FEATURE SDSUPPORT SD_CHECK_AND_RETRY \ @@ -33,7 +27,7 @@ opt_enable ENDSTOP_INTERRUPTS_FEATURE S_CURVE_ACCELERATION BLTOUCH Z_MIN_PROBE_R MOVE_Z_WHEN_IDLE BABYSTEP_ZPROBE_OFFSET BABYSTEP_ZPROBE_GFX_OVERLAY \ LIN_ADVANCE ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE MONITOR_DRIVER_STATUS SENSORLESS_HOMING \ SQUARE_WAVE_STEPPING TMC_DEBUG EXPERIMENTAL_SCURVE -exec_test $1 $2 "Build Grand Central M4 Default Configuration" +exec_test $1 $2 "Build Grand Central M4 Default Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/STM32F070CB_malyan b/buildroot/tests/STM32F070CB_malyan new file mode 100755 index 0000000000..060d707b04 --- /dev/null +++ b/buildroot/tests/STM32F070CB_malyan @@ -0,0 +1,14 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F070CB Malyan M200 v2 +# + +# exit on first failure +set -e + +restore_configs +opt_set MOTHERBOARD BOARD_MALYAN_M200_V2 SERIAL_PORT -1 +exec_test $1 $2 "Malyan M200 v2 Default Config" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/STM32F070RB_malyan-tests b/buildroot/tests/STM32F070RB_malyan old mode 100644 new mode 100755 similarity index 79% rename from buildroot/tests/STM32F070RB_malyan-tests rename to buildroot/tests/STM32F070RB_malyan index 58237a70eb..493dd5fdbd --- a/buildroot/tests/STM32F070RB_malyan-tests +++ b/buildroot/tests/STM32F070RB_malyan @@ -9,7 +9,7 @@ set -e restore_configs opt_set MOTHERBOARD BOARD_MALYAN_M200_V2 opt_set SERIAL_PORT -1 -exec_test $1 $2 "Malyan M200 v2 Default Config" +exec_test $1 $2 "Malyan M200 v2 Default Config" "$3" # cleanup restore_configs diff --git a/buildroot/tests/STM32F103CB_malyan-tests b/buildroot/tests/STM32F103CB_malyan old mode 100644 new mode 100755 similarity index 81% rename from buildroot/tests/STM32F103CB_malyan-tests rename to buildroot/tests/STM32F103CB_malyan index e594cb43db..6624b6c3c2 --- a/buildroot/tests/STM32F103CB_malyan-tests +++ b/buildroot/tests/STM32F103CB_malyan @@ -7,7 +7,7 @@ set -e use_example_configs Malyan/M200 -exec_test $1 $2 "Malyan M200" +exec_test $1 $2 "Malyan M200" "$3" # cleanup restore_configs diff --git a/buildroot/tests/STM32F103RC_btt b/buildroot/tests/STM32F103RC_btt new file mode 100755 index 0000000000..e76060aee8 --- /dev/null +++ b/buildroot/tests/STM32F103RC_btt @@ -0,0 +1,20 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F103RC BigTreeTech (SKR Mini E3) +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_MINI_E3_V1_0 SERIAL_PORT 1 SERIAL_PORT_2 -1 \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2209 Z_DRIVER_TYPE TMC2209 E0_DRIVER_TYPE TMC2209 +opt_enable PINS_DEBUGGING Z_IDLE_HEIGHT + +exec_test $1 $2 "BigTreeTech SKR Mini E3 1.0 - Basic Config with TMC2209 HW Serial" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/STM32F103RC_btt-tests b/buildroot/tests/STM32F103RC_btt-tests deleted file mode 100644 index ad15ee7237..0000000000 --- a/buildroot/tests/STM32F103RC_btt-tests +++ /dev/null @@ -1,28 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F103RC BigTreeTech (SKR Mini E3) -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_MINI_E3_V1_0 -opt_set SERIAL_PORT 1 -opt_set SERIAL_PORT_2 -1 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2209 -opt_set Z_DRIVER_TYPE TMC2209 -opt_set E0_DRIVER_TYPE TMC2209 -opt_set X_SLAVE_ADDRESS 0 -opt_set Y_SLAVE_ADDRESS 1 -opt_set Z_SLAVE_ADDRESS 2 -opt_set E0_SLAVE_ADDRESS 3 - -exec_test $1 $2 "BigTreeTech SKR Mini E3 1.0 - Basic Config with TMC2209 HW Serial" - -# clean up -restore_configs diff --git a/buildroot/tests/STM32F103RC_btt_USB-tests b/buildroot/tests/STM32F103RC_btt_USB old mode 100644 new mode 100755 similarity index 74% rename from buildroot/tests/STM32F103RC_btt_USB-tests rename to buildroot/tests/STM32F103RC_btt_USB index 8f7fff0b32..8381de0ea6 --- a/buildroot/tests/STM32F103RC_btt_USB-tests +++ b/buildroot/tests/STM32F103RC_btt_USB @@ -10,10 +10,8 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_MINI_V1_1 -opt_set SERIAL_PORT 1 -opt_set SERIAL_PORT_2 -1 -exec_test $1 $2 "BigTreeTech SKR Mini v1.1 - Basic Configuration" +opt_set MOTHERBOARD BOARD_BTT_SKR_MINI_V1_1 SERIAL_PORT 1 SERIAL_PORT_2 -1 +exec_test $1 $2 "BigTreeTech SKR Mini v1.1 - Basic Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/STM32F103RC_fysetc-tests b/buildroot/tests/STM32F103RC_fysetc old mode 100644 new mode 100755 similarity index 82% rename from buildroot/tests/STM32F103RC_fysetc-tests rename to buildroot/tests/STM32F103RC_fysetc index dfa85d9bb6..0e78c73188 --- a/buildroot/tests/STM32F103RC_fysetc-tests +++ b/buildroot/tests/STM32F103RC_fysetc @@ -10,7 +10,7 @@ set -e # Build with the default configurations # use_example_configs "Creality/Ender-3/FYSETC Cheetah 1.2/base" -exec_test $1 $2 "Cheetah 1.2 Configuration" +exec_test $1 $2 "Cheetah 1.2 Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/STM32F103RC_meeb-tests b/buildroot/tests/STM32F103RC_meeb old mode 100644 new mode 100755 similarity index 55% rename from buildroot/tests/STM32F103RC_meeb-tests rename to buildroot/tests/STM32F103RC_meeb index 74e770d3c8..3a191b4e7e --- a/buildroot/tests/STM32F103RC_meeb-tests +++ b/buildroot/tests/STM32F103RC_meeb @@ -10,14 +10,9 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_CCROBOT_MEEB_3DP -opt_set SERIAL_PORT 1 -opt_set SERIAL_PORT_2 -1 -opt_set X_DRIVER_TYPE TMC2208 -opt_set Y_DRIVER_TYPE TMC2208 -opt_set Z_DRIVER_TYPE TMC2208 -opt_set E0_DRIVER_TYPE TMC2208 -exec_test $1 $2 "MEEB_3DP - Basic Config with TMC2208 SW Serial" +opt_set MOTHERBOARD BOARD_CCROBOT_MEEB_3DP SERIAL_PORT 1 SERIAL_PORT_2 -1 \ + X_DRIVER_TYPE TMC2208 Y_DRIVER_TYPE TMC2208 Z_DRIVER_TYPE TMC2208 E0_DRIVER_TYPE TMC2208 +exec_test $1 $2 "MEEB_3DP - Basic Config with TMC2208 SW Serial" "$3" # clean up restore_configs diff --git a/buildroot/tests/STM32F103RE-tests b/buildroot/tests/STM32F103RE similarity index 86% rename from buildroot/tests/STM32F103RE-tests rename to buildroot/tests/STM32F103RE index 63fe5ba393..426f87d21b 100755 --- a/buildroot/tests/STM32F103RE-tests +++ b/buildroot/tests/STM32F103RE @@ -10,13 +10,11 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_STM32F103RE -opt_set EXTRUDERS 2 -opt_set SERIAL_PORT -1 +opt_set MOTHERBOARD BOARD_STM32F103RE SERIAL_PORT -1 EXTRUDERS 2 opt_enable EEPROM_SETTINGS EEPROM_CHITCHAT REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT \ PAREN_COMMENTS GCODE_MOTION_MODES SINGLENOZZLE TOOLCHANGE_FILAMENT_SWAP TOOLCHANGE_PARK \ BAUD_RATE_GCODE GCODE_MACROS NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE -exec_test $1 $2 "STM32F1R EEPROM_SETTINGS EEPROM_CHITCHAT REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT PAREN_COMMENTS GCODE_MOTION_MODES" +exec_test $1 $2 "STM32F1R EEPROM_SETTINGS EEPROM_CHITCHAT REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT PAREN_COMMENTS GCODE_MOTION_MODES" "$3" # cleanup restore_configs diff --git a/buildroot/tests/STM32F103RET6_creality b/buildroot/tests/STM32F103RET6_creality new file mode 100755 index 0000000000..ef020a33f1 --- /dev/null +++ b/buildroot/tests/STM32F103RET6_creality @@ -0,0 +1,29 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F103RET6_creality +# + +# exit on first failure +set -e + +# +# Build with configs included in the PR +# +use_example_configs "Creality/Ender-3 V2" +opt_enable MARLIN_DEV_MODE +exec_test $1 $2 "Ender 3 v2" "$3" + +use_example_configs "Creality/Ender-3 V2" +opt_disable CLASSIC_JERK +opt_add SDCARD_EEPROM_EMULATION +exec_test $1 $2 "Ender 3 v2, SD EEPROM, w/o CLASSIC_JERK" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_CREALITY_V452 SERIAL_PORT 1 +opt_disable NOZZLE_TO_PROBE_OFFSET +opt_enable NOZZLE_AS_PROBE Z_SAFE_HOMING Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN \ + PROBE_ACTIVATION_SWITCH PROBE_TARE PROBE_TARE_ONLY_WHILE_INACTIVE +exec_test $1 $2 "Creality V4.5.2 PROBE_ACTIVATION_SWITCH, Probe Tare" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/STM32F103RET6_creality-tests b/buildroot/tests/STM32F103RET6_creality-tests deleted file mode 100644 index ca723c7aa2..0000000000 --- a/buildroot/tests/STM32F103RET6_creality-tests +++ /dev/null @@ -1,16 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F103RET6_creality -# - -# exit on first failure -set -e - -# -# Build with configs included in the PR -# -use_example_configs "Creality/Ender-3 V2" -opt_enable MARLIN_DEV_MODE -exec_test $1 $2 "Ender 3 v2" - -restore_configs diff --git a/buildroot/tests/STM32F103RE_btt_USB-tests b/buildroot/tests/STM32F103RE_btt old mode 100644 new mode 100755 similarity index 50% rename from buildroot/tests/STM32F103RE_btt_USB-tests rename to buildroot/tests/STM32F103RE_btt index 77751d776e..97d7ffec4b --- a/buildroot/tests/STM32F103RE_btt_USB-tests +++ b/buildroot/tests/STM32F103RE_btt @@ -10,10 +10,10 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_E3_DIP -opt_set SERIAL_PORT 1 -opt_set SERIAL_PORT_2 -1 -exec_test $1 $2 "BigTreeTech SKR E3 DIP v1.0 - Basic Configuration" +opt_set MOTHERBOARD BOARD_BTT_SKR_E3_DIP \ + SERIAL_PORT 1 SERIAL_PORT_2 -1 \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2130 +exec_test $1 $2 "BTT SKR E3 DIP 1.0 | Mixed TMC Drivers" "$3" # clean up restore_configs diff --git a/buildroot/tests/STM32F103RE_btt-tests b/buildroot/tests/STM32F103RE_btt-tests deleted file mode 100644 index 9a829a553e..0000000000 --- a/buildroot/tests/STM32F103RE_btt-tests +++ /dev/null @@ -1,21 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F103RE BigTreeTech (SKR E3 DIP v1.0) -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_BTT_SKR_E3_DIP -opt_set SERIAL_PORT 1 -opt_set SERIAL_PORT_2 -1 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2130 -exec_test $1 $2 "BigTreeTech SKR E3 DIP v1.0 - Basic Config with mixed TMC Drivers" - -# clean up -restore_configs diff --git a/buildroot/tests/STM32F103RE_btt_USB b/buildroot/tests/STM32F103RE_btt_USB new file mode 100755 index 0000000000..c63a90e436 --- /dev/null +++ b/buildroot/tests/STM32F103RE_btt_USB @@ -0,0 +1,26 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F103RE BigTreeTech (SKR E3 DIP v1.0) +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_E3_DIP SERIAL_PORT 1 SERIAL_PORT_2 -1 +exec_test $1 $2 "BigTreeTech SKR E3 DIP v1.0 - Basic Configuration" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_BTT_SKR_CR6 SERIAL_PORT -1 SERIAL_PORT_2 2 TEMP_SENSOR_BED 1 +opt_enable CR10_STOCKDISPLAY \ + NOZZLE_AS_PROBE Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN Z_SAFE_HOMING \ + PROBE_ACTIVATION_SWITCH PROBE_TARE PROBE_TARE_ONLY_WHILE_INACTIVE \ + PROBING_HEATERS_OFF PREHEAT_BEFORE_PROBING +opt_disable NOZZLE_TO_PROBE_OFFSET +exec_test $1 $2 "BigTreeTech SKR CR6 PROBE_ACTIVATION_SWITCH, Probe Tare" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/STM32F103VE_longer b/buildroot/tests/STM32F103VE_longer new file mode 100755 index 0000000000..1c90744c01 --- /dev/null +++ b/buildroot/tests/STM32F103VE_longer @@ -0,0 +1,23 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F103VET6 +# + +# exit on first failure +set -e + +use_example_configs Alfawise/U20 +opt_enable BAUD_RATE_GCODE +exec_test $1 $2 "CLASSIC_UI U20 config" "$3" + +use_example_configs Alfawise/U20 +opt_enable BAUD_RATE_GCODE TFT_COLOR_UI +opt_disable TFT_CLASSIC_UI CUSTOM_STATUS_SCREEN_IMAGE +exec_test $1 $2 "COLOR_UI U20 config" "$3" + +use_example_configs Alfawise/U20-bltouch +opt_enable BAUD_RATE_GCODE +exec_test $1 $2 "BLTouch U20 config" + +# cleanup +restore_configs diff --git a/buildroot/tests/STM32F103VE_longer-tests b/buildroot/tests/STM32F103VE_longer-tests deleted file mode 100755 index 85b22c1284..0000000000 --- a/buildroot/tests/STM32F103VE_longer-tests +++ /dev/null @@ -1,16 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F103VET6 -# - -# exit on first failure -set -e - -use_example_configs Alfawise/U20 -opt_set MOTHERBOARD BOARD_LONGER3D_LK -opt_set SERIAL_PORT 1 -opt_enable BAUD_RATE_GCODE -exec_test $1 $2 "Full-featured U20 config" - -# cleanup -restore_configs diff --git a/buildroot/tests/STM32F4-tests b/buildroot/tests/STM32F4-tests deleted file mode 100644 index b5beb73663..0000000000 --- a/buildroot/tests/STM32F4-tests +++ /dev/null @@ -1,16 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F4 disco_f407vg -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -use_example_configs STM32/STM32F4 -exec_test $1 $2 "STM32F4 Default Configuration" - -# clean up -restore_configs diff --git a/buildroot/tests/STM32F401VE_STEVAL-tests b/buildroot/tests/STM32F401VE_STEVAL old mode 100644 new mode 100755 similarity index 56% rename from buildroot/tests/STM32F401VE_STEVAL-tests rename to buildroot/tests/STM32F401VE_STEVAL index 2811014c13..1704f3d2f0 --- a/buildroot/tests/STM32F401VE_STEVAL-tests +++ b/buildroot/tests/STM32F401VE_STEVAL @@ -8,9 +8,8 @@ set -e # Build examples restore_configs -opt_set MOTHERBOARD BOARD_STEVAL_3DP001V1 -opt_set SERIAL_PORT -1 -exec_test $1 $2 "STM32F401VE_STEVAL Default Config" +opt_set MOTHERBOARD BOARD_STEVAL_3DP001V1 SERIAL_PORT -1 +exec_test $1 $2 "STM32F401VE_STEVAL Default Config" "$3" # cleanup restore_configs diff --git a/buildroot/tests/STM32F407VE_black-tests b/buildroot/tests/STM32F407VE_black similarity index 97% rename from buildroot/tests/STM32F407VE_black-tests rename to buildroot/tests/STM32F407VE_black index 908382ec2a..6b7a3cfe7c 100755 --- a/buildroot/tests/STM32F407VE_black-tests +++ b/buildroot/tests/STM32F407VE_black @@ -9,7 +9,7 @@ set -e restore_configs use_example_configs STM32/Black_STM32F407VET6 opt_enable BAUD_RATE_GCODE -exec_test $1 $2 "Full-featured Sample Black STM32F407VET6 config" +exec_test $1 $2 "Full-featured Sample Black STM32F407VET6 config" "$3" # cleanup restore_configs diff --git a/buildroot/tests/at90usb1286_cdc-tests b/buildroot/tests/at90usb1286_cdc old mode 100644 new mode 100755 similarity index 83% rename from buildroot/tests/at90usb1286_cdc-tests rename to buildroot/tests/at90usb1286_cdc index 812e2ebcae..01d752db8b --- a/buildroot/tests/at90usb1286_cdc-tests +++ b/buildroot/tests/at90usb1286_cdc @@ -11,7 +11,7 @@ set -e # restore_configs opt_set MOTHERBOARD BOARD_BRAINWAVE_PRO -exec_test $1 $2 "Default Configuration" +exec_test $1 $2 "Default Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/at90usb1286_dfu-tests b/buildroot/tests/at90usb1286_dfu old mode 100644 new mode 100755 similarity index 50% rename from buildroot/tests/at90usb1286_dfu-tests rename to buildroot/tests/at90usb1286_dfu index 7571994ec4..75672a6a51 --- a/buildroot/tests/at90usb1286_dfu-tests +++ b/buildroot/tests/at90usb1286_dfu @@ -11,7 +11,12 @@ set -e # restore_configs opt_set MOTHERBOARD BOARD_PRINTRBOARD -exec_test $1 $2 "Default Configuration" +exec_test $1 $2 "Printrboard Configuration" "$3" + +restore_configs +opt_set MOTHERBOARD BOARD_PRINTRBOARD_REVF +opt_enable MINIPANEL +exec_test $1 $2 "Printrboard RevF with MiniPanel and Stepper DAC (in pins file)" "$3" # clean up restore_configs diff --git a/buildroot/tests/esp32 b/buildroot/tests/esp32 new file mode 100755 index 0000000000..a0f79107cf --- /dev/null +++ b/buildroot/tests/esp32 @@ -0,0 +1,30 @@ +#!/usr/bin/env bash +# +# Build tests for ESP32 +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_ESPRESSIF_ESP32 TX_BUFFER_SIZE 64 \ + WIFI_SSID '"ssid"' WIFI_PWD '"password"' +opt_enable WIFISUPPORT WEBSUPPORT GCODE_MACROS BAUD_RATE_GCODE M115_GEOMETRY_REPORT REPETIER_GCODE_M360 +exec_test $1 $2 "ESP32 with WIFISUPPORT and WEBSUPPORT" "$3" + +# +# Build with TMC drivers using hardware serial +# +restore_configs +opt_set MOTHERBOARD BOARD_ESPRESSIF_ESP32 \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2208 Z_DRIVER_TYPE TMC2209 E0_DRIVER_TYPE TMC2209 \ + X_HARDWARE_SERIAL Serial1 Y_HARDWARE_SERIAL Serial1 Z_HARDWARE_SERIAL Serial1 E0_HARDWARE_SERIAL Serial1 \ + X_SLAVE_ADDRESS 0 Y_SLAVE_ADDRESS 1 Z_SLAVE_ADDRESS 2 E0_SLAVE_ADDRESS 3 +opt_enable HOTEND_IDLE_TIMEOUT SOFTWARE_DRIVER_ENABLE +exec_test $1 $2 "ESP32, TMC HW Serial, Hotend Idle" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/esp32-tests b/buildroot/tests/esp32-tests deleted file mode 100755 index 204e7aa708..0000000000 --- a/buildroot/tests/esp32-tests +++ /dev/null @@ -1,41 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for ESP32 -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_ESPRESSIF_ESP32 -opt_enable WIFISUPPORT WEBSUPPORT GCODE_MACROS BAUD_RATE_GCODE M115_GEOMETRY_REPORT REPETIER_GCODE_M360 -opt_add WIFI_SSID "\"ssid\"" -opt_add WIFI_PWD "\"password\"" -opt_set TX_BUFFER_SIZE 64 -exec_test $1 $2 "ESP32 with WIFISUPPORT and WEBSUPPORT" - -# -# Build with TMC drivers using hardware serial -# -restore_configs -opt_set MOTHERBOARD BOARD_ESPRESSIF_ESP32 -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2208 -opt_set Z_DRIVER_TYPE TMC2209 -opt_set E0_DRIVER_TYPE TMC2209 -opt_set X_HARDWARE_SERIAL Serial1 -opt_set Y_HARDWARE_SERIAL Serial1 -opt_set Z_HARDWARE_SERIAL Serial1 -opt_set E0_HARDWARE_SERIAL Serial1 -opt_set X_SLAVE_ADDRESS 0 -opt_set Y_SLAVE_ADDRESS 1 -opt_set Z_SLAVE_ADDRESS 2 -opt_set E0_SLAVE_ADDRESS 3 -opt_enable HOTEND_IDLE_TIMEOUT -exec_test $1 $2 "ESP32, TMC HW Serial, Hotend Idle" - -# cleanup -restore_configs diff --git a/buildroot/tests/jgaurora_a5s_a1-tests b/buildroot/tests/jgaurora_a5s_a1 old mode 100644 new mode 100755 similarity index 80% rename from buildroot/tests/jgaurora_a5s_a1-tests rename to buildroot/tests/jgaurora_a5s_a1 index c6cc9e3f9c..e9be89eb30 --- a/buildroot/tests/jgaurora_a5s_a1-tests +++ b/buildroot/tests/jgaurora_a5s_a1 @@ -10,7 +10,7 @@ set -e # Build with the default configurations # use_example_configs JGAurora/A5S -exec_test $1 $2 "JGAurora/A5S Configuration" +exec_test $1 $2 "JGAurora/A5S Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/linux_native-tests b/buildroot/tests/linux_native similarity index 69% rename from buildroot/tests/linux_native-tests rename to buildroot/tests/linux_native index 38f531dadc..0153687eac 100755 --- a/buildroot/tests/linux_native-tests +++ b/buildroot/tests/linux_native @@ -10,10 +10,9 @@ set -e # Build with the default configurations # restore_configs -opt_set MOTHERBOARD BOARD_LINUX_RAMPS -opt_set TEMP_SENSOR_BED 1 +opt_set MOTHERBOARD BOARD_LINUX_RAMPS TEMP_SENSOR_BED 1 opt_enable PIDTEMPBED EEPROM_SETTINGS BAUD_RATE_GCODE -exec_test $1 $2 "Linux with EEPROM" +exec_test $1 $2 "Linux with EEPROM" "$3" # cleanup restore_configs diff --git a/buildroot/tests/malyan_M300-tests b/buildroot/tests/malyan_M300 similarity index 85% rename from buildroot/tests/malyan_M300-tests rename to buildroot/tests/malyan_M300 index 1955accaa5..27bdcfb059 100755 --- a/buildroot/tests/malyan_M300-tests +++ b/buildroot/tests/malyan_M300 @@ -10,7 +10,7 @@ restore_configs use_example_configs "delta/Malyan M300" opt_disable AUTO_BED_LEVELING_3POINT opt_set LCD_SERIAL_PORT 1 -exec_test $1 $2 "Malyan M300 (delta)" +exec_test $1 $2 "Malyan M300 (delta)" "$3" # cleanup restore_configs diff --git a/buildroot/tests/mega1280-tests b/buildroot/tests/mega1280 old mode 100644 new mode 100755 similarity index 72% rename from buildroot/tests/mega1280-tests rename to buildroot/tests/mega1280 index ce13d4a6e8..8b16b1dbc8 --- a/buildroot/tests/mega1280-tests +++ b/buildroot/tests/mega1280 @@ -10,50 +10,46 @@ set -e # Build with the default configurations # #restore_configs -#exec_test $1 $2 "Default Configuration" +#exec_test $1 $2 "Default Configuration" "$3" # # Test MESH_BED_LEVELING feature, with LCD # restore_configs -opt_set LCD_LANGUAGE an +opt_set LCD_LANGUAGE an \ + POWER_MONITOR_CURRENT_PIN 14 POWER_MONITOR_VOLTAGE_PIN 15 \ + CLOSED_LOOP_ENABLE_PIN 44 CLOSED_LOOP_MOVE_COMPLETE_PIN 45 opt_enable SPINDLE_FEATURE ULTIMAKERCONTROLLER LCD_BED_LEVELING \ EEPROM_SETTINGS EEPROM_BOOT_SILENT EEPROM_AUTO_INIT \ SENSORLESS_BACKOFF_MM HOMING_BACKOFF_POST_MM HOME_Y_BEFORE_X CODEPENDENT_XY_HOMING \ MESH_BED_LEVELING ENABLE_LEVELING_FADE_HEIGHT MESH_G28_REST_ORIGIN \ G26_MESH_VALIDATION MESH_EDIT_MENU GCODE_QUOTED_STRINGS \ EXTERNAL_CLOSED_LOOP_CONTROLLER POWER_MONITOR_CURRENT POWER_MONITOR_VOLTAGE -opt_set POWER_MONITOR_CURRENT_PIN 14 -opt_set POWER_MONITOR_VOLTAGE_PIN 15 -opt_set CLOSED_LOOP_ENABLE_PIN 44 -opt_set CLOSED_LOOP_MOVE_COMPLETE_PIN 45 -exec_test $1 $2 "Spindle, MESH_BED_LEVELING, closed loop, Power Monitor, and LCD" +exec_test $1 $2 "Spindle, MESH_BED_LEVELING, closed loop, Power Monitor, and LCD" "$3" # # Test DUAL_X_CARRIAGE # restore_configs -opt_set MOTHERBOARD BOARD_TT_OSCAR -opt_set LCD_LANGUAGE pt -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 1 +opt_set MOTHERBOARD BOARD_ZRIB_V52 \ + LCD_LANGUAGE pt REPRAPWORLD_KEYPAD_MOVE_STEP 10.0 \ + EXTRUDERS 2 TEMP_SENSOR_1 1 opt_enable USE_XMAX_PLUG DUAL_X_CARRIAGE REPRAPWORLD_KEYPAD -opt_set REPRAPWORLD_KEYPAD_MOVE_STEP 10.0 -exec_test $1 $2 "TT Oscar | DUAL_X_CARRIAGE" +exec_test $1 $2 "ZRIB_V52 | DUAL_X_CARRIAGE" "$3" # # Delta Config (generic) + Probeless # use_example_configs delta/generic opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER DELTA_AUTO_CALIBRATION DELTA_CALIBRATION_MENU -exec_test $1 $2 "RAMPS | DELTA | RRD LCD | DELTA_AUTO_CALIBRATION | DELTA_CALIBRATION_MENU" +exec_test $1 $2 "RAMPS | DELTA | RRD LCD | DELTA_AUTO_CALIBRATION | DELTA_CALIBRATION_MENU" "$3" # # Delta Config (generic) + ABL bilinear + BLTOUCH use_example_configs delta/generic opt_set LCD_LANGUAGE cz opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER DELTA_CALIBRATION_MENU AUTO_BED_LEVELING_BILINEAR BLTOUCH -exec_test $1 $2 "DELTA | RRD LCD | ABL Bilinear | BLTOUCH" +exec_test $1 $2 "DELTA | RRD LCD | ABL Bilinear | BLTOUCH" "$3" # clean up restore_configs diff --git a/buildroot/tests/mega2560 b/buildroot/tests/mega2560 new file mode 100755 index 0000000000..d961ab4eff --- /dev/null +++ b/buildroot/tests/mega2560 @@ -0,0 +1,207 @@ +#!/usr/bin/env bash +# +# Build tests for AVR ATmega2560 +# + +# exit on first failure +set -e + +# +# Build with the default configurations +# +#restore_configs +#exec_test $1 $2 "Default Configuration" "$3" + +# +# Test a probeless build of AUTO_BED_LEVELING_UBL, with lots of extruders +# +use_example_configs AnimationExample +opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO LCD_LANGUAGE fr \ + EXTRUDERS 5 TEMP_SENSOR_1 1 TEMP_SENSOR_2 5 TEMP_SENSOR_3 20 TEMP_SENSOR_4 1000 TEMP_SENSOR_BED 1 +opt_enable AUTO_BED_LEVELING_UBL RESTORE_LEVELING_AFTER_G28 DEBUG_LEVELING_FEATURE G26_MESH_VALIDATION ENABLE_LEVELING_FADE_HEIGHT SKEW_CORRECTION \ + REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER LIGHTWEIGHT_UI STATUS_MESSAGE_SCROLLING SHOW_CUSTOM_BOOTSCREEN BOOT_MARLIN_LOGO_SMALL \ + SDSUPPORT SDCARD_SORT_ALPHA USB_FLASH_DRIVE_SUPPORT AUTO_REPORT_SD_STATUS SCROLL_LONG_FILENAMES CANCEL_OBJECTS SOUND_MENU_ITEM \ + EEPROM_SETTINGS EEPROM_CHITCHAT GCODE_MACROS CUSTOM_USER_MENUS \ + MULTI_NOZZLE_DUPLICATION CLASSIC_JERK LIN_ADVANCE EXTRA_LIN_ADVANCE_K QUICK_HOME \ + LCD_SET_PROGRESS_MANUALLY PRINT_PROGRESS_SHOW_DECIMALS SHOW_REMAINING_TIME \ + BABYSTEPPING BABYSTEP_XY NANODLP_Z_SYNC I2C_POSITION_ENCODERS M114_DETAIL +exec_test $1 $2 "Azteeg X3 Pro | EXTRUDERS 5 | RRDFGSC | UBL | LIN_ADVANCE ..." "$3" + +# +# Add a Sled Z Probe, use UBL Cartesian moves, use Japanese language +# +use_example_configs AnimationExample +opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO LCD_LANGUAGE jp_kana \ + EXTRUDERS 5 TEMP_SENSOR_1 1 TEMP_SENSOR_2 5 TEMP_SENSOR_3 20 TEMP_SENSOR_4 1000 TEMP_SENSOR_BED 1 +opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER LIGHTWEIGHT_UI SHOW_CUSTOM_BOOTSCREEN BOOT_MARLIN_LOGO_SMALL \ + LCD_SET_PROGRESS_MANUALLY PRINT_PROGRESS_SHOW_DECIMALS SHOW_REMAINING_TIME STATUS_MESSAGE_SCROLLING SCROLL_LONG_FILENAMES \ + SDSUPPORT SDCARD_SORT_ALPHA NO_SD_AUTOSTART USB_FLASH_DRIVE_SUPPORT CANCEL_OBJECTS \ + Z_PROBE_SLED AUTO_BED_LEVELING_UBL RESTORE_LEVELING_AFTER_G28 DEBUG_LEVELING_FEATURE G26_MESH_VALIDATION ENABLE_LEVELING_FADE_HEIGHT \ + EEPROM_SETTINGS EEPROM_CHITCHAT GCODE_MACROS CUSTOM_USER_MENUS \ + MULTI_NOZZLE_DUPLICATION CLASSIC_JERK LIN_ADVANCE QUICK_HOME \ + NANODLP_Z_SYNC I2C_POSITION_ENCODERS M114_DETAIL \ + SKEW_CORRECTION SKEW_CORRECTION_FOR_Z SKEW_CORRECTION_GCODE \ + BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET DOUBLECLICK_FOR_Z_BABYSTEPPING BABYSTEP_HOTEND_Z_OFFSET BABYSTEP_DISPLAY_TOTAL +opt_disable SEGMENT_LEVELED_MOVES +exec_test $1 $2 "Azteeg X3 Pro | EXTRUDERS 5 | RRDFGSC | UBL | LIN_ADVANCE | Sled Probe | Skew | JP-Kana | Babystep offsets ..." "$3" + + +# +# 5 runout sensors with distinct states +# +restore_configs +opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO NUM_SERVOS 1 \ + EXTRUDERS 5 TEMP_SENSOR_1 1 TEMP_SENSOR_2 1 TEMP_SENSOR_3 1 TEMP_SENSOR_4 1 \ + NUM_RUNOUT_SENSORS 5 FIL_RUNOUT2_PIN 44 FIL_RUNOUT3_PIN 45 FIL_RUNOUT4_PIN 46 FIL_RUNOUT5_PIN 47 \ + FIL_RUNOUT3_STATE HIGH +opt_enable VIKI2 BOOT_MARLIN_LOGO_ANIMATED SDSUPPORT AUTO_REPORT_SD_STATUS \ + Z_PROBE_SERVO_NR Z_SERVO_ANGLES DEACTIVATE_SERVOS_AFTER_MOVE AUTO_BED_LEVELING_3POINT DEBUG_LEVELING_FEATURE \ + EEPROM_SETTINGS EEPROM_CHITCHAT M114_DETAIL \ + NO_VOLUMETRICS EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES AUTOTEMP G38_PROBE_TARGET JOYSTICK \ + DIRECT_STEPPING DETECT_BROKEN_ENDSTOP \ + FILAMENT_RUNOUT_SENSOR NOZZLE_PARK_FEATURE ADVANCED_PAUSE_FEATURE Z_SAFE_HOMING FIL_RUNOUT3_PULLUP +exec_test $1 $2 "Multiple runout sensors (x5) | Distinct runout states" "$3" + + +# +# Mixing Extruder with 5 steppers, Greek +# +restore_configs +opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO MIXING_STEPPERS 5 LCD_LANGUAGE ru \ + NUM_RUNOUT_SENSORS E_STEPPERS FIL_RUNOUT2_PIN 16 FIL_RUNOUT3_PIN 17 FIL_RUNOUT4_PIN 4 FIL_RUNOUT5_PIN 5 +opt_enable MIXING_EXTRUDER GRADIENT_MIX GRADIENT_VTOOL CR10_STOCKDISPLAY \ + USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE CONTROLLER_FAN_IGNORE_Z \ + FILAMENT_RUNOUT_SENSOR ADVANCED_PAUSE_FEATURE NOZZLE_PARK_FEATURE +exec_test $1 $2 "Azteeg X3 | Mixing Extruder (x5) | Gradient Mix | Greek" "$3" + +# +# Test SPEAKER with BOARD_BQ_ZUM_MEGA_3D and BQ_LCD_SMART_CONTROLLER +# +#restore_configs +#opt_set MOTHERBOARD BOARD_BQ_ZUM_MEGA_3D \ +# LCD_FEEDBACK_FREQUENCY_DURATION_MS 10 LCD_FEEDBACK_FREQUENCY_HZ 100 +#opt_enable BQ_LCD_SMART_CONTROLLER SPEAKER + +# +# Enable COREXY +# +#restore_configs +#opt_enable COREXY +#exec_test $1 $2 "Stuff" "$3" + +######## Other Standard LCD/Panels ############## +# +# ULTRA_LCD +# +#restore_configs +#opt_enable ULTRA_LCD +#exec_test $1 $2 "Stuff" "$3" +# +# DOGLCD +# +#restore_configs +#opt_enable DOGLCD +#exec_test $1 $2 "Stuff" "$3" +# +# MAKRPANEL +# Needs to use Melzi and Sanguino hardware +# +#restore_configs +#opt_enable MAKRPANEL +#exec_test $1 $2 "Stuff" "$3" +# +# REPRAP_DISCOUNT_SMART_CONTROLLER, SDSUPPORT, BABYSTEPPING, RIGIDBOARD_V2, and DAC_MOTOR_CURRENT_DEFAULT +# +#restore_configs +#opt_set MOTHERBOARD BOARD_RIGIDBOARD_V2 +#opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT BABYSTEPPING DAC_MOTOR_CURRENT_DEFAULT +#exec_test $1 $2 "Stuff" "$3" +# # +# G3D_PANEL with SDCARD_SORT_ALPHA and STATUS_MESSAGE_SCROLLING +# +#restore_configs +#opt_enable G3D_PANEL SDSUPPORT SDCARD_SORT_ALPHA STATUS_MESSAGE_SCROLLING SCROLL_LONG_FILENAMES +#opt_set SDSORT_GCODE true SDSORT_USES_RAM true SDSORT_USES_STACK true SDSORT_CACHE_NAMES true +#exec_test $1 $2 "Stuff" "$3" +# +# REPRAPWORLD_KEYPAD +# +# Cant find configuration details to get it to compile +#restore_configs +#opt_enable ULTRA_LCD REPRAPWORLD_KEYPAD REPRAPWORLD_KEYPAD_MOVE_STEP +#exec_test $1 $2 "Stuff" "$3" +# +# RA_CONTROL_PANEL +# +#restore_configs +#opt_enable RA_CONTROL_PANEL PINS_DEBUGGING +#exec_test $1 $2 "Stuff" "$3" + +######## I2C LCD/PANELS ############## +# +# !!!ATTENTION!!! +# Most I2C configurations are failing at the moment because they require +# a different Liquid Crystal library "LiquidTWI2". +# +# LCD_SAINSMART_I2C_1602 +# +#restore_configs +#opt_enable LCD_SAINSMART_I2C_1602 +#exec_test $1 $2 "Stuff" "$3" +# +# LCD_I2C_PANELOLU2 +# +#restore_configs +#opt_enable LCD_I2C_PANELOLU2 +#exec_test $1 $2 "Stuff" "$3" +# +# LCD_I2C_VIKI +# +#restore_configs +#opt_enable LCD_I2C_VIKI +#exec_test $1 $2 "Stuff" "$3" +# +# LCM1602 +# +#restore_configs +#opt_enable LCM1602 +#exec_test $1 $2 "Stuff" "$3" + +# +# Language files test with REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER +# +#restore_configs +#opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER SDSUPPORT +#for lang in an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana nl pl pt pt_br ro ru sk sv tr uk vi zh_CN zh_TW test; do opt_set LCD_LANGUAGE $lang; echo "compile with language $lang ..."; exec_test $1 $2 "Stuff" "$3"; done +# +#restore_configs +#opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT +#for lang in an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana nl pl pt pt_br ro ru sk sv tr uk vi zh_CN zh_TW test; do opt_set LCD_LANGUAGE $lang; echo "compile with language $lang ..."; exec_test $1 $2 "Stuff" "$3"; done + +######## Example Configurations ############## +# +# Test a basic DUAL_X_CARRIAGE configuration +# +use_example_configs Formbot/T_Rex_3 +exec_test $1 $2 "Formbot/T_Rex_3 example configuration." "$3" + +# +# BQ Hephestos 2 +#restore_configs +#use_example_configs BQ/Hephestos_2 +#exec_test $1 $2 "Stuff" "$3" + +# +# Makibox Config need to check board type for Teensy++ 2.0 +# +#use_example_configs makibox +#exec_test $1 $2 "Stuff" "$3" + +# +# tvrrug Config need to check board type for sanguino atmega644p +# +#use_example_configs tvrrug/Round2 +#exec_test $1 $2 "Stuff" "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/mega2560-tests b/buildroot/tests/mega2560-tests deleted file mode 100755 index d3fd5c0192..0000000000 --- a/buildroot/tests/mega2560-tests +++ /dev/null @@ -1,327 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for AVR ATmega2560 -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -#restore_configs -#exec_test $1 $2 "Default Configuration" - -# -# Test a probeless build of AUTO_BED_LEVELING_UBL, with lots of extruders -# -use_example_configs AnimationExample -opt_set SHOW_CUSTOM_BOOTSCREEN -opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO -opt_set LCD_LANGUAGE fr -opt_set EXTRUDERS 5 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_2 5 -opt_set TEMP_SENSOR_3 20 -opt_set TEMP_SENSOR_4 1000 -opt_set TEMP_SENSOR_BED 1 -opt_enable AUTO_BED_LEVELING_UBL RESTORE_LEVELING_AFTER_G28 DEBUG_LEVELING_FEATURE G26_MESH_VALIDATION ENABLE_LEVELING_FADE_HEIGHT SKEW_CORRECTION \ - REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER LIGHTWEIGHT_UI STATUS_MESSAGE_SCROLLING BOOT_MARLIN_LOGO_SMALL \ - SDSUPPORT SDCARD_SORT_ALPHA USB_FLASH_DRIVE_SUPPORT SCROLL_LONG_FILENAMES CANCEL_OBJECTS \ - EEPROM_SETTINGS EEPROM_CHITCHAT GCODE_MACROS CUSTOM_USER_MENUS \ - MULTI_NOZZLE_DUPLICATION CLASSIC_JERK LIN_ADVANCE EXTRA_LIN_ADVANCE_K QUICK_HOME \ - LCD_SET_PROGRESS_MANUALLY PRINT_PROGRESS_SHOW_DECIMALS SHOW_REMAINING_TIME \ - BABYSTEPPING BABYSTEP_XY NANODLP_Z_SYNC I2C_POSITION_ENCODERS M114_DETAIL -exec_test $1 $2 "Azteeg X3 Pro | EXTRUDERS 5 | RRDFGSC | UBL | LIN_ADVANCE ..." - -# -# Add a Sled Z Probe, use UBL Cartesian moves, use Japanese language -# -use_example_configs AnimationExample -opt_set SHOW_CUSTOM_BOOTSCREEN -opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO -opt_set LCD_LANGUAGE fr -opt_set EXTRUDERS 5 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_2 5 -opt_set TEMP_SENSOR_3 20 -opt_set TEMP_SENSOR_4 1000 -opt_set TEMP_SENSOR_BED 1 -opt_enable AUTO_BED_LEVELING_UBL RESTORE_LEVELING_AFTER_G28 DEBUG_LEVELING_FEATURE G26_MESH_VALIDATION ENABLE_LEVELING_FADE_HEIGHT SKEW_CORRECTION \ - REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER LIGHTWEIGHT_UI STATUS_MESSAGE_SCROLLING BOOT_MARLIN_LOGO_SMALL \ - SDSUPPORT SDCARD_SORT_ALPHA USB_FLASH_DRIVE_SUPPORT SCROLL_LONG_FILENAMES CANCEL_OBJECTS \ - EEPROM_SETTINGS EEPROM_CHITCHAT GCODE_MACROS CUSTOM_USER_MENUS \ - MULTI_NOZZLE_DUPLICATION CLASSIC_JERK LIN_ADVANCE QUICK_HOME \ - LCD_SET_PROGRESS_MANUALLY PRINT_PROGRESS_SHOW_DECIMALS SHOW_REMAINING_TIME \ - BABYSTEPPING BABYSTEP_XY NANODLP_Z_SYNC I2C_POSITION_ENCODERS M114_DETAIL \ - Z_PROBE_SLED SKEW_CORRECTION SKEW_CORRECTION_FOR_Z SKEW_CORRECTION_GCODE -opt_set LCD_LANGUAGE jp_kana -opt_disable SEGMENT_LEVELED_MOVES -opt_enable BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET DOUBLECLICK_FOR_Z_BABYSTEPPING BABYSTEP_HOTEND_Z_OFFSET BABYSTEP_DISPLAY_TOTAL M114_DETAIL -exec_test $1 $2 "Azteeg X3 Pro | EXTRUDERS 5 | RRDFGSC | UBL | LIN_ADVANCE | Sled Probe | Skew | JP-Kana | Babystep offsets ..." - -# -# Test a Servo Probe -# ...with AUTO_BED_LEVELING_3POINT, DEBUG_LEVELING_FEATURE, EEPROM_SETTINGS, EEPROM_CHITCHAT, EXTENDED_CAPABILITIES_REPORT, and AUTO_REPORT_TEMPERATURES -# -restore_configs -opt_set LCD_LANGUAGE zh_CN -opt_set EXTRUDERS 5 -opt_set NUM_SERVOS 1 -opt_enable ZONESTAR_LCD Z_PROBE_SERVO_NR Z_SERVO_ANGLES DEACTIVATE_SERVOS_AFTER_MOVE BOOT_MARLIN_LOGO_ANIMATED \ - AUTO_BED_LEVELING_3POINT DEBUG_LEVELING_FEATURE EEPROM_SETTINGS EEPROM_CHITCHAT M114_DETAIL \ - NO_VOLUMETRICS EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES AUTOTEMP G38_PROBE_TARGET JOYSTICK \ - PRUSA_MMU2 MMU2_MENUS PRUSA_MMU2_S_MODE DIRECT_STEPPING DETECT_BROKEN_ENDSTOP \ - FILAMENT_RUNOUT_SENSOR NOZZLE_PARK_FEATURE ADVANCED_PAUSE_FEATURE Z_SAFE_HOMING -exec_test $1 $2 "RAMPS | ZONESTAR + Chinese | MMU2 | Servo | 3-Point + Debug | G38 ..." - -# -# Test MINIRAMBO with PWM_MOTOR_CURRENT and many features -# -restore_configs -opt_set MOTHERBOARD BOARD_MEGACONTROLLER -opt_set LCD_LANGUAGE de -opt_enable EEPROM_SETTINGS EEPROM_CHITCHAT \ - MINIPANEL SDSUPPORT PCA9632 LCD_INFO_MENU \ - AUTO_BED_LEVELING_BILINEAR PROBE_MANUALLY LCD_BED_LEVELING G26_MESH_VALIDATION MESH_EDIT_MENU \ - LIN_ADVANCE EXTRA_LIN_ADVANCE_K \ - INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT EXPERIMENTAL_I2CBUS M100_FREE_MEMORY_WATCHER \ - NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE \ - ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE ADVANCED_PAUSE_CONTINUOUS_PURGE FILAMENT_LOAD_UNLOAD_GCODES \ - PRINTCOUNTER SERVICE_NAME_1 SERVICE_INTERVAL_1 M114_DETAIL \ - USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE -opt_set CONTROLLERFAN_SPEED_IDLE 128 -opt_add M100_FREE_MEMORY_DUMPER -opt_add M100_FREE_MEMORY_CORRUPTOR -opt_set PWM_MOTOR_CURRENT "{ 1300, 1300, 1250 }" -opt_set I2C_SLAVE_ADDRESS 63 -exec_test $1 $2 "MEGACONTROLLER | Minipanel | M100 | PWM_MOTOR_CURRENT | PRINTCOUNTER | Advanced Pause ..." - -# -# Mixing Extruder with 5 steppers, Greek -# -restore_configs -opt_set MOTHERBOARD BOARD_AZTEEG_X3_PRO -opt_set LCD_LANGUAGE el_gr -opt_enable MIXING_EXTRUDER GRADIENT_MIX GRADIENT_VTOOL CR10_STOCKDISPLAY \ - USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE CONTROLLER_FAN_IGNORE_Z -opt_set MIXING_STEPPERS 5 -opt_set LCD_LANGUAGE ru -exec_test $1 $2 "Azteeg X3 | Mixing Extruder (x5) | Gradient Mix | Greek" - -# -# Test SPEAKER with BOARD_BQ_ZUM_MEGA_3D and BQ_LCD_SMART_CONTROLLER -# -#restore_configs -#opt_set MOTHERBOARD BOARD_BQ_ZUM_MEGA_3D -#opt_set LCD_FEEDBACK_FREQUENCY_DURATION_MS 10 -#opt_set LCD_FEEDBACK_FREQUENCY_HZ 100 -#opt_enable BQ_LCD_SMART_CONTROLLER SPEAKER - -# -# Enable COREXY -# -#restore_configs -#opt_enable COREXY -#exec_test $1 $2 "Stuff" - -# -# Test many less common options -# -restore_configs -opt_set MOTHERBOARD BOARD_MIGHTYBOARD_REVE -opt_set TEMP_SENSOR_0 -2 -opt_set DIGIPOT_I2C_NUM_CHANNELS 5 -opt_set LCD_LANGUAGE it -opt_set MIXING_STEPPERS 2 -opt_set SERVO_DELAY "{ 300, 300, 300 }" -opt_enable COREYX USE_XMAX_PLUG MIXING_EXTRUDER GRADIENT_MIX \ - BABYSTEPPING BABYSTEP_DISPLAY_TOTAL FILAMENT_LCD_DISPLAY \ - REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER MENU_ADDAUTOSTART SDSUPPORT SDCARD_SORT_ALPHA \ - ENDSTOP_NOISE_THRESHOLD FAN_SOFT_PWM \ - FIX_MOUNTED_PROBE AUTO_BED_LEVELING_LINEAR DEBUG_LEVELING_FEATURE FILAMENT_WIDTH_SENSOR PROBE_OFFSET_WIZARD \ - Z_SAFE_HOMING SHOW_TEMP_ADC_VALUES HOME_Y_BEFORE_X EMERGENCY_PARSER \ - SD_ABORT_ON_ENDSTOP_HIT HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT ADVANCED_OK M114_DETAIL \ - VOLUMETRIC_DEFAULT_ON NO_WORKSPACE_OFFSETS EXTRA_FAN_SPEED FWRETRACT \ - USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE CONTROLLER_FAN_USE_Z_ONLY -opt_set FAN_MIN_PWM 50 -opt_set FAN_KICKSTART_TIME 100 -opt_set XY_FREQUENCY_LIMIT 15 -opt_add FILWIDTH_PIN 5 -exec_test $1 $2 "Mightyboard Rev. E | CoreXY, Gradient Mix | Endstop Int. | Home Y > X | FW Retract ..." - -######## Other Standard LCD/Panels ############## -# -# ULTRA_LCD -# -#restore_configs -#opt_enable ULTRA_LCD -#exec_test $1 $2 "Stuff" -# -# DOGLCD -# -#restore_configs -#opt_enable DOGLCD -#exec_test $1 $2 "Stuff" -# -# MAKRPANEL -# Needs to use Melzi and Sanguino hardware -# -#restore_configs -#opt_enable MAKRPANEL -#exec_test $1 $2 "Stuff" -# -# REPRAP_DISCOUNT_SMART_CONTROLLER, SDSUPPORT, BABYSTEPPING, RIGIDBOARD_V2, and DAC_MOTOR_CURRENT_DEFAULT -# -#restore_configs -#opt_set MOTHERBOARD BOARD_RIGIDBOARD_V2 -#opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT BABYSTEPPING DAC_MOTOR_CURRENT_DEFAULT -#exec_test $1 $2 "Stuff" -# # -# G3D_PANEL with SDCARD_SORT_ALPHA and STATUS_MESSAGE_SCROLLING -# -#restore_configs -#opt_enable G3D_PANEL SDSUPPORT SDCARD_SORT_ALPHA STATUS_MESSAGE_SCROLLING SCROLL_LONG_FILENAMES -#opt_set SDSORT_GCODE true -#opt_set SDSORT_USES_RAM true -#opt_set SDSORT_USES_STACK true -#opt_set SDSORT_CACHE_NAMES true -#exec_test $1 $2 "Stuff" -# -# REPRAPWORLD_KEYPAD -# -# Cant find configuration details to get it to compile -#restore_configs -#opt_enable ULTRA_LCD REPRAPWORLD_KEYPAD REPRAPWORLD_KEYPAD_MOVE_STEP -#exec_test $1 $2 "Stuff" -# -# RA_CONTROL_PANEL -# -#restore_configs -#opt_enable RA_CONTROL_PANEL PINS_DEBUGGING -#exec_test $1 $2 "Stuff" - -######## I2C LCD/PANELS ############## -# -# !!!ATTENTION!!! -# Most I2C configurations are failing at the moment because they require -# a different Liquid Crystal library "LiquidTWI2". -# -# LCD_SAINSMART_I2C_1602 -# -#restore_configs -#opt_enable LCD_SAINSMART_I2C_1602 -#exec_test $1 $2 "Stuff" -# -# LCD_I2C_PANELOLU2 -# -#restore_configs -#opt_enable LCD_I2C_PANELOLU2 -#exec_test $1 $2 "Stuff" -# -# LCD_I2C_VIKI -# -#restore_configs -#opt_enable LCD_I2C_VIKI -#exec_test $1 $2 "Stuff" -# -# LCM1602 -# -#restore_configs -#opt_enable LCM1602 -#exec_test $1 $2 "Stuff" - -# -# Language files test with REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER -# -#restore_configs -#opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER SDSUPPORT -#for lang in an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana nl pl pt pt_br ro ru sk tr uk vi zh_CN zh_TW test; do opt_set LCD_LANGUAGE $lang; echo "compile with language $lang ..."; exec_test $1 $2 "Stuff"; done -# -#restore_configs -#opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER SDSUPPORT -#for lang in an bg ca cz da de el el_gr en es eu fi fr gl hr hu it jp_kana nl pl pt pt_br ro ru sk tr uk vi zh_CN zh_TW test; do opt_set LCD_LANGUAGE $lang; echo "compile with language $lang ..."; exec_test $1 $2 "Stuff"; done - -######## Example Configurations ############## -# -# Test a full-featured CR-10S config -# -use_example_configs Creality/CR-10S -exec_test $1 $2 "Full-featured CR-10S config" - -# -# BQ Hephestos 2 -#restore_configs -#use_example_configs Hephestos_2 -#exec_test $1 $2 "Stuff" - -# -# Delta Config (generic) + UBL + ALLEN_KEY + EEPROM_SETTINGS + OLED_PANEL_TINYBOY2 -# -use_example_configs delta/generic -opt_enable RESTORE_LEVELING_AFTER_G28 EEPROM_SETTINGS EEPROM_CHITCHAT \ - Z_PROBE_ALLEN_KEY AUTO_BED_LEVELING_UBL \ - OLED_PANEL_TINYBOY2 MESH_EDIT_GFX_OVERLAY DELTA_CALIBRATION_MENU -opt_set LCD_LANGUAGE ko_KR -opt_set X_DRIVER_TYPE L6470 -opt_set Y_DRIVER_TYPE L6470 -opt_set Z_DRIVER_TYPE L6470 -opt_add L6470_CHAIN_SCK_PIN 53 -opt_add L6470_CHAIN_MISO_PIN 49 -opt_add L6470_CHAIN_MOSI_PIN 40 -opt_add L6470_CHAIN_SS_PIN 42 -opt_add "ENABLE_RESET_L64XX_CHIPS(V) NOOP" -exec_test $1 $2 "DELTA, RAMPS, L6470, UBL, Allen Key, EEPROM, OLED_PANEL_TINYBOY2..." - -# -# Delta Config (FLSUN AC because it's complex) -# -use_example_configs delta/FLSUN/auto_calibrate -exec_test $1 $2 "RAMPS 1.3 | DELTA | FLSUN AC Config" - -# -# Makibox Config need to check board type for Teensy++ 2.0 -# -#use_example_configs makibox -#exec_test $1 $2 "Stuff" - -# -# Test mixed TMC config -# -restore_configs -opt_set LCD_LANGUAGE vi -opt_set X_DRIVER_TYPE TMC2160 -opt_set Y_DRIVER_TYPE TMC5160 -opt_set Z_DRIVER_TYPE TMC2208_STANDALONE -opt_set E0_DRIVER_TYPE TMC2130 -opt_set X_MIN_ENDSTOP_INVERTING true -opt_set Y_MIN_ENDSTOP_INVERTING true -opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER \ - MARLIN_BRICKOUT MARLIN_INVADERS MARLIN_SNAKE \ - MONITOR_DRIVER_STATUS STEALTHCHOP_XY STEALTHCHOP_Z STEALTHCHOP_E HYBRID_THRESHOLD \ - USE_ZMIN_PLUG SENSORLESS_HOMING TMC_DEBUG M114_DETAIL -exec_test $1 $2 "RAMPS | Mixed TMC | Sensorless | RRDFGSC | Games" - -# -# SCARA with Mixed TMC -# -use_example_configs SCARA/Morgan -opt_set LCD_LANGUAGE es -opt_enable USE_ZMIN_PLUG FIX_MOUNTED_PROBE AUTO_BED_LEVELING_BILINEAR PAUSE_BEFORE_DEPLOY_STOW \ - MKS_12864OLED EEPROM_SETTINGS EEPROM_CHITCHAT M114_DETAIL Z_SAFE_HOMING \ - STEALTHCHOP_XY STEALTHCHOP_Z STEALTHCHOP_E HYBRID_THRESHOLD SENSORLESS_HOMING SQUARE_WAVE_STEPPING -opt_set X_MAX_ENDSTOP_INVERTING false -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2130 -opt_set Z_DRIVER_TYPE TMC2130_STANDALONE -opt_set E0_DRIVER_TYPE TMC2660 -exec_test $1 $2 "RAMPS | SCARA | Mixed TMC | EEPROM" - -# -# tvrrug Config need to check board type for sanguino atmega644p -# -#use_example_configs tvrrug/Round2 -#exec_test $1 $2 "Stuff" - -# clean up -restore_configs diff --git a/buildroot/tests/mks_robin b/buildroot/tests/mks_robin new file mode 100755 index 0000000000..652147f867 --- /dev/null +++ b/buildroot/tests/mks_robin @@ -0,0 +1,22 @@ +#!/usr/bin/env bash +# +# Build tests for MKS Robin +# (STM32F1 genericSTM32F103ZE) +# + +# exit on first failure +set -e + +use_example_configs Mks/Robin +exec_test $1 $2 "MKS Robin config (FSMC Color UI)" "$3" + +# +# MKS Robin LVGL FSMC +# +use_example_configs Mks/Robin +opt_disable TFT_CLASSIC_UI TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 +opt_enable TFT_LVGL_UI TFT_RES_480x320 +exec_test $1 $2 "MKS Robin nano v1.2 LVGL FSMC" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/mks_robin-tests b/buildroot/tests/mks_robin-tests deleted file mode 100644 index d635062205..0000000000 --- a/buildroot/tests/mks_robin-tests +++ /dev/null @@ -1,16 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for MKS Robin -# (STM32F1 genericSTM32F103ZE) -# - -# exit on first failure -set -e - -use_example_configs Mks/Robin -opt_disable TFT_320x240 -opt_enable FSMC_GRAPHICAL_TFT -exec_test $1 $2 "MKS Robin base configuration" - -# cleanup -restore_configs diff --git a/buildroot/tests/mks_robin_lite b/buildroot/tests/mks_robin_lite new file mode 100755 index 0000000000..49ef004871 --- /dev/null +++ b/buildroot/tests/mks_robin_lite @@ -0,0 +1,15 @@ +#!/usr/bin/env bash +# +# Build tests for STM32F1 genericSTM32F103RC +# + +# exit on first failure +set -e + +restore_configs +opt_set MOTHERBOARD BOARD_MKS_ROBIN_LITE SERIAL_PORT 1 +opt_enable EEPROM_SETTINGS SDSUPPORT +exec_test $1 $2 "Default Configuration with Fallback SD EEPROM" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/mks_robin_lite-tests b/buildroot/tests/mks_robin_lite-tests deleted file mode 100644 index 34809641ec..0000000000 --- a/buildroot/tests/mks_robin_lite-tests +++ /dev/null @@ -1,17 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for STM32F1 genericSTM32F103RC -# - -# exit on first failure -set -e - -restore_configs -opt_set MOTHERBOARD BOARD_MKS_ROBIN_LITE -opt_set SERIAL_PORT -1 -opt_enable EEPROM_SETTINGS -opt_enable SDSUPPORT -exec_test $1 $2 "Default Configuration with Fallback SD EEPROM" - -# cleanup -restore_configs diff --git a/buildroot/tests/mks_robin_mini-tests b/buildroot/tests/mks_robin_mini old mode 100644 new mode 100755 similarity index 60% rename from buildroot/tests/mks_robin_mini-tests rename to buildroot/tests/mks_robin_mini index 1c40ea4535..29baee8818 --- a/buildroot/tests/mks_robin_mini-tests +++ b/buildroot/tests/mks_robin_mini @@ -8,10 +8,8 @@ set -e use_example_configs Mks/Robin -opt_set MOTHERBOARD BOARD_MKS_ROBIN_MINI -opt_set EXTRUDERS 1 -opt_set TEMP_SENSOR_1 0 -exec_test $1 $2 "MKS Robin mini" +opt_set MOTHERBOARD BOARD_MKS_ROBIN_MINI EXTRUDERS 1 TEMP_SENSOR_1 0 +exec_test $1 $2 "MKS Robin mini" "$3" # cleanup restore_configs diff --git a/buildroot/tests/mks_robin_nano35 b/buildroot/tests/mks_robin_nano35 new file mode 100755 index 0000000000..c54cd36655 --- /dev/null +++ b/buildroot/tests/mks_robin_nano35 @@ -0,0 +1,68 @@ +#!/usr/bin/env bash +# +# Build tests for MKS Robin nano +# (STM32F1 genericSTM32F103VE) +# + +# exit on first failure +set -e + +# +# MKS Robin nano v1.2 Emulated DOGM FSMC +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO +exec_test $1 $2 "MKS Robin nano v1.2 Emulated DOGM FSMC" "$3" + +# +# MKS Robin v2 nano Emulated DOGM SPI +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC +opt_enable TFT_INTERFACE_SPI +exec_test $1 $2 "MKS Robin v2 nano Emulated DOGM SPI" "$3" + +# +# MKS Robin v2 nano LVGL SPI +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 SERIAL_PORT_2 +opt_enable TFT_INTERFACE_SPI TFT_LVGL_UI TFT_RES_480x320 MKS_WIFI_MODULE +exec_test $1 $2 "MKS Robin v2 nano LVGL SPI w/ WiFi" "$3" + +# +# MKS Robin v2 nano New Color UI 480x320 SPI +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC TFT_RES_320x240 +opt_enable TFT_INTERFACE_SPI TFT_RES_480x320 +opt_enable BINARY_FILE_TRANSFER +exec_test $1 $2 "MKS Robin v2 nano New Color UI 480x320 SPI + BINARY_FILE_TRANSFER" "$3" + +# +# MKS Robin v2 nano LVGL SPI + TMC +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2209 +opt_disable TFT_INTERFACE_FSMC TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 +opt_enable TFT_INTERFACE_SPI TFT_LVGL_UI TFT_RES_480x320 +exec_test $1 $2 "MKS Robin v2 nano LVGL SPI + TMC" "$3" + +# +# MKS Robin v2 nano New Color UI 480x320 SPI Without Touch Screen +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC TFT_RES_320x240 TOUCH_SCREEN +opt_enable TFT_INTERFACE_SPI TFT_RES_480x320 TFT_COLOR_UI +exec_test $1 $2 "MKS Robin v2 nano New Color UI 480x320 SPI without TOUCH_SCREEN" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/mks_robin_nano35_stm32 b/buildroot/tests/mks_robin_nano35_stm32 new file mode 100755 index 0000000000..0891744692 --- /dev/null +++ b/buildroot/tests/mks_robin_nano35_stm32 @@ -0,0 +1,67 @@ +#!/usr/bin/env bash +# +# Build tests for MKS Robin nano +# (STM32F1 genericSTM32F103VE) +# + +# exit on first failure +set -e + +# +# MKS Robin nano v1.2 Emulated DOGM FSMC +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO +exec_test $1 $2 "MKS Robin nano v1.2 Emulated DOGM FSMC" "$3" + +# +# MKS Robin v2 nano Emulated DOGM SPI +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC +opt_enable TFT_INTERFACE_SPI +exec_test $1 $2 "MKS Robin v2 nano Emulated DOGM SPI" "$3" + +# +# MKS Robin nano v1.2 LVGL FSMC +# +# use_example_configs Mks/Robin +# opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO +# opt_disable TFT_CLASSIC_UI TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 +# opt_enable TFT_LVGL_UI TFT_RES_480x320 +# exec_test $1 $2 "MKS Robin nano v1.2 LVGL FSMC" "$3" + +# +# MKS Robin v2 nano LVGL SPI +# (Robin v2 nano has no FSMC interface) +# +# use_example_configs Mks/Robin +# opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +# opt_disable TFT_INTERFACE_FSMC TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 +# opt_enable TFT_INTERFACE_SPI TFT_LVGL_UI TFT_RES_480x320 +# exec_test $1 $2 "MKS Robin v2 nano LVGL SPI" "$3" + +# +# MKS Robin v2 nano New Color UI 480x320 SPI +# (Robin v2 nano has no FSMC interface) +# +use_example_configs Mks/Robin +opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 +opt_disable TFT_INTERFACE_FSMC TFT_RES_320x240 +opt_enable TFT_INTERFACE_SPI TFT_RES_480x320 +exec_test $1 $2 "MKS Robin v2 nano New Color UI 480x320 SPI" "$3" + +# +# MKS Robin v2 nano LVGL SPI + TMC +# (Robin v2 nano has no FSMC interface) +# +# use_example_configs Mks/Robin +# opt_set MOTHERBOARD BOARD_MKS_ROBIN_NANO_V2 X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2209 +# opt_disable TFT_INTERFACE_FSMC TFT_COLOR_UI TOUCH_SCREEN TFT_RES_320x240 +# opt_enable TFT_INTERFACE_SPI TFT_LVGL_UI TFT_RES_480x320 +# exec_test $1 $2 "MKS Robin v2 nano LVGL SPI + TMC" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/mks_robin_pro b/buildroot/tests/mks_robin_pro new file mode 100755 index 0000000000..4b38ab97b6 --- /dev/null +++ b/buildroot/tests/mks_robin_pro @@ -0,0 +1,19 @@ +#!/usr/bin/env bash +# +# Build tests for MKS Robin Pro +# + +# exit on first failure +set -e + +use_example_configs Mks/Robin_Pro +opt_enable EMERGENCY_PARSER +opt_set SERIAL_PORT 3 \ + SDCARD_CONNECTION LCD \ + X_DRIVER_TYPE TMC2209 Y_DRIVER_TYPE TMC2130 \ + TEMP_SENSOR_BED 1 +opt_disable SERIAL_PORT_2 THERMAL_PROTECTION_HOTENDS +exec_test $1 $2 "MKS Robin Pro, TMC Drivers, no thermal protection" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/mks_robin_pro-tests b/buildroot/tests/mks_robin_pro-tests deleted file mode 100644 index 7ae4670fed..0000000000 --- a/buildroot/tests/mks_robin_pro-tests +++ /dev/null @@ -1,19 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for MKS Robin Pro -# - -# exit on first failure -set -e - -use_example_configs Mks/Robin_Pro -opt_enable EMERGENCY_PARSER -opt_set SDCARD_CONNECTION LCD -opt_set X_DRIVER_TYPE TMC2209 -opt_set Y_DRIVER_TYPE TMC2130 -opt_set TEMP_SENSOR_BED 1 -opt_disable THERMAL_PROTECTION_HOTENDS -exec_test $1 $2 "MKS Robin Pro with TMC Drivers, hotend thermal protection disabled" - -# cleanup -#restore_configs diff --git a/buildroot/tests/mks_robin_stm32 b/buildroot/tests/mks_robin_stm32 new file mode 100755 index 0000000000..e250dceca2 --- /dev/null +++ b/buildroot/tests/mks_robin_stm32 @@ -0,0 +1,13 @@ +#!/usr/bin/env bash +# +# Build tests for MKS Robin (HAL/STM32) +# + +# exit on first failure +set -e + +use_example_configs Mks/Robin +exec_test $1 $2 "MKS Robin base configuration" "$3" + +# cleanup +restore_configs diff --git a/buildroot/tests/rambo b/buildroot/tests/rambo new file mode 100755 index 0000000000..5da4eed9b4 --- /dev/null +++ b/buildroot/tests/rambo @@ -0,0 +1,118 @@ +#!/usr/bin/env bash +# +# Build tests for AVR ATmega2560 RAMBo +# + +# exit on first failure +set -e + +# +# Lots of options - Formerly the first Mega2560 test +# +restore_configs +opt_set MOTHERBOARD BOARD_RAMBO \ + EXTRUDERS 2 TEMP_SENSOR_0 -2 TEMP_SENSOR_1 1 TEMP_SENSOR_BED 2 \ + TEMP_SENSOR_PROBE 1 TEMP_PROBE_PIN 12 \ + TEMP_SENSOR_CHAMBER 3 TEMP_CHAMBER_PIN 3 HEATER_CHAMBER_PIN 45 \ + Z_HOME_DIR 1 GRID_MAX_POINTS_X 16 \ + FANMUX0_PIN 53 +opt_disable USE_ZMIN_PLUG Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN USE_WATCHDOG +opt_enable USE_ZMAX_PLUG REPRAP_DISCOUNT_SMART_CONTROLLER LCD_PROGRESS_BAR LCD_PROGRESS_BAR_TEST \ + FIX_MOUNTED_PROBE CODEPENDENT_XY_HOMING PIDTEMPBED PROBE_TEMP_COMPENSATION \ + PREHEAT_BEFORE_PROBING PROBING_HEATERS_OFF PROBING_FANS_OFF PROBING_STEPPERS_OFF WAIT_FOR_BED_HEATER \ + EEPROM_SETTINGS SDSUPPORT SD_REPRINT_LAST_SELECTED_FILE BINARY_FILE_TRANSFER \ + BLINKM PCA9533 PCA9632 RGB_LED RGB_LED_R_PIN RGB_LED_G_PIN RGB_LED_B_PIN LED_CONTROL_MENU \ + NEOPIXEL_LED CASE_LIGHT_ENABLE CASE_LIGHT_USE_NEOPIXEL CASE_LIGHT_MENU \ + PID_PARAMS_PER_HOTEND PID_AUTOTUNE_MENU PID_EDIT_MENU LCD_SHOW_E_TOTAL \ + PRINTCOUNTER SERVICE_NAME_1 SERVICE_INTERVAL_1 LEVEL_BED_CORNERS LEVEL_CENTER_TOO \ + NOZZLE_PARK_FEATURE FILAMENT_RUNOUT_SENSOR FILAMENT_RUNOUT_DISTANCE_MM \ + ADVANCED_PAUSE_FEATURE FILAMENT_LOAD_UNLOAD_GCODES FILAMENT_UNLOAD_ALL_EXTRUDERS \ + PASSWORD_FEATURE PASSWORD_ON_STARTUP PASSWORD_ON_SD_PRINT_MENU PASSWORD_AFTER_SD_PRINT_END PASSWORD_AFTER_SD_PRINT_ABORT \ + AUTO_BED_LEVELING_BILINEAR Z_MIN_PROBE_REPEATABILITY_TEST DISTINCT_E_FACTORS \ + SKEW_CORRECTION SKEW_CORRECTION_FOR_Z SKEW_CORRECTION_GCODE \ + BACKLASH_COMPENSATION BACKLASH_GCODE BAUD_RATE_GCODE BEZIER_CURVE_SUPPORT \ + FWRETRACT ARC_P_CIRCLES CNC_WORKSPACE_PLANES CNC_COORDINATE_SYSTEMS \ + PSU_CONTROL AUTO_POWER_CONTROL POWER_LOSS_RECOVERY POWER_LOSS_PIN POWER_LOSS_STATE POWER_LOSS_RECOVER_ZHOME \ + SLOW_PWM_HEATERS THERMAL_PROTECTION_CHAMBER LIN_ADVANCE EXTRA_LIN_ADVANCE_K \ + HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT PINS_DEBUGGING MAX7219_DEBUG M114_DETAIL +opt_add DEBUG_POWER_LOSS_RECOVERY +exec_test $1 $2 "RAMBO | EXTRUDERS 2 | CHAR LCD + SD | FIX Probe | ABL-Linear | Advanced Pause | PLR | LEDs ..." "$3" + +# +# Full size Rambo Dual Endstop CNC +# +restore_configs +opt_set MOTHERBOARD BOARD_RAMBO \ + EXTRUDERS 0 TEMP_SENSOR_0 999 DUMMY_THERMISTOR_999_VALUE 170 \ + DIGIPOT_MOTOR_CURRENT '{ 120, 120, 120, 120, 120 }' \ + LEVEL_CORNERS_LEVELING_ORDER '{ LF, RF }' +opt_enable USE_XMAX_PLUG USE_YMAX_PLUG USE_ZMAX_PLUG \ + REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER REVERSE_ENCODER_DIRECTION SDSUPPORT EEPROM_SETTINGS \ + S_CURVE_ACCELERATION X_DUAL_STEPPER_DRIVERS X_DUAL_ENDSTOPS Y_DUAL_STEPPER_DRIVERS Y_DUAL_ENDSTOPS \ + ADAPTIVE_STEP_SMOOTHING CNC_COORDINATE_SYSTEMS GCODE_MOTION_MODES \ + LEVEL_BED_CORNERS LEVEL_CENTER_TOO +opt_disable MIN_SOFTWARE_ENDSTOP_Z MAX_SOFTWARE_ENDSTOPS +exec_test $1 $2 "Rambo CNC Configuration" "$3" + +# +# Rambo heated bed only +# +restore_configs +opt_set MOTHERBOARD BOARD_RAMBO EXTRUDERS 0 TEMP_SENSOR_BED 1 +opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER +exec_test $1 $2 "Rambo heated bed only" "$3" + +# +# Build with the default configurations +# +restore_configs +opt_set MOTHERBOARD BOARD_EINSY_RAMBO \ + X_DRIVER_TYPE TMC2130 Y_DRIVER_TYPE TMC2130 Z_DRIVER_TYPE TMC2130 E0_DRIVER_TYPE TMC2130 +exec_test $1 $2 "Einsy RAMBo with TMC2130" "$3" + +# +# Test MINIRAMBO with PWM_MOTOR_CURRENT and many features +# +restore_configs +opt_set MOTHERBOARD BOARD_MINIRAMBO \ + CONTROLLERFAN_SPEED_IDLE 128 \ + PWM_MOTOR_CURRENT '{ 1300, 1300, 1250 }' \ + I2C_SLAVE_ADDRESS 63 +opt_enable EEPROM_SETTINGS EEPROM_CHITCHAT REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER \ + SDSUPPORT PCA9632 SOUND_MENU_ITEM GCODE_REPEAT_MARKERS \ + AUTO_BED_LEVELING_BILINEAR PROBE_MANUALLY LCD_BED_LEVELING G26_MESH_VALIDATION MESH_EDIT_MENU \ + LIN_ADVANCE EXTRA_LIN_ADVANCE_K \ + INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT EXPERIMENTAL_I2CBUS M100_FREE_MEMORY_WATCHER \ + NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE \ + ADVANCED_PAUSE_FEATURE PARK_HEAD_ON_PAUSE ADVANCED_PAUSE_CONTINUOUS_PURGE FILAMENT_LOAD_UNLOAD_GCODES \ + PRINTCOUNTER SERVICE_NAME_1 SERVICE_INTERVAL_1 M114_DETAIL +opt_add M100_FREE_MEMORY_DUMPER +opt_add M100_FREE_MEMORY_CORRUPTOR +exec_test $1 $2 "MINIRAMBO | RRDGFSC | M100 | PWM_MOTOR_CURRENT | PRINTCOUNTER | Advanced Pause ..." "$3" + +# +# Test many less common options +# +restore_configs +opt_set MOTHERBOARD BOARD_RAMBO \ + TEMP_SENSOR_0 -2 \ + DIGIPOT_I2C_NUM_CHANNELS 5 \ + LCD_LANGUAGE it \ + MIXING_STEPPERS 2 \ + SERVO_DELAY '{ 300, 300, 300 }' \ + CONTROLLER_FAN_PIN X_MAX_PIN FILWIDTH_PIN 5 \ + FAN_MIN_PWM 50 FAN_KICKSTART_TIME 100 \ + XY_FREQUENCY_LIMIT 15 +opt_enable COREYX USE_XMAX_PLUG MIXING_EXTRUDER GRADIENT_MIX \ + BABYSTEPPING BABYSTEP_DISPLAY_TOTAL FILAMENT_LCD_DISPLAY \ + REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER MENU_ADDAUTOSTART SDSUPPORT SDCARD_SORT_ALPHA \ + ENDSTOP_NOISE_THRESHOLD FAN_SOFT_PWM \ + FIX_MOUNTED_PROBE AUTO_BED_LEVELING_LINEAR DEBUG_LEVELING_FEATURE FILAMENT_WIDTH_SENSOR PROBE_OFFSET_WIZARD \ + Z_SAFE_HOMING SHOW_TEMP_ADC_VALUES HOME_Y_BEFORE_X EMERGENCY_PARSER \ + SD_ABORT_ON_ENDSTOP_HIT HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT ADVANCED_OK M114_DETAIL \ + VOLUMETRIC_DEFAULT_ON NO_WORKSPACE_OFFSETS EXTRA_FAN_SPEED FWRETRACT \ + USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE CONTROLLER_FAN_USE_Z_ONLY +exec_test $1 $2 "Rambo | CoreXY, Gradient Mix | Endstop Int. | Home Y > X | FW Retract ..." "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/rambo-tests b/buildroot/tests/rambo-tests deleted file mode 100644 index ec8af16c23..0000000000 --- a/buildroot/tests/rambo-tests +++ /dev/null @@ -1,75 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for AVR ATmega2560 RAMBo -# - -# exit on first failure -set -e - -# -# Lots of options - Formerly the first Mega2560 test -# -restore_configs -opt_set MOTHERBOARD BOARD_RAMBO -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_0 -2 -opt_set TEMP_SENSOR_1 1 -opt_set TEMP_SENSOR_BED 2 -opt_set TEMP_SENSOR_PROBE 1 -opt_add TEMP_PROBE_PIN 12 -opt_set TEMP_SENSOR_CHAMBER 3 -opt_add TEMP_CHAMBER_PIN 3 -opt_add HEATER_CHAMBER_PIN 45 -opt_set GRID_MAX_POINTS_X 16 -opt_set FANMUX0_PIN 53 -opt_disable USE_WATCHDOG -opt_enable REPRAP_DISCOUNT_SMART_CONTROLLER LCD_PROGRESS_BAR LCD_PROGRESS_BAR_TEST \ - FIX_MOUNTED_PROBE Z_SAFE_HOMING CODEPENDENT_XY_HOMING PIDTEMPBED PROBE_TEMP_COMPENSATION \ - PROBING_HEATERS_OFF PROBING_FANS_OFF PROBING_STEPPERS_OFF WAIT_FOR_BED_HEATER \ - EEPROM_SETTINGS SDSUPPORT SD_REPRINT_LAST_SELECTED_FILE BINARY_FILE_TRANSFER \ - BLINKM PCA9533 PCA9632 RGB_LED RGB_LED_R_PIN RGB_LED_G_PIN RGB_LED_B_PIN LED_CONTROL_MENU \ - NEOPIXEL_LED CASE_LIGHT_ENABLE CASE_LIGHT_USE_NEOPIXEL CASE_LIGHT_MENU \ - PID_PARAMS_PER_HOTEND PID_AUTOTUNE_MENU PID_EDIT_MENU LCD_SHOW_E_TOTAL \ - PRINTCOUNTER SERVICE_NAME_1 SERVICE_INTERVAL_1 LEVEL_BED_CORNERS \ - NOZZLE_PARK_FEATURE FILAMENT_RUNOUT_SENSOR FILAMENT_RUNOUT_DISTANCE_MM \ - ADVANCED_PAUSE_FEATURE FILAMENT_LOAD_UNLOAD_GCODES FILAMENT_UNLOAD_ALL_EXTRUDERS \ - PASSWORD_FEATURE PASSWORD_ON_STARTUP PASSWORD_ON_SD_PRINT_MENU PASSWORD_AFTER_SD_PRINT_END PASSWORD_AFTER_SD_PRINT_ABORT \ - AUTO_BED_LEVELING_BILINEAR Z_MIN_PROBE_REPEATABILITY_TEST DISTINCT_E_FACTORS \ - SKEW_CORRECTION SKEW_CORRECTION_FOR_Z SKEW_CORRECTION_GCODE \ - BACKLASH_COMPENSATION BACKLASH_GCODE BAUD_RATE_GCODE BEZIER_CURVE_SUPPORT \ - FWRETRACT ARC_P_CIRCLES CNC_WORKSPACE_PLANES CNC_COORDINATE_SYSTEMS \ - PSU_CONTROL AUTO_POWER_CONTROL POWER_LOSS_RECOVERY POWER_LOSS_PIN POWER_LOSS_STATE \ - SLOW_PWM_HEATERS THERMAL_PROTECTION_CHAMBER LIN_ADVANCE EXTRA_LIN_ADVANCE_K \ - HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT PINS_DEBUGGING MAX7219_DEBUG M114_DETAIL -opt_add DEBUG_POWER_LOSS_RECOVERY -exec_test $1 $2 "RAMBO | EXTRUDERS 2 | CHAR LCD + SD | FIX Probe | ABL-Linear | Advanced Pause | PLR | LEDs ..." - -# -# Full size Rambo Dual Endstop CNC -# -restore_configs -opt_set MOTHERBOARD BOARD_RAMBO -opt_set EXTRUDERS 0 -opt_set TEMP_SENSOR_0 999 -opt_set DUMMY_THERMISTOR_999_VALUE 170 -opt_set DIGIPOT_MOTOR_CURRENT '{ 120, 120, 120, 120, 120 }' -opt_enable USE_XMAX_PLUG USE_YMAX_PLUG USE_ZMAX_PLUG \ - REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER REVERSE_ENCODER_DIRECTION SDSUPPORT EEPROM_SETTINGS \ - S_CURVE_ACCELERATION X_DUAL_STEPPER_DRIVERS X_DUAL_ENDSTOPS Y_DUAL_STEPPER_DRIVERS Y_DUAL_ENDSTOPS \ - ADAPTIVE_STEP_SMOOTHING CNC_COORDINATE_SYSTEMS GCODE_MOTION_MODES -opt_disable MIN_SOFTWARE_ENDSTOP_Z MAX_SOFTWARE_ENDSTOPS -exec_test $1 $2 "Rambo CNC Configuration" - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_EINSY_RAMBO -opt_set X_DRIVER_TYPE TMC2130 -opt_set Y_DRIVER_TYPE TMC2130 -opt_set Z_DRIVER_TYPE TMC2130 -opt_set E0_DRIVER_TYPE TMC2130 -exec_test $1 $2 "Einsy RAMBo with TMC2130" - -# clean up -restore_configs diff --git a/buildroot/tests/rumba32-tests b/buildroot/tests/rumba32 old mode 100644 new mode 100755 similarity index 55% rename from buildroot/tests/rumba32-tests rename to buildroot/tests/rumba32 index 42f9beb9af..f26af33610 --- a/buildroot/tests/rumba32-tests +++ b/buildroot/tests/rumba32 @@ -8,32 +8,24 @@ set -e # Build examples restore_configs -opt_set MOTHERBOARD BOARD_RUMBA32_V1_0 -opt_set SERIAL_PORT -1 +opt_set MOTHERBOARD BOARD_RUMBA32_V1_0 SERIAL_PORT -1 \ + TEMP_SENSOR_BED 1 X_DRIVER_TYPE TMC2130 opt_disable PIDTEMP opt_enable PIDTEMPBED -opt_set TEMP_SENSOR_BED 1 opt_disable THERMAL_PROTECTION_BED -opt_set X_DRIVER_TYPE TMC2130 -exec_test $1 $2 "RUMBA32 V1.0 with TMC2130, PID Bed, and bed thermal protection disabled" +exec_test $1 $2 "RUMBA32 V1.0 with TMC2130, PID Bed, and bed thermal protection disabled" "$3" # Build examples restore_configs -opt_set MOTHERBOARD BOARD_RUMBA32_V1_1 -opt_set SERIAL_PORT -1 +opt_set MOTHERBOARD BOARD_RUMBA32_V1_1 SERIAL_PORT -1 \ + TEMP_SENSOR_BED 1 X_DRIVER_TYPE TMC2130 Y_DRIVER_TYPE TMC2208 opt_enable PIDTEMPBED EEPROM_SETTINGS EEPROM_CHITCHAT REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER -opt_set TEMP_SENSOR_BED 1 -opt_set X_DRIVER_TYPE TMC2130 -opt_set Y_DRIVER_TYPE TMC2208 -exec_test $1 $2 "RUMBA32 V1.1 with TMC2130, TMC2208, PID Bed, EEPROM settings, and graphic LCD controller" +exec_test $1 $2 "RUMBA32 V1.1 with TMC2130, TMC2208, PID Bed, EEPROM settings, and graphic LCD controller" "$3" # Build examples restore_configs -opt_set MOTHERBOARD BOARD_RUMBA32_MKS -opt_set SERIAL_PORT -1 -opt_set X_DRIVER_TYPE TMC2130 -opt_set Y_DRIVER_TYPE TMC2208 -exec_test $1 $2 "RUMBA32 MKS Default Config with Mixed TMC Drivers" +opt_set MOTHERBOARD BOARD_RUMBA32_MKS SERIAL_PORT -1 X_DRIVER_TYPE TMC2130 Y_DRIVER_TYPE TMC2208 +exec_test $1 $2 "RUMBA32 MKS Default Config with Mixed TMC Drivers" "$3" # cleanup restore_configs diff --git a/buildroot/tests/run_tests b/buildroot/tests/run_tests deleted file mode 100755 index d01107f45a..0000000000 --- a/buildroot/tests/run_tests +++ /dev/null @@ -1,41 +0,0 @@ -#!/usr/bin/env bash -# -# run_tests -# -export PATH="$PATH:$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P )" -export PATH="$PATH:./buildroot/bin" - -# exit on first failure -set -e - -exec_test () { - printf "\n\033[0;32m[Test $2] \033[0m$3...\n" - if platformio run --project-dir $1 -e $2 --silent; then - printf "\033[0;32mPassed\033[0m\n" - return 0 - else - git reset --hard HEAD - printf "\033[0;31mFailed!\033[0m\n" - return 1 - fi -} -export -f exec_test - -printf "Running \033[0;32m$2\033[0m Tests\n" - -if [[ $2 = "ALL" ]]; then - dir_list=("$(dirname "${BASH_SOURCE[0]}")"/*) - declare -a tests=(${dir_list[@]/*run_tests/}) - for f in "${tests[@]}"; do - testenv=$(basename $f | cut -d"-" -f1) - printf "Running \033[0;32m$f\033[0m Tests\n" - exec_test $1 "$testenv --target clean" "Setup Build Environment" - $f $1 $testenv - git reset --hard HEAD - done -else - exec_test $1 "$2 --target clean" "Setup Build Environment" - $2-tests $1 $2 - git reset --hard HEAD -fi -printf "\033[0;32mAll tests completed successfully\033[0m\n" diff --git a/buildroot/tests/sanguino1284p b/buildroot/tests/sanguino1284p new file mode 100755 index 0000000000..7c2aa61f69 --- /dev/null +++ b/buildroot/tests/sanguino1284p @@ -0,0 +1,28 @@ +#!/usr/bin/env bash +# +# Build tests for AVR ATmega 1284p +# + +# exit on first failure +set -e + +# +# Start with default configurations... +# +restore_configs +opt_set MOTHERBOARD BOARD_SANGUINOLOLU_12 \ + LCD_LANGUAGE de \ + CONTROLLER_FAN_PIN 27 +opt_enable MINIPANEL USE_CONTROLLER_FAN CONTROLLER_FAN_EDITABLE +exec_test $1 $2 "Default Configuration | MINIPANAL | CONTROLLER_FAN" "$3" + +# +# Start with default configurations... +# +restore_configs +opt_set MOTHERBOARD BOARD_MELZI +opt_enable ZONESTAR_LCD +exec_test $1 $2 "Default Configuration | ZONESTAR_LCD " "$3" + +# clean up +restore_configs diff --git a/buildroot/tests/sanguino1284p-tests b/buildroot/tests/sanguino1284p-tests deleted file mode 100644 index 7181f961c4..0000000000 --- a/buildroot/tests/sanguino1284p-tests +++ /dev/null @@ -1,17 +0,0 @@ -#!/usr/bin/env bash -# -# Build tests for AVR ATmega 1284p -# - -# exit on first failure -set -e - -# -# Build with the default configurations -# -restore_configs -opt_set MOTHERBOARD BOARD_SANGUINOLOLU_12 -exec_test $1 $2 "Default Configuration" - -# clean up -restore_configs diff --git a/buildroot/tests/sanguino644p-tests b/buildroot/tests/sanguino644p old mode 100644 new mode 100755 similarity index 83% rename from buildroot/tests/sanguino644p-tests rename to buildroot/tests/sanguino644p index 41626b23f7..12910a76fa --- a/buildroot/tests/sanguino644p-tests +++ b/buildroot/tests/sanguino644p @@ -11,7 +11,7 @@ set -e # restore_configs opt_set MOTHERBOARD BOARD_SANGUINOLOLU_12 -exec_test $1 $2 "Default Configuration" +exec_test $1 $2 "Default Configuration" "$3" # clean up restore_configs diff --git a/buildroot/tests/teensy31-tests b/buildroot/tests/teensy31 similarity index 71% rename from buildroot/tests/teensy31-tests rename to buildroot/tests/teensy31 index be377b15af..10dde2be99 100755 --- a/buildroot/tests/teensy31-tests +++ b/buildroot/tests/teensy31 @@ -8,15 +8,24 @@ set -e restore_configs opt_set MOTHERBOARD BOARD_TEENSY31_32 -exec_test $1 $2 "Teensy3.1 with default config" +exec_test $1 $2 "Teensy3.1 with default config" "$3" # -# Test many features together +# Zero endstops, as with a CNC # restore_configs opt_set MOTHERBOARD BOARD_TEENSY31_32 -opt_set TEMP_SENSOR_0 1 -opt_set TEMP_SENSOR_BED 1 +opt_disable USE_XMIN_PLUG USE_YMIN_PLUG USE_ZMIN_PLUG +exec_test $1 $2 "Teensy3.1 with Zero Endstops" "$3" + +# +# Test many features together +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY31_32 \ + TEMP_SENSOR_0 1 TEMP_SENSOR_BED 1 \ + I2C_SLAVE_ADDRESS 63 \ + GRID_MAX_POINTS_X 16 opt_enable EEPROM_SETTINGS FILAMENT_WIDTH_SENSOR CALIBRATION_GCODE BAUD_RATE_GCODE \ FIX_MOUNTED_PROBE Z_SAFE_HOMING AUTO_BED_LEVELING_BILINEAR DEBUG_LEVELING_FEATURE Z_MIN_PROBE_REPEATABILITY_TEST \ BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET PRINTCOUNTER SLOW_PWM_HEATERS PIDTEMPBED \ @@ -25,6 +34,4 @@ opt_enable EEPROM_SETTINGS FILAMENT_WIDTH_SENSOR CALIBRATION_GCODE BAUD_RATE_GCO ARC_SUPPORT BEZIER_CURVE_SUPPORT EXPERIMENTAL_I2CBUS EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES \ PHOTO_GCODE PHOTO_POSITION PHOTO_SWITCH_POSITION PHOTO_SWITCH_MS PHOTO_DELAY_MS PHOTO_RETRACT_MM \ HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT -opt_set I2C_SLAVE_ADDRESS 63 -opt_set GRID_MAX_POINTS_X 16 -exec_test $1 $2 "Teensy3.1 with many features" +exec_test $1 $2 "Teensy3.1 with many features" "$3" diff --git a/buildroot/tests/teensy35-tests b/buildroot/tests/teensy35 similarity index 65% rename from buildroot/tests/teensy35-tests rename to buildroot/tests/teensy35 index c729f212a4..c9731665c5 100755 --- a/buildroot/tests/teensy35-tests +++ b/buildroot/tests/teensy35 @@ -8,28 +8,25 @@ set -e restore_configs opt_set MOTHERBOARD BOARD_TEENSY35_36 -exec_test $1 $2 "Teensy3.5 with default config" +exec_test $1 $2 "Teensy3.5 with default config" "$3" # # Test as many features together as possible # restore_configs -opt_set MOTHERBOARD BOARD_TEENSY35_36 -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_0 1 -opt_set TEMP_SENSOR_1 5 -opt_set TEMP_SENSOR_BED 1 +opt_set MOTHERBOARD BOARD_TEENSY35_36 \ + EXTRUDERS 2 TEMP_SENSOR_0 1 TEMP_SENSOR_1 5 TEMP_SENSOR_BED 1 \ + I2C_SLAVE_ADDRESS 63 \ + GRID_MAX_POINTS_X 16 opt_enable REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER LCD_INFO_MENU SDSUPPORT SDCARD_SORT_ALPHA \ - FILAMENT_WIDTH_SENSOR FILAMENT_LCD_DISPLAY CALIBRATION_GCODE BAUD_RATE_GCODE \ + FILAMENT_WIDTH_SENSOR FILAMENT_LCD_DISPLAY CALIBRATION_GCODE BAUD_RATE_GCODE SOUND_MENU_ITEM \ FIX_MOUNTED_PROBE Z_SAFE_HOMING AUTO_BED_LEVELING_BILINEAR Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET BABYSTEP_ZPROBE_GFX_OVERLAY \ PRINTCOUNTER NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE SLOW_PWM_HEATERS PIDTEMPBED EEPROM_SETTINGS INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT M100_FREE_MEMORY_WATCHER \ ADVANCED_PAUSE_FEATURE ARC_SUPPORT BEZIER_CURVE_SUPPORT EXPERIMENTAL_I2CBUS EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES PARK_HEAD_ON_PAUSE \ PHOTO_GCODE PHOTO_POSITION PHOTO_SWITCH_POSITION PHOTO_SWITCH_MS PHOTO_DELAY_MS PHOTO_RETRACT_MM \ HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT -opt_set I2C_SLAVE_ADDRESS 63 -opt_set GRID_MAX_POINTS_X 16 -exec_test $1 $2 "Teensy3.5 with many features" +exec_test $1 $2 "Teensy3.5 with many features" "$3" # # Test a Sled Z Probe with Linear leveling @@ -37,16 +34,15 @@ exec_test $1 $2 "Teensy3.5 with many features" restore_configs opt_set MOTHERBOARD BOARD_TEENSY35_36 opt_enable EEPROM_SETTINGS Z_PROBE_SLED Z_SAFE_HOMING AUTO_BED_LEVELING_LINEAR DEBUG_LEVELING_FEATURE GCODE_MACROS -exec_test $1 $2 "Sled Z Probe with Linear leveling" +exec_test $1 $2 "Sled Z Probe with Linear leveling" "$3" # # Test a Servo Probe # # restore_configs -# opt_set MOTHERBOARD BOARD_TEENSY35_36 +# opt_set MOTHERBOARD BOARD_TEENSY35_36 NUM_SERVOS 1 # opt_enable Z_PROBE_SERVO_NR Z_SERVO_ANGLES DEACTIVATE_SERVOS_AFTER_MOVE \ # AUTO_BED_LEVELING_3POINT DEBUG_LEVELING_FEATURE EEPROM_SETTINGS -# opt_set NUM_SERVOS 1 # exec_test $1 $2 "Servo Probe" # # ...with AUTO_BED_LEVELING_3POINT, DEBUG_LEVELING_FEATURE, EEPROM_SETTINGS, EEPROM_CHITCHAT, EXTENDED_CAPABILITIES_REPORT, and AUTO_REPORT_TEMPERATURES @@ -59,28 +55,23 @@ exec_test $1 $2 "Sled Z Probe with Linear leveling" # Test MAGNETIC_PARKING_EXTRUDER with LCD # restore_configs -opt_set MOTHERBOARD BOARD_TEENSY35_36 -opt_set EXTRUDERS 2 -opt_set TEMP_SENSOR_1 1 -opt_enable MAGNETIC_PARKING_EXTRUDER ULTIMAKERCONTROLLER -exec_test $1 $2 "MAGNETIC_PARKING_EXTRUDER with LCD" +opt_set MOTHERBOARD BOARD_TEENSY35_36 EXTRUDERS 2 TEMP_SENSOR_1 1 SOL0_PIN 29 EXTRUDERS 2 +opt_enable PARKING_EXTRUDER ULTIMAKERCONTROLLER +exec_test $1 $2 "PARKING_EXTRUDER with LCD" "$3" # # Mixing Extruder # restore_configs -opt_set MOTHERBOARD BOARD_TEENSY35_36 +opt_set MOTHERBOARD BOARD_TEENSY35_36 MIXING_STEPPERS 2 opt_enable MIXING_EXTRUDER DIRECT_MIXING_IN_G1 GRADIENT_MIX GRADIENT_VTOOL REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER -opt_set MIXING_STEPPERS 2 -exec_test $1 $2 "Mixing Extruder" +exec_test $1 $2 "Mixing Extruder" "$3" # # Test SWITCHING_EXTRUDER # # restore_configs -# opt_set MOTHERBOARD BOARD_TEENSY35_36 -# opt_set EXTRUDERS 2 -# opt_set NUM_SERVOS 1 +# opt_set MOTHERBOARD BOARD_TEENSY35_36 EXTRUDERS 2 NUM_SERVOS 1 # opt_enable SWITCHING_EXTRUDER ULTIMAKERCONTROLLER # exec_test $1 $2 "SWITCHING_EXTRUDER" @@ -88,16 +79,12 @@ exec_test $1 $2 "Mixing Extruder" # Enable COREXY # restore_configs -opt_set MOTHERBOARD BOARD_TEENSY35_36 -opt_enable COREXY -opt_set X_DRIVER_TYPE TMC5160 -opt_set Y_DRIVER_TYPE TMC5160 -opt_set X_MIN_ENDSTOP_INVERTING true -opt_set Y_MIN_ENDSTOP_INVERTING true -opt_add X_CS_PIN 46 -opt_add Y_CS_PIN 47 -opt_enable USE_ZMIN_PLUG MONITOR_DRIVER_STATUS SENSORLESS_HOMING -exec_test $1 $2 "Teensy 3.5/3.6 COREXY" +opt_set MOTHERBOARD BOARD_TEENSY35_36 \ + X_DRIVER_TYPE TMC5160 Y_DRIVER_TYPE TMC5160 \ + X_MIN_ENDSTOP_INVERTING true Y_MIN_ENDSTOP_INVERTING true \ + X_CS_PIN 46 Y_CS_PIN 47 +opt_enable COREXY USE_ZMIN_PLUG MONITOR_DRIVER_STATUS SENSORLESS_HOMING +exec_test $1 $2 "Teensy 3.5/3.6 COREXY" "$3" # # Enable COREXZ @@ -105,19 +92,16 @@ exec_test $1 $2 "Teensy 3.5/3.6 COREXY" restore_configs opt_set MOTHERBOARD BOARD_TEENSY35_36 opt_enable COREXZ -exec_test $1 $2 "Teensy 3.5/3.6 COREXZ" +exec_test $1 $2 "Teensy 3.5/3.6 COREXZ" "$3" # # Enable Dual Z with Dual Z endstops # restore_configs -opt_set MOTHERBOARD BOARD_TEENSY35_36 -opt_enable Z_MULTI_ENDSTOPS -opt_set NUM_Z_STEPPER_DRIVERS 2 +opt_set MOTHERBOARD BOARD_TEENSY35_36 NUM_Z_STEPPER_DRIVERS 2 Z2_MAX_PIN 2 +opt_enable Z_MULTI_ENDSTOPS USE_XMAX_PLUG pins_set ramps/RAMPS X_MAX_PIN -1 -opt_add Z2_MAX_PIN 2 -opt_enable USE_XMAX_PLUG -exec_test $1 $2 "Dual Z with Dual Z endstops" +exec_test $1 $2 "Dual Z with Dual Z endstops" "$3" # Clean up restore_configs diff --git a/buildroot/tests/teensy41 b/buildroot/tests/teensy41 new file mode 100755 index 0000000000..6074b5dc5f --- /dev/null +++ b/buildroot/tests/teensy41 @@ -0,0 +1,110 @@ +#!/usr/bin/env bash +# +# Build tests for Teensy 4.0/4.1 (ARM Cortex-M7) +# + +# exit on first failure +set -e + +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 +exec_test $1 $2 "Teensy4.1 with default config" "$3" + +# +# Test as many features together as possible +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 \ + EXTRUDERS 2 TEMP_SENSOR_0 1 TEMP_SENSOR_1 5 TEMP_SENSOR_BED 1 \ + I2C_SLAVE_ADDRESS 63 \ + GRID_MAX_POINTS_X 16 +opt_enable EXTENSIBLE_UI LCD_INFO_MENU SDSUPPORT SDCARD_SORT_ALPHA \ + FILAMENT_LCD_DISPLAY CALIBRATION_GCODE BAUD_RATE_GCODE \ + FIX_MOUNTED_PROBE Z_SAFE_HOMING AUTO_BED_LEVELING_BILINEAR Z_MIN_PROBE_REPEATABILITY_TEST DEBUG_LEVELING_FEATURE \ + BABYSTEPPING BABYSTEP_XY BABYSTEP_ZPROBE_OFFSET \ + PRINTCOUNTER NOZZLE_PARK_FEATURE NOZZLE_CLEAN_FEATURE SLOW_PWM_HEATERS PIDTEMPBED EEPROM_SETTINGS INCH_MODE_SUPPORT TEMPERATURE_UNITS_SUPPORT \ + ADVANCED_PAUSE_FEATURE ARC_SUPPORT BEZIER_CURVE_SUPPORT EXPERIMENTAL_I2CBUS EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES PARK_HEAD_ON_PAUSE \ + PHOTO_GCODE PHOTO_POSITION PHOTO_SWITCH_POSITION PHOTO_SWITCH_MS PHOTO_DELAY_MS PHOTO_RETRACT_MM \ + HOST_ACTION_COMMANDS HOST_PROMPT_SUPPORT +opt_add EXTUI_EXAMPLE +exec_test $1 $2 "Teensy4.1 with many features" "$3" + +# +# Test a Sled Z Probe with Linear leveling +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 +opt_enable EEPROM_SETTINGS Z_PROBE_SLED Z_SAFE_HOMING AUTO_BED_LEVELING_LINEAR DEBUG_LEVELING_FEATURE GCODE_MACROS +exec_test $1 $2 "Sled Z Probe with Linear leveling" "$3" + +# +# Test a Servo Probe +# +# restore_configs +# opt_set MOTHERBOARD BOARD_TEENSY41 +# opt_enable Z_PROBE_SERVO_NR Z_SERVO_ANGLES DEACTIVATE_SERVOS_AFTER_MOVE \ +# AUTO_BED_LEVELING_3POINT DEBUG_LEVELING_FEATURE EEPROM_SETTINGS +# opt_set NUM_SERVOS 1 +# exec_test $1 $2 "Servo Probe" "$3" +# +# ...with AUTO_BED_LEVELING_3POINT, DEBUG_LEVELING_FEATURE, EEPROM_SETTINGS, EEPROM_CHITCHAT, EXTENDED_CAPABILITIES_REPORT, and AUTO_REPORT_TEMPERATURES +# +# opt_enable AUTO_BED_LEVELING_3POINT DEBUG_LEVELING_FEATURE EEPROM_SETTINGS \ +# EXTENDED_CAPABILITIES_REPORT AUTO_REPORT_TEMPERATURES +# exec_test $1 $2 "...with AUTO_BED_LEVELING_3POINT, DEBUG_LEVELING_FEATURE, EEPROM_SETTINGS, EEPROM_CHITCHAT, EXTENDED_CAPABILITIES_REPORT, and AUTO_REPORT_TEMPERATURES" "$3" + +# +# Test MAGNETIC_PARKING_EXTRUDER with no LCD +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 SERIAL_PORT_2 -2 \ + EXTRUDERS 2 TEMP_SENSOR_1 1 +opt_enable EEPROM_SETTINGS MAGNETIC_PARKING_EXTRUDER +exec_test $1 $2 "Ethernet, EEPROM, Magnetic Parking Extruder, No LCD" "$3" + +# +# Mixing Extruder +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 MIXING_STEPPERS 2 +opt_enable MIXING_EXTRUDER DIRECT_MIXING_IN_G1 GRADIENT_MIX GRADIENT_VTOOL +exec_test $1 $2 "Mixing Extruder" "$3" + +# +# Test SWITCHING_EXTRUDER +# +# restore_configs +# opt_set MOTHERBOARD BOARD_TEENSY41 EXTRUDERS 2 NUM_SERVOS 1 +# opt_enable SWITCHING_EXTRUDER ULTIMAKERCONTROLLER +# exec_test $1 $2 "SWITCHING_EXTRUDER" "$3" + +# +# Enable COREXY +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 \ + X_DRIVER_TYPE TMC5160 Y_DRIVER_TYPE TMC5160 \ + X_MIN_ENDSTOP_INVERTING true Y_MIN_ENDSTOP_INVERTING true \ + X_CS_PIN 46 Y_CS_PIN 47 +opt_enable COREXY USE_ZMIN_PLUG MONITOR_DRIVER_STATUS SENSORLESS_HOMING +exec_test $1 $2 "Teensy 4.0/4.1 COREXY" "$3" + +# +# Enable COREXZ +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 +opt_enable COREXZ +exec_test $1 $2 "Teensy 4.0/4.1 COREXZ" "$3" + +# +# Enable Dual Z with Dual Z endstops +# +restore_configs +opt_set MOTHERBOARD BOARD_TEENSY41 NUM_Z_STEPPER_DRIVERS 2 Z2_MAX_PIN 2 +opt_enable Z_MULTI_ENDSTOPS USE_XMAX_PLUG +pins_set ramps/RAMPS X_MAX_PIN -1 +exec_test $1 $2 "Dual Z with Dual Z endstops" "$3" + +# Clean up +restore_configs diff --git a/buildroot/web-ui/data/www/bootstrap.min.css b/buildroot/web-ui/data/www/bootstrap.min.css new file mode 100644 index 0000000000..387b56b2cc --- /dev/null +++ b/buildroot/web-ui/data/www/bootstrap.min.css @@ -0,0 +1,6 @@ +/*! + * Bootstrap v4.5.0 (https://getbootstrap.com/) + * Copyright 2011-2020 The Bootstrap Authors + * Copyright 2011-2020 Twitter, Inc. + * Licensed under MIT (https://github.com/twbs/bootstrap/blob/master/LICENSE) + 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