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494 lines
17 KiB
494 lines
17 KiB
/**
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* Marlin 3D Printer Firmware
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* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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/**
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* MarlinSerial_Due.cpp - Hardware serial library for Arduino DUE
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* Copyright (c) 2017 Eduardo José Tagle. All right reserved
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* Based on MarlinSerial for AVR, copyright (c) 2006 Nicholas Zambetti. All right reserved.
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*/
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#ifdef ARDUINO_ARCH_SAM
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#include "../../inc/MarlinConfig.h"
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#include "MarlinSerial.h"
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#include "InterruptVectors.h"
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#include "../../MarlinCore.h"
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template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_r MarlinSerial<Cfg>::rx_buffer = { 0, 0, { 0 } };
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template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_t MarlinSerial<Cfg>::tx_buffer = { 0 };
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template<typename Cfg> bool MarlinSerial<Cfg>::_written = false;
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template<typename Cfg> uint8_t MarlinSerial<Cfg>::xon_xoff_state = MarlinSerial<Cfg>::XON_XOFF_CHAR_SENT | MarlinSerial<Cfg>::XON_CHAR;
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template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_dropped_bytes = 0;
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template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_buffer_overruns = 0;
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template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_framing_errors = 0;
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template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::rx_max_enqueued = 0;
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// A SW memory barrier, to ensure GCC does not overoptimize loops
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#define sw_barrier() asm volatile("": : :"memory");
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#include "../../feature/e_parser.h"
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// (called with RX interrupts disabled)
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template<typename Cfg>
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FORCE_INLINE void MarlinSerial<Cfg>::store_rxd_char() {
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static EmergencyParser::State emergency_state; // = EP_RESET
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// Get the tail - Nothing can alter its value while we are at this ISR
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const ring_buffer_pos_t t = rx_buffer.tail;
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// Get the head pointer
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ring_buffer_pos_t h = rx_buffer.head;
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// Get the next element
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ring_buffer_pos_t i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// Read the character from the USART
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uint8_t c = HWUART->UART_RHR;
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if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the RX FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
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--rx_dropped_bytes;
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const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// Calculate count of bytes stored into the RX buffer
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// Keep track of the maximum count of enqueued bytes
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if (Cfg::MAX_RX_QUEUED) NOLESS(rx_max_enqueued, rx_count);
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if (Cfg::XONOFF) {
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// If the last char that was sent was an XON
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if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XON_CHAR) {
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// Bytes stored into the RX buffer
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const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// If over 12.5% of RX buffer capacity, send XOFF before running out of
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// RX buffer space .. 325 bytes @ 250kbits/s needed to let the host react
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// and stop sending bytes. This translates to 13mS propagation time.
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if (rx_count >= (Cfg::RX_SIZE) / 8) {
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// At this point, definitely no TX interrupt was executing, since the TX isr can't be preempted.
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// Don't enable the TX interrupt here as a means to trigger the XOFF char, because if it happens
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// to be in the middle of trying to disable the RX interrupt in the main program, eventually the
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// enabling of the TX interrupt could be undone. The ONLY reliable thing this can do to ensure
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// the sending of the XOFF char is to send it HERE AND NOW.
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// About to send the XOFF char
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xon_xoff_state = XOFF_CHAR | XON_XOFF_CHAR_SENT;
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// Wait until the TX register becomes empty and send it - Here there could be a problem
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// - While waiting for the TX register to empty, the RX register could receive a new
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// character. This must also handle that situation!
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uint32_t status;
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while (!((status = HWUART->UART_SR) & UART_SR_TXRDY)) {
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if (status & UART_SR_RXRDY) {
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// We received a char while waiting for the TX buffer to be empty - Receive and process it!
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i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// Read the character from the USART
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c = HWUART->UART_RHR;
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if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
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--rx_dropped_bytes;
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}
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sw_barrier();
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}
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HWUART->UART_THR = XOFF_CHAR;
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// At this point there could be a race condition between the write() function
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// and this sending of the XOFF char. This interrupt could happen between the
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// wait to be empty TX buffer loop and the actual write of the character. Since
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// the TX buffer is full because it's sending the XOFF char, the only way to be
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// sure the write() function will succeed is to wait for the XOFF char to be
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// completely sent. Since an extra character could be received during the wait
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// it must also be handled!
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while (!((status = HWUART->UART_SR) & UART_SR_TXRDY)) {
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if (status & UART_SR_RXRDY) {
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// A char arrived while waiting for the TX buffer to be empty - Receive and process it!
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i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// Read the character from the USART
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c = HWUART->UART_RHR;
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if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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// If the character is to be stored at the index just before the tail
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// (such that the head would advance to the current tail), the FIFO is
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// full, so don't write the character or advance the head.
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if (i != t) {
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rx_buffer.buffer[h] = c;
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h = i;
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}
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else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
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--rx_dropped_bytes;
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}
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sw_barrier();
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}
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// At this point everything is ready. The write() function won't
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// have any issues writing to the UART TX register if it needs to!
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}
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}
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}
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// Store the new head value
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rx_buffer.head = h;
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}
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template<typename Cfg>
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FORCE_INLINE void MarlinSerial<Cfg>::_tx_thr_empty_irq() {
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if (Cfg::TX_SIZE > 0) {
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// Read positions
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uint8_t t = tx_buffer.tail;
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const uint8_t h = tx_buffer.head;
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if (Cfg::XONOFF) {
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// If an XON char is pending to be sent, do it now
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if (xon_xoff_state == XON_CHAR) {
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// Send the character
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HWUART->UART_THR = XON_CHAR;
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// Remember we sent it.
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xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
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// If nothing else to transmit, just disable TX interrupts.
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if (h == t) HWUART->UART_IDR = UART_IDR_TXRDY;
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return;
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}
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}
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// If nothing to transmit, just disable TX interrupts. This could
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// happen as the result of the non atomicity of the disabling of RX
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// interrupts that could end reenabling TX interrupts as a side effect.
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if (h == t) {
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HWUART->UART_IDR = UART_IDR_TXRDY;
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return;
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}
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// There is something to TX, Send the next byte
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const uint8_t c = tx_buffer.buffer[t];
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t = (t + 1) & (Cfg::TX_SIZE - 1);
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HWUART->UART_THR = c;
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tx_buffer.tail = t;
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// Disable interrupts if there is nothing to transmit following this byte
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if (h == t) HWUART->UART_IDR = UART_IDR_TXRDY;
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}
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}
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template<typename Cfg>
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void MarlinSerial<Cfg>::UART_ISR() {
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const uint32_t status = HWUART->UART_SR;
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// Data received?
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if (status & UART_SR_RXRDY) store_rxd_char();
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if (Cfg::TX_SIZE > 0) {
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// Something to send, and TX interrupts are enabled (meaning something to send)?
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if ((status & UART_SR_TXRDY) && (HWUART->UART_IMR & UART_IMR_TXRDY)) _tx_thr_empty_irq();
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}
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// Acknowledge errors
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if ((status & UART_SR_OVRE) || (status & UART_SR_FRAME)) {
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if (Cfg::DROPPED_RX && (status & UART_SR_OVRE) && !++rx_dropped_bytes) --rx_dropped_bytes;
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if (Cfg::RX_OVERRUNS && (status & UART_SR_OVRE) && !++rx_buffer_overruns) --rx_buffer_overruns;
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if (Cfg::RX_FRAMING_ERRORS && (status & UART_SR_FRAME) && !++rx_framing_errors) --rx_framing_errors;
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// TODO: error reporting outside ISR
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HWUART->UART_CR = UART_CR_RSTSTA;
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}
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}
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// Public Methods
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template<typename Cfg>
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void MarlinSerial<Cfg>::begin(const long baud_setting) {
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// Disable UART interrupt in NVIC
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NVIC_DisableIRQ( HWUART_IRQ );
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// We NEED memory barriers to ensure Interrupts are actually disabled!
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// ( https://dzone.com/articles/nvic-disabling-interrupts-on-arm-cortex-m-and-the )
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__DSB();
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__ISB();
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// Disable clock
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pmc_disable_periph_clk( HWUART_IRQ_ID );
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// Configure PMC
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pmc_enable_periph_clk( HWUART_IRQ_ID );
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// Disable PDC channel
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HWUART->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
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// Reset and disable receiver and transmitter
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HWUART->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
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// Configure mode: 8bit, No parity, 1 bit stop
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HWUART->UART_MR = UART_MR_CHMODE_NORMAL | US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO;
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// Configure baudrate (asynchronous, no oversampling)
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HWUART->UART_BRGR = (SystemCoreClock / (baud_setting << 4));
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// Configure interrupts
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HWUART->UART_IDR = 0xFFFFFFFF;
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HWUART->UART_IER = UART_IER_RXRDY | UART_IER_OVRE | UART_IER_FRAME;
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// Install interrupt handler
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install_isr(HWUART_IRQ, UART_ISR);
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// Configure priority. We need a very high priority to avoid losing characters
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// and we need to be able to preempt the Stepper ISR and everything else!
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// (this could probably be fixed by using DMA with the Serial port)
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NVIC_SetPriority(HWUART_IRQ, 1);
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// Enable UART interrupt in NVIC
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NVIC_EnableIRQ(HWUART_IRQ);
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// Enable receiver and transmitter
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HWUART->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
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if (Cfg::TX_SIZE > 0) _written = false;
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}
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template<typename Cfg>
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void MarlinSerial<Cfg>::end() {
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// Disable UART interrupt in NVIC
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NVIC_DisableIRQ( HWUART_IRQ );
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// We NEED memory barriers to ensure Interrupts are actually disabled!
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// ( https://dzone.com/articles/nvic-disabling-interrupts-on-arm-cortex-m-and-the )
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__DSB();
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__ISB();
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pmc_disable_periph_clk( HWUART_IRQ_ID );
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}
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template<typename Cfg>
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int MarlinSerial<Cfg>::peek() {
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const int v = rx_buffer.head == rx_buffer.tail ? -1 : rx_buffer.buffer[rx_buffer.tail];
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return v;
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}
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template<typename Cfg>
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int MarlinSerial<Cfg>::read() {
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const ring_buffer_pos_t h = rx_buffer.head;
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ring_buffer_pos_t t = rx_buffer.tail;
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if (h == t) return -1;
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int v = rx_buffer.buffer[t];
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t = (ring_buffer_pos_t)(t + 1) & (Cfg::RX_SIZE - 1);
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// Advance tail
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rx_buffer.tail = t;
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if (Cfg::XONOFF) {
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// If the XOFF char was sent, or about to be sent...
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if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
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// Get count of bytes in the RX buffer
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const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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// When below 10% of RX buffer capacity, send XON before running out of RX buffer bytes
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if (rx_count < (Cfg::RX_SIZE) / 10) {
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if (Cfg::TX_SIZE > 0) {
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// Signal we want an XON character to be sent.
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xon_xoff_state = XON_CHAR;
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// Enable TX isr.
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HWUART->UART_IER = UART_IER_TXRDY;
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}
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else {
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// If not using TX interrupts, we must send the XON char now
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xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
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while (!(HWUART->UART_SR & UART_SR_TXRDY)) sw_barrier();
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HWUART->UART_THR = XON_CHAR;
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}
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}
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}
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}
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return v;
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}
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template<typename Cfg>
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typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::available() {
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const ring_buffer_pos_t h = rx_buffer.head, t = rx_buffer.tail;
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return (ring_buffer_pos_t)(Cfg::RX_SIZE + h - t) & (Cfg::RX_SIZE - 1);
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}
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template<typename Cfg>
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void MarlinSerial<Cfg>::flush() {
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rx_buffer.tail = rx_buffer.head;
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if (Cfg::XONOFF) {
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if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
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if (Cfg::TX_SIZE > 0) {
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// Signal we want an XON character to be sent.
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xon_xoff_state = XON_CHAR;
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// Enable TX isr.
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HWUART->UART_IER = UART_IER_TXRDY;
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}
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else {
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// If not using TX interrupts, we must send the XON char now
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xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
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while (!(HWUART->UART_SR & UART_SR_TXRDY)) sw_barrier();
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HWUART->UART_THR = XON_CHAR;
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}
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}
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}
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}
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template<typename Cfg>
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size_t MarlinSerial<Cfg>::write(const uint8_t c) {
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_written = true;
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if (Cfg::TX_SIZE == 0) {
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while (!(HWUART->UART_SR & UART_SR_TXRDY)) sw_barrier();
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HWUART->UART_THR = c;
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}
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else {
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// If the TX interrupts are disabled and the data register
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// is empty, just write the byte to the data register and
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// be done. This shortcut helps significantly improve the
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// effective datarate at high (>500kbit/s) bitrates, where
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// interrupt overhead becomes a slowdown.
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// Yes, there is a race condition between the sending of the
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// XOFF char at the RX isr, but it is properly handled there
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if (!(HWUART->UART_IMR & UART_IMR_TXRDY) && (HWUART->UART_SR & UART_SR_TXRDY)) {
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HWUART->UART_THR = c;
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return 1;
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}
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const uint8_t i = (tx_buffer.head + 1) & (Cfg::TX_SIZE - 1);
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// If global interrupts are disabled (as the result of being called from an ISR)...
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if (!ISRS_ENABLED()) {
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// Make room by polling if it is possible to transmit, and do so!
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while (i == tx_buffer.tail) {
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// If we can transmit another byte, do it.
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if (HWUART->UART_SR & UART_SR_TXRDY) _tx_thr_empty_irq();
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// Make sure compiler rereads tx_buffer.tail
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sw_barrier();
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}
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}
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else {
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// Interrupts are enabled, just wait until there is space
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while (i == tx_buffer.tail) sw_barrier();
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}
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// Store new char. head is always safe to move
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tx_buffer.buffer[tx_buffer.head] = c;
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tx_buffer.head = i;
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// Enable TX isr - Non atomic, but it will eventually enable TX isr
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HWUART->UART_IER = UART_IER_TXRDY;
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}
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return 1;
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}
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template<typename Cfg>
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void MarlinSerial<Cfg>::flushTX() {
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// TX
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if (Cfg::TX_SIZE == 0) {
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// No bytes written, no need to flush. This special case is needed since there's
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// no way to force the TXC (transmit complete) bit to 1 during initialization.
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if (!_written) return;
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// Wait until everything was transmitted
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while (!(HWUART->UART_SR & UART_SR_TXEMPTY)) sw_barrier();
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// At this point nothing is queued anymore (DRIE is disabled) and
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// the hardware finished transmission (TXC is set).
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}
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else {
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// If we have never written a byte, no need to flush. This special
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// case is needed since there is no way to force the TXC (transmit
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// complete) bit to 1 during initialization
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if (!_written) return;
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// If global interrupts are disabled (as the result of being called from an ISR)...
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if (!ISRS_ENABLED()) {
|
|
|
|
// Wait until everything was transmitted - We must do polling, as interrupts are disabled
|
|
while (tx_buffer.head != tx_buffer.tail || !(HWUART->UART_SR & UART_SR_TXEMPTY)) {
|
|
// If there is more space, send an extra character
|
|
if (HWUART->UART_SR & UART_SR_TXRDY) _tx_thr_empty_irq();
|
|
sw_barrier();
|
|
}
|
|
|
|
}
|
|
else {
|
|
// Wait until everything was transmitted
|
|
while (tx_buffer.head != tx_buffer.tail || !(HWUART->UART_SR & UART_SR_TXEMPTY)) sw_barrier();
|
|
}
|
|
|
|
// At this point nothing is queued anymore (DRIE is disabled) and
|
|
// the hardware finished transmission (TXC is set).
|
|
}
|
|
}
|
|
|
|
|
|
// If not using the USB port as serial port
|
|
#if defined(SERIAL_PORT) && SERIAL_PORT >= 0
|
|
template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT> >;
|
|
MSerialT1 customizedSerial1(MarlinSerialCfg<SERIAL_PORT>::EMERGENCYPARSER);
|
|
#endif
|
|
|
|
#if defined(SERIAL_PORT_2) && SERIAL_PORT_2 >= 0
|
|
template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT_2> >;
|
|
MSerialT2 customizedSerial2(MarlinSerialCfg<SERIAL_PORT_2>::EMERGENCYPARSER);
|
|
#endif
|
|
|
|
#if defined(SERIAL_PORT_3) && SERIAL_PORT_3 >= 0
|
|
template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT_3> >;
|
|
MSerialT3 customizedSerial3(MarlinSerialCfg<SERIAL_PORT_3>::EMERGENCYPARSER);
|
|
#endif
|
|
|
|
#endif // ARDUINO_ARCH_SAM
|
|
|