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160 lines
6.0 KiB
160 lines
6.0 KiB
/**
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* Marlin 3D Printer Firmware
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* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#pragma once
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#ifdef STM32F1xx
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#include "stm32f1xx_hal.h"
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#elif defined(STM32F4xx)
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#include "stm32f4xx_hal.h"
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#else
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#error FSMC TFT is currently only supported on STM32F1 and STM32F4 hardware.
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#endif
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#ifndef LCD_READ_ID
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#define LCD_READ_ID 0x04 // Read display identification information (0xD3 on ILI9341)
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#endif
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#ifndef LCD_READ_ID4
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#define LCD_READ_ID4 0xD3 // Read display identification information (0xD3 on ILI9341)
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#endif
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#define DATASIZE_8BIT SPI_DATASIZE_8BIT
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#define DATASIZE_16BIT SPI_DATASIZE_16BIT
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#define TFT_IO TFT_FSMC
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#ifdef STM32F1xx
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#define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
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#elif defined(STM32F4xx)
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#define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
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#endif
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typedef struct {
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__IO uint16_t REG;
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__IO uint16_t RAM;
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} LCD_CONTROLLER_TypeDef;
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class TFT_FSMC {
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private:
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static SRAM_HandleTypeDef SRAMx;
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static DMA_HandleTypeDef DMAtx;
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static LCD_CONTROLLER_TypeDef *LCD;
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static uint32_t ReadID(uint16_t Reg);
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static void Transmit(uint16_t Data) { LCD->RAM = Data; __DSB(); }
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static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
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public:
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static void Init();
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static uint32_t GetID();
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static bool isBusy();
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static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
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static void DataTransferBegin(uint16_t DataWidth = DATASIZE_16BIT) {}
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static void DataTransferEnd() {};
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static void WriteData(uint16_t Data) { Transmit(Data); }
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static void WriteReg(uint16_t Reg) { LCD->REG = Reg; __DSB(); }
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static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
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static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
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};
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#ifdef STM32F1xx
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#define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)
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#elif defined(STM32F4xx)
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#define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FSMC)
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#define FSMC_BANK1_1 0x60000000U
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#define FSMC_BANK1_2 0x64000000U
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#define FSMC_BANK1_3 0x68000000U
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#define FSMC_BANK1_4 0x6C000000U
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#else
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#error No configuration for this MCU
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#endif
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const PinMap PinMap_FSMC[] = {
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{PD_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D00
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{PD_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D01
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{PD_0, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D02
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{PD_1, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D03
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{PE_7, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D04
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{PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
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{PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
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{PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
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{PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
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{PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
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{PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
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{PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
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{PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
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{PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
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{PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
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{PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
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{PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
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{PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
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{NC, NP, 0}
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};
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const PinMap PinMap_FSMC_CS[] = {
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{PD_7, (void *)FSMC_NORSRAM_BANK1, FSMC_PIN_DATA}, // FSMC_NE1
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#ifdef PF0
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{PG_9, (void *)FSMC_NORSRAM_BANK2, FSMC_PIN_DATA}, // FSMC_NE2
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{PG_10, (void *)FSMC_NORSRAM_BANK3, FSMC_PIN_DATA}, // FSMC_NE3
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{PG_12, (void *)FSMC_NORSRAM_BANK4, FSMC_PIN_DATA}, // FSMC_NE4
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#endif
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{NC, NP, 0}
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};
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#define FSMC_RS(A) (void *)((2 << A) - 2)
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const PinMap PinMap_FSMC_RS[] = {
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#ifdef PF0
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{PF_0, FSMC_RS( 0), FSMC_PIN_DATA}, // FSMC_A0
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{PF_1, FSMC_RS( 1), FSMC_PIN_DATA}, // FSMC_A1
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{PF_2, FSMC_RS( 2), FSMC_PIN_DATA}, // FSMC_A2
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{PF_3, FSMC_RS( 3), FSMC_PIN_DATA}, // FSMC_A3
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{PF_4, FSMC_RS( 4), FSMC_PIN_DATA}, // FSMC_A4
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{PF_5, FSMC_RS( 5), FSMC_PIN_DATA}, // FSMC_A5
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{PF_12, FSMC_RS( 6), FSMC_PIN_DATA}, // FSMC_A6
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{PF_13, FSMC_RS( 7), FSMC_PIN_DATA}, // FSMC_A7
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{PF_14, FSMC_RS( 8), FSMC_PIN_DATA}, // FSMC_A8
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{PF_15, FSMC_RS( 9), FSMC_PIN_DATA}, // FSMC_A9
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{PG_0, FSMC_RS(10), FSMC_PIN_DATA}, // FSMC_A10
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{PG_1, FSMC_RS(11), FSMC_PIN_DATA}, // FSMC_A11
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{PG_2, FSMC_RS(12), FSMC_PIN_DATA}, // FSMC_A12
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{PG_3, FSMC_RS(13), FSMC_PIN_DATA}, // FSMC_A13
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{PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
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{PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
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#endif
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{PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
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{PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
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{PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
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{PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
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{PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
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{PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
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{PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
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{PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
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#ifdef PF0
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{PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
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{PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
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#endif
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{NC, NP, 0}
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};
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