F4 sdio fix

This commit is contained in:
Sergey
2021-09-14 17:45:18 +03:00
parent f59916679d
commit 9e0cccbbf7
4 changed files with 8 additions and 8 deletions

View File

@@ -1697,12 +1697,12 @@
// Specify additional languages for the UI. Default specified by LCD_LANGUAGE.
//
#if ANY(DOGLCD, TFT_COLOR_UI, TOUCH_UI_FTDI_EVE)
//#define LCD_LANGUAGE_2 fr
#define LCD_LANGUAGE_2 ru
//#define LCD_LANGUAGE_3 de
//#define LCD_LANGUAGE_4 es
//#define LCD_LANGUAGE_5 it
#ifdef LCD_LANGUAGE_2
//#define LCD_LANGUAGE_AUTO_SAVE // Automatically save language to EEPROM on change
#define LCD_LANGUAGE_AUTO_SAVE // Automatically save language to EEPROM on change
#endif
#endif
@@ -1824,7 +1824,7 @@
* NOTE: This method is less reliable as it can only catch hangups while
* interrupts are enabled.
*/
#define USE_WATCHDOG
//#define USE_WATCHDOG
#if ENABLED(USE_WATCHDOG)
//#define WATCHDOG_RESET_MANUAL
#endif

View File

@@ -53,7 +53,7 @@ uint8_t SD_Cmd(uint8_t cmd, uint32_t arg, uint16_t response_type, uint32_t *resp
return 0;
}
uint32_t SD_transfer(uint8_t *buf, uint32_t blk, uint32_t cnt, uint32_t dir){
uint32_t __attribute__((optimize("O0"))) SD_transfer(uint8_t *buf, uint32_t blk, uint32_t cnt, uint32_t dir){
uint32_t trials;
uint8_t cmd=0;
@@ -99,7 +99,7 @@ uint32_t SD_transfer(uint8_t *buf, uint32_t blk, uint32_t cnt, uint32_t dir){
transmit=1;
error_flag=0;
__disable_irq();
//__disable_irq();
SD_Cmd(cmd, blk, SDIO_RESP_SHORT, (uint32_t*)response);
SDIO->DTIMER=(uint32_t)SDIO_DATA_R_TIMEOUT;
@@ -109,8 +109,9 @@ uint32_t SD_transfer(uint8_t *buf, uint32_t blk, uint32_t cnt, uint32_t dir){
SDIO->ICR=SDIO_ICR_STATIC;
DMA2_Stream3->CR |= DMA_SxCR_EN;
__DSB();
SDIO->DCTRL|=1; //DPSM is enabled
__enable_irq();
//__enable_irq();
while((SDIO->STA & (SDIO_STA_DATAEND|SDIO_STA_ERRORS)) == 0){asm("nop");};

View File

@@ -54,7 +54,6 @@ void mks_wifi_sd_deinit(void){
f_mount(0, "", 1);
DEBUG("Marlin mount");
card.mount();
card.mount();
};
void sd_delete_file(char *filename){

View File

@@ -21,7 +21,7 @@
(0x00 << DMA_SxCR_MBURST_Pos)| \
(0x00 << DMA_SxCR_PBURST_Pos)| \
(0x00 << DMA_SxCR_DBM_Pos) | \
(0x03 << DMA_SxCR_PL_Pos) | \
(0x00 << DMA_SxCR_PL_Pos) | \
(0x00 << DMA_SxCR_PINCOS_Pos)| \
(0x00 << DMA_SxCR_MSIZE_Pos) | \
(0x00 << DMA_SxCR_PSIZE_Pos) | \