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@ -203,60 +203,78 @@ |
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#define LCD_PINS_D4 P0_17 |
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#else |
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#define LCD_PINS_RS P0_16 |
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#define BTN_EN1 P3_25 |
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#define BTN_EN2 P3_26 |
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#define LCD_PINS_ENABLE P0_18 |
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#define LCD_PINS_D4 P0_15 |
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#define LCD_SDSS P0_28 |
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#define SD_DETECT_PIN P0_27 |
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#if ENABLED(FYSETC_MINI_12864) |
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#define DOGLCD_CS P0_18 |
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#define DOGLCD_A0 P0_16 |
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#define DOGLCD_SCK P0_07 |
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#define DOGLCD_MOSI P1_20 |
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#if ENABLED(MKS_12864OLED_SSD1306) |
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#define LCD_BACKLIGHT_PIN -1 |
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#define LCD_PINS_DC P0_17 |
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#define DOGLCD_CS P0_16 |
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#define DOGLCD_A0 LCD_PINS_DC |
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#define DOGLCD_SCK P0_15 |
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#define DOGLCD_MOSI P0_18 |
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#define FORCE_SOFT_SPI // Use this if default of hardware SPI causes display problems
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// results in LCD soft SPI mode 3, SD soft SPI mode 0
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#define LCD_PINS_RS P1_00 |
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#define LCD_PINS_D7 P1_22 |
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#define KILL_PIN -1 // NC
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#define LCD_RESET_PIN P0_15 // Must be high or open for LCD to operate normally.
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#else // !MKS_12864OLED_SSD1306
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#if EITHER(FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0) |
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#ifndef RGB_LED_R_PIN |
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#define RGB_LED_R_PIN P0_17 |
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#endif |
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#ifndef RGB_LED_G_PIN |
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#define RGB_LED_G_PIN P1_00 |
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#endif |
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#ifndef RGB_LED_B_PIN |
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#define RGB_LED_B_PIN P1_22 |
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#define LCD_PINS_RS P0_16 |
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#define LCD_PINS_ENABLE P0_18 |
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#define LCD_PINS_D4 P0_15 |
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#if ENABLED(FYSETC_MINI_12864) |
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#define DOGLCD_CS P0_18 |
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#define DOGLCD_A0 P0_16 |
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#define DOGLCD_SCK P0_07 |
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#define DOGLCD_MOSI P1_20 |
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#define LCD_BACKLIGHT_PIN -1 |
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#define FORCE_SOFT_SPI // Use this if default of hardware SPI causes display problems
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// results in LCD soft SPI mode 3, SD soft SPI mode 0
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#define LCD_RESET_PIN P0_15 // Must be high or open for LCD to operate normally.
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#if EITHER(FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0) |
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#ifndef RGB_LED_R_PIN |
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#define RGB_LED_R_PIN P0_17 |
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#endif |
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#ifndef RGB_LED_G_PIN |
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#define RGB_LED_G_PIN P1_00 |
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#endif |
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#ifndef RGB_LED_B_PIN |
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#define RGB_LED_B_PIN P1_22 |
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#endif |
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#elif ENABLED(FYSETC_MINI_12864_2_1) |
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#define NEOPIXEL_PIN P0_17 |
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#endif |
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#elif ENABLED(FYSETC_MINI_12864_2_1) |
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#define NEOPIXEL_PIN P0_17 |
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#endif |
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#else // !FYSETC_MINI_12864
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#else // !FYSETC_MINI_12864
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#if ENABLED(MKS_MINI_12864) |
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#define DOGLCD_CS P0_17 |
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#define DOGLCD_A0 P1_00 |
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#endif |
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#if ENABLED(MKS_MINI_12864) |
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#define DOGLCD_CS P0_17 |
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#define DOGLCD_A0 P1_00 |
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#endif |
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#if ENABLED(ULTIPANEL) |
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#define LCD_PINS_D5 P0_17 |
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#define LCD_PINS_D6 P1_00 |
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#define LCD_PINS_D7 P1_22 |
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#endif |
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#if ENABLED(ULTIPANEL) |
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#define LCD_PINS_D5 P0_17 |
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#define LCD_PINS_D6 P1_00 |
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#define LCD_PINS_D7 P1_22 |
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#endif |
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#endif // !FYSETC_MINI_12864
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#endif // !FYSETC_MINI_12864
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#endif |
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#endif // !MKS_12864OLED_SSD1306
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#endif // !CR10_STOCKDISPLAY
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#endif // HAS_SPI_LCD
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