|
|
@ -28,68 +28,38 @@ |
|
|
|
#include <stdint.h> |
|
|
|
#include <stdbool.h> |
|
|
|
|
|
|
|
#if NONE(STM32F103xE, STM32F103xG, STM32F4xx, STM32F7xx) |
|
|
|
#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported" |
|
|
|
#endif |
|
|
|
|
|
|
|
#if HAS_SD_HOST_DRIVE |
|
|
|
|
|
|
|
// use USB drivers
|
|
|
|
|
|
|
|
extern "C" { |
|
|
|
int8_t SD_MSC_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); |
|
|
|
int8_t SD_MSC_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); |
|
|
|
extern SD_HandleTypeDef hsd; |
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_Init() { |
|
|
|
return hsd.State == HAL_SD_STATE_READY; // return pass/fail status
|
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_ReadBlock(uint32_t block, uint8_t *src) { |
|
|
|
int8_t status = SD_MSC_Read(0, (uint8_t*)src, block, 1); // read one 512 byte block
|
|
|
|
return (bool) status; |
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) { |
|
|
|
int8_t status = SD_MSC_Write(0, (uint8_t*)src, block, 1); // write one 512 byte block
|
|
|
|
return (bool) status; |
|
|
|
} |
|
|
|
|
|
|
|
#else // !USBD_USE_CDC_COMPOSITE
|
|
|
|
|
|
|
|
// use local drivers
|
|
|
|
#if defined(STM32F103xE) || defined(STM32F103xG) |
|
|
|
// use local drivers
|
|
|
|
#if defined(STM32F103xE) || defined(STM32F103xG) |
|
|
|
#include <stm32f1xx_hal_rcc_ex.h> |
|
|
|
#include <stm32f1xx_hal_sd.h> |
|
|
|
#elif defined(STM32F4xx) |
|
|
|
#elif defined(STM32F4xx) |
|
|
|
#include <stm32f4xx_hal_rcc.h> |
|
|
|
#include <stm32f4xx_hal_dma.h> |
|
|
|
#include <stm32f4xx_hal_gpio.h> |
|
|
|
#include <stm32f4xx_hal_sd.h> |
|
|
|
#elif defined(STM32F7xx) |
|
|
|
#elif defined(STM32F7xx) |
|
|
|
#include <stm32f7xx_hal_rcc.h> |
|
|
|
#include <stm32f7xx_hal_dma.h> |
|
|
|
#include <stm32f7xx_hal_gpio.h> |
|
|
|
#include <stm32f7xx_hal_sd.h> |
|
|
|
#else |
|
|
|
#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported" |
|
|
|
#endif |
|
|
|
#else |
|
|
|
#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, or STM32F7xx." |
|
|
|
#endif |
|
|
|
|
|
|
|
// Fixed
|
|
|
|
#define SDIO_D0_PIN PC8 |
|
|
|
#define SDIO_D1_PIN PC9 |
|
|
|
#define SDIO_D2_PIN PC10 |
|
|
|
#define SDIO_D3_PIN PC11 |
|
|
|
#define SDIO_CK_PIN PC12 |
|
|
|
#define SDIO_CMD_PIN PD2 |
|
|
|
// Fixed
|
|
|
|
#define SDIO_D0_PIN PC8 |
|
|
|
#define SDIO_D1_PIN PC9 |
|
|
|
#define SDIO_D2_PIN PC10 |
|
|
|
#define SDIO_D3_PIN PC11 |
|
|
|
#define SDIO_CK_PIN PC12 |
|
|
|
#define SDIO_CMD_PIN PD2 |
|
|
|
|
|
|
|
SD_HandleTypeDef hsd; // create SDIO structure
|
|
|
|
// F4 supports one DMA for RX and another for TX, but Marlin will never
|
|
|
|
// do read and write at same time, so we use the same DMA for both.
|
|
|
|
DMA_HandleTypeDef hdma_sdio; |
|
|
|
SD_HandleTypeDef hsd; // create SDIO structure
|
|
|
|
// F4 supports one DMA for RX and another for TX, but Marlin will never
|
|
|
|
// do read and write at same time, so we use the same DMA for both.
|
|
|
|
DMA_HandleTypeDef hdma_sdio; |
|
|
|
|
|
|
|
/*
|
|
|
|
/*
|
|
|
|
SDIO_INIT_CLK_DIV is 118 |
|
|
|
SDIO clock frequency is 48MHz / (TRANSFER_CLOCK_DIV + 2) |
|
|
|
SDIO init clock frequency should not exceed 400KHz = 48MHz / (118 + 2) |
|
|
@ -100,26 +70,26 @@ |
|
|
|
|
|
|
|
MKS Robin board seems to have stable SDIO with BusWide 1bit and ClockDiv 8 i.e. 4.8MHz SDIO clock frequency |
|
|
|
Additional testing is required as there are clearly some 4bit initialization problems |
|
|
|
*/ |
|
|
|
*/ |
|
|
|
|
|
|
|
#ifndef USBD_OK |
|
|
|
#ifndef USBD_OK |
|
|
|
#define USBD_OK 0 |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
|
|
|
|
// Target Clock, configurable. Default is 18MHz, from STM32F1
|
|
|
|
#ifndef SDIO_CLOCK |
|
|
|
// Target Clock, configurable. Default is 18MHz, from STM32F1
|
|
|
|
#ifndef SDIO_CLOCK |
|
|
|
#define SDIO_CLOCK 18000000 // 18 MHz
|
|
|
|
#endif |
|
|
|
#endif |
|
|
|
|
|
|
|
// SDIO retries, configurable. Default is 3, from STM32F1
|
|
|
|
#ifndef SDIO_READ_RETRIES |
|
|
|
// SDIO retries, configurable. Default is 3, from STM32F1
|
|
|
|
#ifndef SDIO_READ_RETRIES |
|
|
|
#define SDIO_READ_RETRIES 3 |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
|
|
|
|
// SDIO Max Clock (naming from STM Manual, don't change)
|
|
|
|
#define SDIOCLK 48000000 |
|
|
|
// SDIO Max Clock (naming from STM Manual, don't change)
|
|
|
|
#define SDIOCLK 48000000 |
|
|
|
|
|
|
|
static uint32_t clock_to_divider(uint32_t clk) { |
|
|
|
static uint32_t clock_to_divider(uint32_t clk) { |
|
|
|
// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
|
|
|
|
// Also limited to no more than 48Mhz (SDIOCLK).
|
|
|
|
const uint32_t pclk2 = HAL_RCC_GetPCLK2Freq(); |
|
|
@ -129,9 +99,9 @@ |
|
|
|
// and subtract by 2, because STM32 will add 2, as written in the manual:
|
|
|
|
// SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]
|
|
|
|
return pclk2 / clk + (pclk2 % clk != 0) - 2; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
void go_to_transfer_speed() { |
|
|
|
void go_to_transfer_speed() { |
|
|
|
/* Default SDIO peripheral configuration for SD card initialization */ |
|
|
|
hsd.Init.ClockEdge = hsd.Init.ClockEdge; |
|
|
|
hsd.Init.ClockBypass = hsd.Init.ClockBypass; |
|
|
@ -142,9 +112,9 @@ |
|
|
|
|
|
|
|
/* Initialize SDIO peripheral interface with default configuration */ |
|
|
|
SDIO_Init(hsd.Instance, hsd.Init); |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
void SD_LowLevel_Init(void) { |
|
|
|
void SD_LowLevel_Init(void) { |
|
|
|
uint32_t tempreg; |
|
|
|
|
|
|
|
__HAL_RCC_GPIOC_CLK_ENABLE(); //enable GPIO clocks
|
|
|
@ -223,14 +193,14 @@ |
|
|
|
// Power up the SDIO
|
|
|
|
SDIO_PowerState_ON(SDIO); |
|
|
|
hsd.Instance = SDIO; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
|
|
|
|
void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
|
|
|
|
UNUSED(hsd); // Prevent unused argument(s) compilation warning
|
|
|
|
__HAL_RCC_SDIO_CLK_ENABLE(); // turn on SDIO clock
|
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_Init() { |
|
|
|
bool SDIO_Init() { |
|
|
|
uint8_t retryCnt = SDIO_READ_RETRIES; |
|
|
|
|
|
|
|
bool status; |
|
|
@ -271,9 +241,9 @@ |
|
|
|
#endif |
|
|
|
|
|
|
|
return true; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) { |
|
|
|
static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) { |
|
|
|
if (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) return false; |
|
|
|
|
|
|
|
TERN_(USE_WATCHDOG, HAL_watchdog_refresh()); |
|
|
@ -316,31 +286,38 @@ |
|
|
|
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) if (ELAPSED(millis(), timeout)) return false; |
|
|
|
|
|
|
|
return true; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) { |
|
|
|
bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) { |
|
|
|
uint8_t retries = SDIO_READ_RETRIES; |
|
|
|
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, NULL, dst)) return true; |
|
|
|
return false; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) { |
|
|
|
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) { |
|
|
|
uint8_t retries = SDIO_READ_RETRIES; |
|
|
|
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, src, NULL)) return true; |
|
|
|
return false; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
#if defined(STM32F1xx) |
|
|
|
bool SDIO_IsReady() { |
|
|
|
return hsd.State == HAL_SD_STATE_READY; |
|
|
|
} |
|
|
|
|
|
|
|
uint32_t SDIO_GetCardSize() { |
|
|
|
return (uint32_t)(hsd.SdCard.BlockNbr) * (hsd.SdCard.BlockSize); |
|
|
|
} |
|
|
|
|
|
|
|
#if defined(STM32F1xx) |
|
|
|
#define DMA_IRQ_HANDLER DMA2_Channel4_5_IRQHandler |
|
|
|
#elif defined(STM32F4xx) |
|
|
|
#elif defined(STM32F4xx) |
|
|
|
#define DMA_IRQ_HANDLER DMA2_Stream3_IRQHandler |
|
|
|
#else |
|
|
|
#else |
|
|
|
#error "Unknown STM32 architecture." |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
|
|
|
|
extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); } |
|
|
|
extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); } |
|
|
|
extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); } |
|
|
|
extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); } |
|
|
|
|
|
|
|
#endif // !USBD_USE_CDC_COMPOSITE
|
|
|
|
#endif // SDIO_SUPPORT
|
|
|
|
#endif // ARDUINO_ARCH_STM32 && !STM32GENERIC && !MAPLE_STM32F1
|
|
|
|