Sergey
3 years ago
16 changed files with 12492 additions and 233 deletions
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/**
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MKS Robin Nano |
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U5 W25Q64BV, 16K SERIAL EEPROM: |
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*/ |
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#include "../../inc/MarlinConfig.h" |
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#if ENABLED(SPI_EEPROM_W25Q) |
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#include "../../libs/W25Qxx.h" |
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//W25QXXFlash W25QXX;
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uint8_t spi_eeprom[MARLIN_EEPROM_SIZE]; |
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void eeprom_test(void); |
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void eeprom_init(void){ |
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DEBUG("Start EEPROM"); |
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W25QXX.init(SPI_EIGHTH_SPEED); |
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//eeprom_test();
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET,MARLIN_EEPROM_SIZE); |
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} |
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void eeprom_hw_deinit(void){ |
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DEBUG("Finish EEPROM"); |
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W25QXX.SPI_FLASH_WriteEnable(); |
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W25QXX.SPI_FLASH_SectorErase(SPI_EEPROM_OFFSET); |
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//write
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W25QXX.SPI_FLASH_BufferWrite((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET,MARLIN_EEPROM_SIZE); |
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} |
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void eeprom_write_byte(uint8_t *pos, unsigned char value){ |
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uint16_t addr=(unsigned)pos; |
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if(addr < MARLIN_EEPROM_SIZE){ |
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spi_eeprom[addr]=value; |
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}else{ |
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ERROR("Write out of SPI size: %d %d",addr,MARLIN_EEPROM_SIZE); |
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} |
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} |
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uint8_t eeprom_read_byte(uint8_t *pos) { |
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uint16_t addr=(unsigned)pos; |
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if(addr < MARLIN_EEPROM_SIZE){ |
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return spi_eeprom[addr]; |
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}else{ |
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ERROR("Read out of SPI size: %d %d",addr,MARLIN_EEPROM_SIZE); |
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return 0; |
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} |
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} |
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void eeprom_read_block(void *__dst, const void *__src, size_t __n){ |
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ERROR("Call to missing function"); |
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}; |
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void eeprom_update_block(const void *__src, void *__dst, size_t __n){ |
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ERROR("Call to missing function"); |
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}; |
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void eeprom_test(void){ |
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DEBUG("SPI Flash ID %0X",W25QXX.W25QXX_ReadID()); |
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DEBUG("Read FLASH:"); |
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for(uint32_t i=0; i < 50 ; ){ |
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memset(spi_eeprom,0,10); |
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10); |
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]); |
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i=i+10; |
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} |
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DEBUG("Erase flash"); |
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W25QXX.SPI_FLASH_WriteEnable(); |
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W25QXX.SPI_FLASH_SectorErase(SPI_EEPROM_OFFSET); |
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DEBUG("Read FLASH:"); |
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for(uint32_t i=0; i < 50 ; ){ |
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memset(spi_eeprom,0,10); |
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10); |
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]); |
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i=i+10; |
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} |
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DEBUG("Read/write FLASH:"); |
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for(uint32_t i=0; i < 50 ; ){ |
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memset(spi_eeprom,0x0B,10); |
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W25QXX.SPI_FLASH_WriteEnable(); |
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W25QXX.SPI_FLASH_BufferWrite((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10); |
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10); |
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]); |
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i=i+10; |
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} |
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} |
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#endif // SPI_EEPROM_W25Q
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@ -0,0 +1,164 @@ |
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#include "mks_wifi_hal_f1.h" |
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#include "../../libs/Segger/log.h" |
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#ifdef STM32F1 |
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#ifdef MAPLE_STM32F1 |
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#include "stm32f103xe.h" |
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#else |
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#include "../../MarlinCore.h" |
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#endif |
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volatile unsigned char *buff; |
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volatile unsigned char buffer_ready; |
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volatile unsigned char dma_stopped; |
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volatile __attribute__ ((aligned (4))) unsigned int *dma_buff[2]; |
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volatile unsigned char dma_buff_index=0; |
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void mks_wifi_hw_prepare(unsigned int buf, unsigned int count){ |
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//На время передачи отключение systick
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; |
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//Отключение тактирования не используемых блоков
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RCC->APB1ENR &= ~(RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN); |
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RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN); |
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN; |
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RCC->AHBENR &= ~(RCC_AHBENR_FSMCEN); |
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//Максимальная частота в режиме out
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GPIOC->CRL |= GPIO_CRL_MODE7; |
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GPIOC->CRL &= ~GPIO_CRL_CNF7; |
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RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST; |
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RCC->APB2RSTR &= ~RCC_APB2RSTR_USART1RST; |
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USART1->CR1 = USART_CR1_UE; |
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USART1->BRR = 0x25; |
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USART1->CR2 = 0; |
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USART1->CR3 = USART_CR3_DMAR; |
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USART1->SR = 0; |
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USART1->CR1 |= USART_CR1_RE; |
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DMA1_Channel5->CCR = DMA_CONF; |
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DMA1_Channel5->CPAR = (uint32_t)&USART1->DR; |
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DMA1_Channel5->CMAR = (uint32_t)buf; //dma_buff[dma_buff_index];
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DMA1_Channel5->CNDTR = count; //ESP_PACKET_SIZE;
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DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5; |
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DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN; |
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NVIC_EnableIRQ(DMA1_Channel5_IRQn); |
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// DEBUG("Start DMA %0X / %d",buf, count);
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// DEBUG("CCRR %0X",DMA1_Channel5->CCR);
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// DEBUG("CMAR %0X",DMA1_Channel5->CMAR);
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// DEBUG("CPAR %0X",DMA1_Channel5->CPAR);
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// DEBUG("NDTR %0X",DMA1_Channel5->CNDTR);
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// DEBUG("IFC %0X",DMA1->IFCR);
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// DEBUG("USART CR1 %0X",USART1->CR1);
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// DEBUG("CR2 %0X",USART1->CR2);
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// DEBUG("CR3 %0X",USART1->CR3);
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// DEBUG("BRR %0X",USART1->BRR);
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// DEBUG("SR %0X",USART1->SR);
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} |
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void mks_wifi_hw_restore(void){ |
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//Включение обратно переферии
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SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; |
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RCC->APB1ENR |= (RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN); |
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RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN); |
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; |
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RCC->AHBENR |= (RCC_AHBENR_FSMCEN); |
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} |
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void mks_wifi_disable_dma(void){ |
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DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5; |
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DMA1_Channel5->CCR = 0; |
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NVIC_DisableIRQ(DMA1_Channel5_IRQn); |
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} |
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void mks_wifi_empty_uart(void){ |
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while(USART1->SR & USART_SR_RXNE){ |
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(void)USART1->DR; |
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}; |
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} |
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void wd_reset(void){ |
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#ifdef MAPLE_STM32F1 |
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IWDG->KR = 0xAAAA; |
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#else |
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HAL_watchdog_refresh(); |
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#endif |
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} |
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#ifdef MAPLE_STM32F1 |
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extern "C" void __irq_dma1_channel5(void) { |
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#else |
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extern "C" void DMA1_Channel5_IRQHandler(void){ |
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#endif |
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if(DMA1->ISR & DMA_ISR_TEIF5){ |
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DEBUG("DMA Error"); |
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dma_stopped = 2; |
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DMA1->IFCR = DMA_CLEAR; |
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return; |
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} |
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if(buffer_ready > 0){ |
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GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
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dma_stopped=1; |
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}; |
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DMA1->IFCR = DMA_CLEAR; |
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//Указатель на полученный буфер
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buff=(unsigned char*)dma_buff[dma_buff_index]; |
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//переключить индекс
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dma_buff_index = (dma_buff_index) ? 0 : 1; |
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DMA1_Channel5->CCR = DMA_CONF; |
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DMA1_Channel5->CMAR = (uint32_t)dma_buff[dma_buff_index]; |
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DMA1_Channel5->CNDTR = ESP_PACKET_SIZE; |
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DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN; |
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++buffer_ready; |
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} |
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void mks_wifi_sys_rst(void){ |
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#ifdef MAPLE_STM32F1 |
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asm volatile ("dsb 0xF":::"memory"); |
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SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)|(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk)|SCB_AIRCR_SYSRESETREQ_Msk); |
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asm volatile ("dsb 0xF":::"memory"); |
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while(1); |
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#else |
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NVIC_SystemReset(); |
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#endif |
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}; |
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#ifdef MAPLE_STM32F1 |
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#define __NVIC_PRIO_BITS 4U |
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void NVIC_SetPriority(int IRQn, unsigned int priority){ |
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if ((int)(IRQn) < 0){ |
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SCB->SHP[(((unsigned int)(int)IRQn) & 0xFUL)-4UL] = (unsigned char)((priority << (8U - __NVIC_PRIO_BITS)) & (unsigned int)0xFFUL); |
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}else{ |
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NVIC->IP[((unsigned int)(int)IRQn)] = (unsigned char)((priority << (8U - __NVIC_PRIO_BITS)) & (unsigned int)0xFFUL); |
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} |
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} |
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void NVIC_EnableIRQ(int IRQn){ |
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NVIC->ISER[(((unsigned int)(int)IRQn) >> 5UL)] = (unsigned int)(1UL << (((unsigned int)(int)IRQn) & 0x1FUL)); |
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} |
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void NVIC_DisableIRQ(int IRQn){ |
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NVIC->ICER[(((unsigned int)(int)IRQn) >> 5UL)] = (unsigned int)(1UL << (((unsigned int)(int)IRQn) & 0x1FUL)); |
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} |
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#endif |
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#endif |
@ -0,0 +1,23 @@ |
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#ifndef MKS_WIFI_HAL_F1_H |
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#define MKS_WIFI_HAL_F1_H |
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#define DMA_TIMEOUT 0x1ffffff |
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#define ESP_PACKET_SIZE 1024 |
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#define DMA_CONF (unsigned int)(DMA_CCR_PL|DMA_CCR_MINC|DMA_CCR_TEIE|DMA_CCR_TCIE) |
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#define DMA_CLEAR (unsigned int)(DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5) |
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void mks_wifi_hw_prepare(unsigned int buf, unsigned int count); |
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void mks_wifi_empty_uart(void); |
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void mks_wifi_hw_restore(void); |
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void mks_wifi_disable_dma(void); |
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void mks_wifi_sys_rst(void); |
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void wd_reset(void); |
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#ifdef MAPLE_STM32F1 |
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void NVIC_SetPriority(int IRQn, unsigned int priority); |
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void NVIC_EnableIRQ(int IRQn); |
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void NVIC_DisableIRQ(int IRQn); |
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#endif |
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#endif |
@ -0,0 +1,98 @@ |
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#include "mks_wifi_hal_f4.h" |
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#ifdef STM32F4 |
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volatile unsigned char *buff; |
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volatile unsigned char buffer_ready; |
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volatile unsigned char dma_stopped; |
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volatile __attribute__ ((aligned (4))) unsigned int *dma_buff[2]; |
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volatile unsigned char dma_buff_index=0; |
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void mks_wifi_hw_prepare(unsigned int buf, unsigned int count){ |
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//На время передачи отключение systick
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; |
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RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN; |
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM10EN; |
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RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST; |
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RCC->APB2RSTR &= ~RCC_APB2RSTR_USART1RST; |
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USART1->CR1 = USART_CR1_UE; |
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USART1->CR1 = USART_CR1_TE | USART_CR1_UE; |
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USART1->BRR = (uint32_t)(84000000+1958400/2)/1958400; |
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USART1->CR2 = 0; |
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USART1->CR3 = USART_CR3_DMAR; |
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USART1->SR = 0; |
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USART1->CR1 |= USART_CR1_RE; |
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DMA2_Stream5->CR = 0; |
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DMA2->HIFCR=DMA_S5_CLEAR; |
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DMA2_Stream5->PAR = (uint32_t)&USART1->DR; |
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DMA2_Stream5->M0AR = (uint32_t)buf; |
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DMA2_Stream5->NDTR = count; |
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DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN; |
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NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
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}; |
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void mks_wifi_disable_dma(void){ |
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DMA2->HIFCR=DMA_S5_CLEAR; |
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DMA2_Stream5->CR = 0; |
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} |
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void mks_wifi_empty_uart(void){ |
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while(USART1->SR & USART_SR_RXNE){ |
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(void)USART1->DR; |
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}; |
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} |
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void wd_reset(void){ |
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HAL_watchdog_refresh(); |
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} |
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void mks_wifi_hw_restore(void){ |
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RCC->APB1ENR |= RCC_APB1ENR_TIM5EN; |
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RCC->APB2ENR |= RCC_APB2ENR_TIM10EN; |
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SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; |
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} |
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void mks_wifi_sys_rst(void){ |
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NVIC_SystemReset(); |
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}; |
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extern "C" void DMA2_Stream5_IRQHandler(void){ |
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if(DMA2->HISR & DMA_HISR_TEIF5){ |
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DEBUG("DMA Error"); |
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dma_stopped = 2; |
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DMA2->HIFCR=DMA_S5_CLEAR; |
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return; |
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} |
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if(buffer_ready > 0){ |
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GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
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dma_stopped=1; |
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}; |
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DMA2->HIFCR=DMA_S5_CLEAR; |
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//Указатель на полученный буфер
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buff=(unsigned char*)dma_buff[dma_buff_index]; |
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//переключить индекс
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dma_buff_index = (dma_buff_index) ? 0 : 1; |
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DMA2_Stream5->CR = DMA_CONF; |
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DMA2_Stream5->M0AR = (uint32_t)dma_buff[dma_buff_index]; |
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DMA2_Stream5->NDTR = ESP_PACKET_SIZE; |
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DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN; |
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++buffer_ready; |
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} |
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#endif |
@ -0,0 +1,34 @@ |
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#ifndef MKS_WIFI_HAL_F4_H |
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#define MKS_WIFI_HAL_F4_H |
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#include "../../MarlinCore.h" |
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#define DMA_TIMEOUT 0x1ffffff |
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#define ESP_PACKET_SIZE 1024 |
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#define DMA_CONF ((uint32_t)( (0x04 << DMA_SxCR_CHSEL_Pos) | \ |
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(0x00 << DMA_SxCR_MBURST_Pos)| \ |
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(0x00 << DMA_SxCR_PBURST_Pos)| \ |
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(0x00 << DMA_SxCR_DBM_Pos) | \ |
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(0x00 << DMA_SxCR_PL_Pos) | \ |
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(0x00 << DMA_SxCR_PINCOS_Pos)| \ |
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(0x00 << DMA_SxCR_MSIZE_Pos) | \ |
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(0x00 << DMA_SxCR_PSIZE_Pos) | \ |
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(0x01 << DMA_SxCR_MINC_Pos) | \ |
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(0x00 << DMA_SxCR_PINC_Pos) | \ |
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(0x00 << DMA_SxCR_CIRC_Pos) | \ |
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(0x01 << DMA_SxCR_TCIE_Pos) | \ |
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(0x01 << DMA_SxCR_TEIE_Pos) | \ |
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(0x00 << DMA_SxCR_PFCTRL_Pos))) |
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#define DMA_S5_CLEAR (uint32_t)(DMA_HIFCR_CTCIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 | DMA_HIFCR_CHTIF5) |
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void mks_wifi_hw_prepare(unsigned int buf, unsigned int count); |
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void mks_wifi_hw_restore(void); |
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void mks_wifi_sys_rst(void); |
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void wd_reset(void); |
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void mks_wifi_empty_uart(void); |
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void mks_wifi_disable_dma(void); |
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#endif |
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