Libmaple support for stm32f103
This commit is contained in:
@@ -97,6 +97,7 @@
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// Choose the name from boards.h that matches your setup
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#ifndef MOTHERBOARD
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#define MOTHERBOARD BOARD_MKS_ROBIN_NANO
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// #define MOTHERBOARD BOARD_MKS_ROBIN_NANO_V1_3_F4
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#endif
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/**
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99
Marlin/src/HAL/STM32F1/eeprom_spi_w25q.cpp
Normal file
99
Marlin/src/HAL/STM32F1/eeprom_spi_w25q.cpp
Normal file
@@ -0,0 +1,99 @@
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/**
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MKS Robin Nano
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U5 W25Q64BV, 16K SERIAL EEPROM:
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*/
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#include "../../inc/MarlinConfig.h"
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#if ENABLED(SPI_EEPROM_W25Q)
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#include "../../libs/W25Qxx.h"
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//W25QXXFlash W25QXX;
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uint8_t spi_eeprom[MARLIN_EEPROM_SIZE];
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void eeprom_test(void);
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void eeprom_init(void){
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DEBUG("Start EEPROM");
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W25QXX.init(SPI_EIGHTH_SPEED);
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//eeprom_test();
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET,MARLIN_EEPROM_SIZE);
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}
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void eeprom_hw_deinit(void){
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DEBUG("Finish EEPROM");
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W25QXX.SPI_FLASH_WriteEnable();
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W25QXX.SPI_FLASH_SectorErase(SPI_EEPROM_OFFSET);
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//write
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W25QXX.SPI_FLASH_BufferWrite((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET,MARLIN_EEPROM_SIZE);
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}
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void eeprom_write_byte(uint8_t *pos, unsigned char value){
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uint16_t addr=(unsigned)pos;
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if(addr < MARLIN_EEPROM_SIZE){
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spi_eeprom[addr]=value;
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}else{
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ERROR("Write out of SPI size: %d %d",addr,MARLIN_EEPROM_SIZE);
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}
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}
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uint8_t eeprom_read_byte(uint8_t *pos) {
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uint16_t addr=(unsigned)pos;
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if(addr < MARLIN_EEPROM_SIZE){
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return spi_eeprom[addr];
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}else{
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ERROR("Read out of SPI size: %d %d",addr,MARLIN_EEPROM_SIZE);
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return 0;
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}
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}
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void eeprom_read_block(void *__dst, const void *__src, size_t __n){
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ERROR("Call to missing function");
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};
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void eeprom_update_block(const void *__src, void *__dst, size_t __n){
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ERROR("Call to missing function");
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};
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void eeprom_test(void){
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DEBUG("SPI Flash ID %0X",W25QXX.W25QXX_ReadID());
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DEBUG("Read FLASH:");
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for(uint32_t i=0; i < 50 ; ){
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memset(spi_eeprom,0,10);
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10);
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]);
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i=i+10;
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}
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DEBUG("Erase flash");
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W25QXX.SPI_FLASH_WriteEnable();
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W25QXX.SPI_FLASH_SectorErase(SPI_EEPROM_OFFSET);
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DEBUG("Read FLASH:");
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for(uint32_t i=0; i < 50 ; ){
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memset(spi_eeprom,0,10);
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10);
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]);
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i=i+10;
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}
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DEBUG("Read/write FLASH:");
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for(uint32_t i=0; i < 50 ; ){
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memset(spi_eeprom,0x0B,10);
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W25QXX.SPI_FLASH_WriteEnable();
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W25QXX.SPI_FLASH_BufferWrite((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10);
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W25QXX.SPI_FLASH_BufferRead((uint8_t *)spi_eeprom,SPI_EEPROM_OFFSET+i,10);
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DEBUG("%d %0X %0X %0X %0X %0X %0X %0X %0X %0X %0X",i,spi_eeprom[0],spi_eeprom[1],spi_eeprom[2],spi_eeprom[3],spi_eeprom[4],spi_eeprom[5],spi_eeprom[6],spi_eeprom[7],spi_eeprom[8],spi_eeprom[9]);
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i=i+10;
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}
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}
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#endif // SPI_EEPROM_W25Q
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@@ -38,7 +38,12 @@
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#endif
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size_t PersistentStore::capacity() { return MARLIN_EEPROM_SIZE; }
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bool PersistentStore::access_finish() { return true; }
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bool PersistentStore::access_finish() {
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#if ENABLED(EEPROM_W25Q)
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eeprom_hw_deinit();
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#endif
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return true;
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}
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bool PersistentStore::access_start() {
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eeprom_init();
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@@ -13,7 +13,7 @@
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#ifdef __STM32F1__
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#if DISABLED(MKS_WIFI)
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#if 0
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#include "../../inc/MarlinConfig.h"
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@@ -1,6 +1,12 @@
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#include "sdio_driver_f1.h"
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#ifdef MKS_WIFI
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//#ifdef MKS_WIFI
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#ifdef STM32F1
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#ifdef MAPLE_STM32F1
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#include "../../module/mks_wifi/stm32f103xe.h"
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#endif
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#include "sdio_driver_f1.h"
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#include "../../libs/Segger/log.h"
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volatile SDCard_TypeDef SDCard;
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volatile SD_Status_TypeDef SDStatus;
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@@ -297,5 +303,5 @@ void SD_parse_CSD(uint32_t* reg){
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SDCard.Capacity=(tmp+1)*512;
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};
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#endif
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//#endif
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#endif
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@@ -1,11 +1,13 @@
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#ifndef SDIO_DRIVER_H
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#define SDIO_DRIVER_H
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#include "../../module/mks_wifi/mks_wifi.h"
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#ifdef MKS_WIFI
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#ifdef STM32F1
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#ifndef MAPLE_STM32F1
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#include "../../module/mks_wifi/mks_wifi.h"
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#endif
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// SD card description
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typedef struct {
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uint32_t Capacity; // Card capacity (MBytes for SDHC/SDXC, bytes otherwise)
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@@ -156,7 +158,5 @@ uint32_t SD_transfer(uint8_t *buf, uint32_t blk, uint32_t cnt, uint32_t dir);
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uint8_t SD_Init(void);
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//void SDIO_Config(void);
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#endif
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#endif
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#endif
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@@ -133,7 +133,7 @@ uint8_t mks_wifi_input(uint8_t data){
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packet_index=0;
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memset((uint8_t*)mks_in_buffer,0,MKS_IN_BUFF_SIZE);
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}else if(!packet_start_flag){
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DEBUG("Byte not in packet %0X",data);
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DEBUG("Byte not in packet %0X - [%c]",data,data);
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return 1;
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}
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@@ -186,23 +186,6 @@ uint8_t mks_wifi_input(uint8_t data){
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packet_index=0;
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}
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/* Если в пакете G-Сode, отдаем payload дальше в обработчик марлина */
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// if((packet_type == ESP_TYPE_GCODE) &&
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// (packet_index >= 4) &&
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// (packet_index < payload_size+5)
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// ){
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// if(!check_char_allowed(data)){
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// ret_val=0;
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// }else{
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// ERROR("Char not allowed: %0X %c",data,data);
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// packet_start_flag=0;
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// packet_index=0;
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// return 1;
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// }
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// }
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if(packet_start_flag){
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packet_index++;
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}
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@@ -298,8 +281,6 @@ void mks_wifi_parse_packet(ESP_PROTOC_FRAME *packet){
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case ESP_TYPE_GCODE:
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char gcode_cmd[50];
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uint32_t cmd_index;
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// packet->data[packet->dataLen] = 0;
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// DEBUG("Gcode packet: %s",packet->data);
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cmd_index = 0;
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memset(gcode_cmd,0,50);
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@@ -312,10 +293,7 @@ void mks_wifi_parse_packet(ESP_PROTOC_FRAME *packet){
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cmd_index = 0;
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memset(gcode_cmd,0,50);
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}
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}
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break;
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case ESP_TYPE_FILE_FIRST:
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DEBUG("[FILE_FIRST]");
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@@ -344,8 +322,6 @@ void mks_wifi_parse_packet(ESP_PROTOC_FRAME *packet){
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}
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uint16_t mks_wifi_build_packet(uint8_t *packet, ESP_PROTOC_FRAME *esp_frame){
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uint16_t packet_size=0;
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@@ -381,10 +357,12 @@ void mks_wifi_send(uint8_t *packet, uint16_t size){
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for( uint32_t i=0; i < (uint32_t)(size+1); i++){
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while(MYSERIAL2.availableForWrite()==0){
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safe_delay(10);
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safe_delay(10);
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}
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MYSERIAL2.write(packet[i]);
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}
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safe_delay(5);
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}
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#else
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void mks_wifi_out_add(uint8_t *data, uint32_t size){
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@@ -3,14 +3,10 @@
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#include "../../module/printcounter.h"
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#include "../../libs/duration_t.h"
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const uint8_t pak[5]={0xA5,0x07,0x00,0x00,0xFC};
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const char m997_idle[]="M997 IDLE\n";
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const char m997_printing[]="M997 PRINTING\n";
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const char m997_pause[]="M997 PAUSE\n";
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const char m115_firmware[]="FIRMWARE_NAME:TFT24\n";
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void mks_m991(void){
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164
Marlin/src/module/mks_wifi/mks_wifi_hal_f1.cpp
Normal file
164
Marlin/src/module/mks_wifi/mks_wifi_hal_f1.cpp
Normal file
@@ -0,0 +1,164 @@
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#include "mks_wifi_hal_f1.h"
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#include "../../libs/Segger/log.h"
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#ifdef STM32F1
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#ifdef MAPLE_STM32F1
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#include "stm32f103xe.h"
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#else
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#include "../../MarlinCore.h"
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#endif
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volatile unsigned char *buff;
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volatile unsigned char buffer_ready;
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volatile unsigned char dma_stopped;
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volatile __attribute__ ((aligned (4))) unsigned int *dma_buff[2];
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volatile unsigned char dma_buff_index=0;
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void mks_wifi_hw_prepare(unsigned int buf, unsigned int count){
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//На время передачи отключение systick
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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//Отключение тактирования не используемых блоков
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RCC->APB1ENR &= ~(RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN);
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RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN);
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
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RCC->AHBENR &= ~(RCC_AHBENR_FSMCEN);
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//Максимальная частота в режиме out
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GPIOC->CRL |= GPIO_CRL_MODE7;
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GPIOC->CRL &= ~GPIO_CRL_CNF7;
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RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST;
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RCC->APB2RSTR &= ~RCC_APB2RSTR_USART1RST;
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USART1->CR1 = USART_CR1_UE;
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USART1->BRR = 0x25;
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USART1->CR2 = 0;
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USART1->CR3 = USART_CR3_DMAR;
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USART1->SR = 0;
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USART1->CR1 |= USART_CR1_RE;
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DMA1_Channel5->CCR = DMA_CONF;
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DMA1_Channel5->CPAR = (uint32_t)&USART1->DR;
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DMA1_Channel5->CMAR = (uint32_t)buf; //dma_buff[dma_buff_index];
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DMA1_Channel5->CNDTR = count; //ESP_PACKET_SIZE;
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DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5;
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DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN;
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NVIC_EnableIRQ(DMA1_Channel5_IRQn);
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// DEBUG("Start DMA %0X / %d",buf, count);
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// DEBUG("CCRR %0X",DMA1_Channel5->CCR);
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// DEBUG("CMAR %0X",DMA1_Channel5->CMAR);
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// DEBUG("CPAR %0X",DMA1_Channel5->CPAR);
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// DEBUG("NDTR %0X",DMA1_Channel5->CNDTR);
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// DEBUG("IFC %0X",DMA1->IFCR);
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// DEBUG("USART CR1 %0X",USART1->CR1);
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// DEBUG("CR2 %0X",USART1->CR2);
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// DEBUG("CR3 %0X",USART1->CR3);
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// DEBUG("BRR %0X",USART1->BRR);
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// DEBUG("SR %0X",USART1->SR);
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}
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void mks_wifi_hw_restore(void){
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//Включение обратно переферии
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SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
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RCC->APB1ENR |= (RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN);
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RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN);
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
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RCC->AHBENR |= (RCC_AHBENR_FSMCEN);
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}
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void mks_wifi_disable_dma(void){
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DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5;
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DMA1_Channel5->CCR = 0;
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NVIC_DisableIRQ(DMA1_Channel5_IRQn);
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}
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void mks_wifi_empty_uart(void){
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while(USART1->SR & USART_SR_RXNE){
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(void)USART1->DR;
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};
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}
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void wd_reset(void){
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#ifdef MAPLE_STM32F1
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IWDG->KR = 0xAAAA;
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#else
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HAL_watchdog_refresh();
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#endif
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}
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#ifdef MAPLE_STM32F1
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extern "C" void __irq_dma1_channel5(void) {
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#else
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extern "C" void DMA1_Channel5_IRQHandler(void){
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#endif
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if(DMA1->ISR & DMA_ISR_TEIF5){
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DEBUG("DMA Error");
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dma_stopped = 2;
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DMA1->IFCR = DMA_CLEAR;
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return;
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}
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if(buffer_ready > 0){
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GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
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dma_stopped=1;
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};
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DMA1->IFCR = DMA_CLEAR;
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//Указатель на полученный буфер
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buff=(unsigned char*)dma_buff[dma_buff_index];
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//переключить индекс
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dma_buff_index = (dma_buff_index) ? 0 : 1;
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DMA1_Channel5->CCR = DMA_CONF;
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DMA1_Channel5->CMAR = (uint32_t)dma_buff[dma_buff_index];
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DMA1_Channel5->CNDTR = ESP_PACKET_SIZE;
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DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN;
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++buffer_ready;
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}
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void mks_wifi_sys_rst(void){
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#ifdef MAPLE_STM32F1
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asm volatile ("dsb 0xF":::"memory");
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SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)|(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk)|SCB_AIRCR_SYSRESETREQ_Msk);
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asm volatile ("dsb 0xF":::"memory");
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while(1);
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#else
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NVIC_SystemReset();
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#endif
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};
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#ifdef MAPLE_STM32F1
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#define __NVIC_PRIO_BITS 4U
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void NVIC_SetPriority(int IRQn, unsigned int priority){
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if ((int)(IRQn) < 0){
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SCB->SHP[(((unsigned int)(int)IRQn) & 0xFUL)-4UL] = (unsigned char)((priority << (8U - __NVIC_PRIO_BITS)) & (unsigned int)0xFFUL);
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}else{
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NVIC->IP[((unsigned int)(int)IRQn)] = (unsigned char)((priority << (8U - __NVIC_PRIO_BITS)) & (unsigned int)0xFFUL);
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}
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}
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void NVIC_EnableIRQ(int IRQn){
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NVIC->ISER[(((unsigned int)(int)IRQn) >> 5UL)] = (unsigned int)(1UL << (((unsigned int)(int)IRQn) & 0x1FUL));
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||||
}
|
||||
|
||||
void NVIC_DisableIRQ(int IRQn){
|
||||
NVIC->ICER[(((unsigned int)(int)IRQn) >> 5UL)] = (unsigned int)(1UL << (((unsigned int)(int)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
23
Marlin/src/module/mks_wifi/mks_wifi_hal_f1.h
Normal file
23
Marlin/src/module/mks_wifi/mks_wifi_hal_f1.h
Normal file
@@ -0,0 +1,23 @@
|
||||
#ifndef MKS_WIFI_HAL_F1_H
|
||||
#define MKS_WIFI_HAL_F1_H
|
||||
|
||||
#define DMA_TIMEOUT 0x1ffffff
|
||||
#define ESP_PACKET_SIZE 1024
|
||||
|
||||
#define DMA_CONF (unsigned int)(DMA_CCR_PL|DMA_CCR_MINC|DMA_CCR_TEIE|DMA_CCR_TCIE)
|
||||
#define DMA_CLEAR (unsigned int)(DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5)
|
||||
|
||||
void mks_wifi_hw_prepare(unsigned int buf, unsigned int count);
|
||||
void mks_wifi_empty_uart(void);
|
||||
void mks_wifi_hw_restore(void);
|
||||
void mks_wifi_disable_dma(void);
|
||||
void mks_wifi_sys_rst(void);
|
||||
void wd_reset(void);
|
||||
|
||||
#ifdef MAPLE_STM32F1
|
||||
void NVIC_SetPriority(int IRQn, unsigned int priority);
|
||||
void NVIC_EnableIRQ(int IRQn);
|
||||
void NVIC_DisableIRQ(int IRQn);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
98
Marlin/src/module/mks_wifi/mks_wifi_hal_f4.cpp
Normal file
98
Marlin/src/module/mks_wifi/mks_wifi_hal_f4.cpp
Normal file
@@ -0,0 +1,98 @@
|
||||
#include "mks_wifi_hal_f4.h"
|
||||
|
||||
#ifdef STM32F4
|
||||
volatile unsigned char *buff;
|
||||
volatile unsigned char buffer_ready;
|
||||
volatile unsigned char dma_stopped;
|
||||
|
||||
volatile __attribute__ ((aligned (4))) unsigned int *dma_buff[2];
|
||||
volatile unsigned char dma_buff_index=0;
|
||||
|
||||
|
||||
void mks_wifi_hw_prepare(unsigned int buf, unsigned int count){
|
||||
//На время передачи отключение systick
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
|
||||
RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN;
|
||||
RCC->APB2ENR &= ~RCC_APB2ENR_TIM10EN;
|
||||
|
||||
RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST;
|
||||
RCC->APB2RSTR &= ~RCC_APB2RSTR_USART1RST;
|
||||
|
||||
USART1->CR1 = USART_CR1_UE;
|
||||
USART1->CR1 = USART_CR1_TE | USART_CR1_UE;
|
||||
USART1->BRR = (uint32_t)(84000000+1958400/2)/1958400;
|
||||
USART1->CR2 = 0;
|
||||
USART1->CR3 = USART_CR3_DMAR;
|
||||
USART1->SR = 0;
|
||||
USART1->CR1 |= USART_CR1_RE;
|
||||
|
||||
DMA2_Stream5->CR = 0;
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
|
||||
DMA2_Stream5->PAR = (uint32_t)&USART1->DR;
|
||||
DMA2_Stream5->M0AR = (uint32_t)buf;
|
||||
DMA2_Stream5->NDTR = count;
|
||||
|
||||
DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN;
|
||||
|
||||
NVIC_EnableIRQ(DMA2_Stream5_IRQn);
|
||||
};
|
||||
|
||||
void mks_wifi_disable_dma(void){
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
DMA2_Stream5->CR = 0;
|
||||
}
|
||||
|
||||
void mks_wifi_empty_uart(void){
|
||||
while(USART1->SR & USART_SR_RXNE){
|
||||
(void)USART1->DR;
|
||||
};
|
||||
}
|
||||
|
||||
void wd_reset(void){
|
||||
HAL_watchdog_refresh();
|
||||
}
|
||||
|
||||
void mks_wifi_hw_restore(void){
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
|
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM10EN;
|
||||
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
void mks_wifi_sys_rst(void){
|
||||
NVIC_SystemReset();
|
||||
};
|
||||
|
||||
|
||||
extern "C" void DMA2_Stream5_IRQHandler(void){
|
||||
|
||||
if(DMA2->HISR & DMA_HISR_TEIF5){
|
||||
DEBUG("DMA Error");
|
||||
dma_stopped = 2;
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
return;
|
||||
}
|
||||
|
||||
if(buffer_ready > 0){
|
||||
GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
|
||||
dma_stopped=1;
|
||||
};
|
||||
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
//Указатель на полученный буфер
|
||||
buff=(unsigned char*)dma_buff[dma_buff_index];
|
||||
//переключить индекс
|
||||
dma_buff_index = (dma_buff_index) ? 0 : 1;
|
||||
|
||||
|
||||
DMA2_Stream5->CR = DMA_CONF;
|
||||
DMA2_Stream5->M0AR = (uint32_t)dma_buff[dma_buff_index];
|
||||
DMA2_Stream5->NDTR = ESP_PACKET_SIZE;
|
||||
DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN;
|
||||
|
||||
++buffer_ready;
|
||||
}
|
||||
|
||||
#endif
|
||||
34
Marlin/src/module/mks_wifi/mks_wifi_hal_f4.h
Normal file
34
Marlin/src/module/mks_wifi/mks_wifi_hal_f4.h
Normal file
@@ -0,0 +1,34 @@
|
||||
#ifndef MKS_WIFI_HAL_F4_H
|
||||
#define MKS_WIFI_HAL_F4_H
|
||||
|
||||
#include "../../MarlinCore.h"
|
||||
|
||||
#define DMA_TIMEOUT 0x1ffffff
|
||||
#define ESP_PACKET_SIZE 1024
|
||||
|
||||
#define DMA_CONF ((uint32_t)( (0x04 << DMA_SxCR_CHSEL_Pos) | \
|
||||
(0x00 << DMA_SxCR_MBURST_Pos)| \
|
||||
(0x00 << DMA_SxCR_PBURST_Pos)| \
|
||||
(0x00 << DMA_SxCR_DBM_Pos) | \
|
||||
(0x00 << DMA_SxCR_PL_Pos) | \
|
||||
(0x00 << DMA_SxCR_PINCOS_Pos)| \
|
||||
(0x00 << DMA_SxCR_MSIZE_Pos) | \
|
||||
(0x00 << DMA_SxCR_PSIZE_Pos) | \
|
||||
(0x01 << DMA_SxCR_MINC_Pos) | \
|
||||
(0x00 << DMA_SxCR_PINC_Pos) | \
|
||||
(0x00 << DMA_SxCR_CIRC_Pos) | \
|
||||
(0x01 << DMA_SxCR_TCIE_Pos) | \
|
||||
(0x01 << DMA_SxCR_TEIE_Pos) | \
|
||||
(0x00 << DMA_SxCR_PFCTRL_Pos)))
|
||||
|
||||
#define DMA_S5_CLEAR (uint32_t)(DMA_HIFCR_CTCIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 | DMA_HIFCR_CHTIF5)
|
||||
|
||||
|
||||
void mks_wifi_hw_prepare(unsigned int buf, unsigned int count);
|
||||
void mks_wifi_hw_restore(void);
|
||||
void mks_wifi_sys_rst(void);
|
||||
void wd_reset(void);
|
||||
void mks_wifi_empty_uart(void);
|
||||
void mks_wifi_disable_dma(void);
|
||||
|
||||
#endif
|
||||
@@ -6,10 +6,23 @@
|
||||
#include "../../libs/buzzer.h"
|
||||
#include "../temperature.h"
|
||||
#include "../../libs/fatfs/fatfs_shared.h"
|
||||
#include "uart.h"
|
||||
|
||||
#ifdef MKS_WIFI
|
||||
|
||||
#ifdef STM32F4
|
||||
#include "uart.h"
|
||||
#include "mks_wifi_hal_f4.h"
|
||||
#endif
|
||||
|
||||
#ifdef STM32F1
|
||||
#include "mks_wifi_hal_f1.h"
|
||||
|
||||
#ifndef MAPLE_STM32F1
|
||||
#include "uart.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if ENABLED(TFT_480x320) || ENABLED(TFT_480x320_SPI)
|
||||
#include "mks_wifi_ui.h"
|
||||
#endif
|
||||
@@ -18,12 +31,12 @@ volatile uint8_t *file_buff=shared_mem;
|
||||
volatile uint8_t *file_buff_pos;
|
||||
volatile uint16_t file_data_size;
|
||||
|
||||
volatile uint8_t *dma_buff[] = {file_buff+FILE_BUFFER_SIZE,file_buff+FILE_BUFFER_SIZE+ESP_PACKET_SIZE};
|
||||
volatile uint8_t dma_buff_index=0;
|
||||
volatile uint8_t *buff;
|
||||
extern volatile uint8_t *buff;
|
||||
extern volatile uint8_t buffer_ready;
|
||||
extern volatile uint8_t dma_stopped;
|
||||
|
||||
volatile uint8_t buffer_ready;
|
||||
volatile uint8_t dma_stopped;
|
||||
extern volatile uint8_t *dma_buff[2];
|
||||
extern volatile uint8_t dma_buff_index;
|
||||
|
||||
FIL upload_file;
|
||||
|
||||
@@ -107,7 +120,7 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
uint16_t in_sector;
|
||||
uint16_t last_sector;
|
||||
|
||||
volatile uint32_t dma_timeout;
|
||||
uint32_t dma_timeout;
|
||||
uint16_t data_size;
|
||||
int16_t save_bed,save_e0;
|
||||
|
||||
@@ -115,6 +128,10 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
uint8_t *data_packet;
|
||||
char file_name[100];
|
||||
|
||||
WRITE(MKS_WIFI_IO4, HIGH); //Остановить передачу от ESP
|
||||
|
||||
dma_buff[0] = file_buff+FILE_BUFFER_SIZE;
|
||||
dma_buff[1] = file_buff+FILE_BUFFER_SIZE+ESP_PACKET_SIZE;
|
||||
|
||||
save_bed=thermalManager.degTargetBed();
|
||||
save_e0=thermalManager.degTargetHotend(0);
|
||||
@@ -170,71 +187,17 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
dma_timeout = DMA_TIMEOUT; //Тайм-аут, на случай если передача зависла.
|
||||
last_sector = 0;
|
||||
buffer_ready = 0;
|
||||
|
||||
#ifdef STM32F1
|
||||
//Отключение тактирования не используемых блоков
|
||||
RCC->APB1ENR &= ~(RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN);
|
||||
RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN);
|
||||
RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
|
||||
RCC->AHBENR &= ~(RCC_AHBENR_FSMCEN);
|
||||
|
||||
//Максимальная частота в режиме out
|
||||
GPIOC->CRL |= GPIO_CRL_MODE7;
|
||||
GPIOC->CRL &= ~GPIO_CRL_CNF7;
|
||||
|
||||
DMA1_Channel5->CCR = DMA_CONF;
|
||||
DMA1_Channel5->CPAR = (uint32_t)&USART1->DR;
|
||||
DMA1_Channel5->CMAR = (uint32_t)dma_buff[dma_buff_index];
|
||||
DMA1_Channel5->CNDTR = ESP_PACKET_SIZE;
|
||||
DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5;
|
||||
DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN;
|
||||
|
||||
NVIC_EnableIRQ(DMA1_Channel5_IRQn);
|
||||
|
||||
USART1->CR1 = USART_CR1_UE;
|
||||
USART1->CR1 = USART_CR1_TE | USART_CR1_UE;
|
||||
USART1->BRR = 0x25;
|
||||
USART1->CR2 = 0;
|
||||
USART1->CR3 = USART_CR3_DMAR;
|
||||
USART1->SR = 0;
|
||||
USART1->CR1 |= USART_CR1_RE;
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
|
||||
RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN;
|
||||
RCC->APB2ENR &= ~RCC_APB2ENR_TIM10EN;
|
||||
|
||||
DMA2_Stream5->CR = 0;
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
|
||||
DMA2_Stream5->PAR = (uint32_t)&USART1->DR;
|
||||
DMA2_Stream5->M0AR = (uint32_t)dma_buff[dma_buff_index];
|
||||
DMA2_Stream5->NDTR = ESP_PACKET_SIZE;
|
||||
// delay(200);
|
||||
mks_wifi_empty_uart();
|
||||
mks_wifi_hw_prepare((unsigned int)dma_buff[dma_buff_index],ESP_PACKET_SIZE);
|
||||
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
|
||||
DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN;
|
||||
|
||||
NVIC_EnableIRQ(DMA2_Stream5_IRQn);
|
||||
|
||||
USART1->CR1 = USART_CR1_UE;
|
||||
USART1->CR1 = USART_CR1_TE | USART_CR1_UE;
|
||||
USART1->BRR = (uint32_t)(84000000+1958400/2)/1958400;
|
||||
USART1->CR2 = 0;
|
||||
USART1->CR3 = USART_CR3_DMAR;
|
||||
USART1->SR = 0;
|
||||
USART1->CR1 |= USART_CR1_RE;
|
||||
#endif
|
||||
|
||||
delay(200);
|
||||
(void)USART1->DR;
|
||||
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
DEBUG("DMA1 buff: %0X", dma_buff[0]);
|
||||
DEBUG("DMA2 buff: %0X", dma_buff[1]);
|
||||
DEBUG("File buff: %0X size %d (%0X)", file_buff, FILE_BUFFER_SIZE, FILE_BUFFER_SIZE);
|
||||
|
||||
//На время передачи отключение systick
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
|
||||
OUT_WRITE(FAN1_PIN,HIGH);
|
||||
OUT_WRITE(HEATER_0_PIN,LOW);
|
||||
@@ -245,6 +208,9 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
#endif
|
||||
|
||||
data_packet = 0;
|
||||
buffer_ready = 0;
|
||||
|
||||
WRITE(MKS_WIFI_IO4, LOW);
|
||||
|
||||
while(--dma_timeout > 0){
|
||||
|
||||
@@ -263,7 +229,7 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
|
||||
|
||||
if(*data_packet != ESP_PROTOC_HEAD){
|
||||
ERROR("Wrong packet head");
|
||||
ERROR("Wrong packet head %0X at %0X", *data_packet, data_packet);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -335,8 +301,8 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
|
||||
if((buffer_ready == 0) && (dma_stopped == 1)){
|
||||
DEBUG("Start");
|
||||
(void)USART1->SR;
|
||||
GPIOC->BSRR = GPIO_BSRR_BR7;
|
||||
mks_wifi_empty_uart();
|
||||
WRITE(MKS_WIFI_IO4, LOW);
|
||||
dma_stopped=0;
|
||||
}
|
||||
|
||||
@@ -346,63 +312,31 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
|
||||
dma_timeout = DMA_TIMEOUT;
|
||||
}else{
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef STM32F1
|
||||
//Включение обратно переферии
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
RCC->APB1ENR |= (RCC_APB1ENR_TIM5EN|RCC_APB1ENR_TIM4EN);
|
||||
RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN|RCC_APB1ENR_USART3EN);
|
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
|
||||
RCC->AHBENR |= (RCC_AHBENR_FSMCEN);
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
|
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM10EN;
|
||||
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
#endif
|
||||
mks_wifi_hw_restore();
|
||||
|
||||
if((dma_timeout == 0) || (dma_stopped == 2)) {
|
||||
#ifdef STM32F1
|
||||
DEBUG("DMA timeout, NDTR: %d",DMA1_Channel5->CNDTR);
|
||||
#endif
|
||||
#ifdef STM32F4
|
||||
DEBUG("DMA timeout, NDTR: %d",DMA2_Stream5->NDTR);
|
||||
#endif
|
||||
|
||||
DEBUG("SR: %0X",USART1->SR);
|
||||
//Restart ESP8266
|
||||
WRITE(MKS_WIFI_IO_RST, LOW);
|
||||
delay(200);
|
||||
WRITE(MKS_WIFI_IO_RST, HIGH);
|
||||
}
|
||||
|
||||
#ifdef STM32F1
|
||||
//Выключить DMA
|
||||
DMA1->IFCR = DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5;
|
||||
DMA1_Channel5->CCR = 0;
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
//Выключить DMA
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
DMA2_Stream5->CR = 0;
|
||||
#endif
|
||||
mks_wifi_disable_dma();
|
||||
|
||||
MYSERIAL2.begin(BAUDRATE_2);
|
||||
WRITE(MKS_WIFI_IO4, LOW); //Включить передачу от ESP
|
||||
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
|
||||
f_close((FIL *)&upload_file);
|
||||
DEBUG("File closed");
|
||||
|
||||
if( (file_size == file_inc_size) && (file_size == file_size_writen) ){
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
mks_wifi_sd_deinit();
|
||||
DEBUG("Remount SD");
|
||||
|
||||
@@ -414,13 +348,14 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
BUZZ(1000,260);
|
||||
|
||||
if(!strcmp(file_name,"0:/Robin_Nano35.bin")){
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
DEBUG("Firmware found, reboot");
|
||||
safe_delay(1000);
|
||||
NVIC_SystemReset();
|
||||
mks_wifi_sys_rst();
|
||||
|
||||
}
|
||||
}else{
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
#if ENABLED(TFT_480x320) || ENABLED(TFT_480x320_SPI)
|
||||
mks_end_transmit();
|
||||
#endif
|
||||
@@ -437,7 +372,7 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
DEBUG("Rename file %s",file_name);
|
||||
f_rename(file_name,"file_failed.gcode");
|
||||
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
mks_wifi_sd_deinit();
|
||||
DEBUG("Remount SD");
|
||||
|
||||
@@ -448,72 +383,14 @@ void mks_wifi_start_file_upload(ESP_PROTOC_FRAME *packet){
|
||||
BUZZ(436,392);
|
||||
}
|
||||
|
||||
WRITE(MKS_WIFI_IO4, LOW); //Включить передачу от ESP
|
||||
|
||||
TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
|
||||
TERN_(USE_WATCHDOG, wd_reset());
|
||||
thermalManager.setTargetBed(save_bed);
|
||||
thermalManager.setTargetHotend(save_e0,0);
|
||||
DEBUG("Restore thermal settings E0:%d Bed:%d",save_bed,save_e0);
|
||||
|
||||
}
|
||||
|
||||
#ifdef STM32F1
|
||||
extern "C" void DMA1_Channel5_IRQHandler(void){
|
||||
|
||||
if(DMA1->ISR & DMA_ISR_TEIF5){
|
||||
DEBUG("DMA Error");
|
||||
dma_stopped = 2;
|
||||
DMA1->IFCR = DMA_CLEAR;
|
||||
return;
|
||||
}
|
||||
|
||||
if(buffer_ready > 0){
|
||||
GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
|
||||
dma_stopped=1;
|
||||
};
|
||||
|
||||
DMA1->IFCR = DMA_CLEAR;
|
||||
//Указатель на полученный буфер
|
||||
buff=dma_buff[dma_buff_index];
|
||||
//переключить индекс
|
||||
dma_buff_index = (dma_buff_index) ? 0 : 1;
|
||||
|
||||
DMA1_Channel5->CCR = DMA_CONF;
|
||||
DMA1_Channel5->CMAR = (uint32_t)dma_buff[dma_buff_index];
|
||||
DMA1_Channel5->CNDTR = ESP_PACKET_SIZE;
|
||||
DMA1_Channel5->CCR = DMA_CONF|DMA_CCR_EN;
|
||||
++buffer_ready;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
extern "C" void DMA2_Stream5_IRQHandler(void){
|
||||
|
||||
if(DMA2->HISR & DMA_HISR_TEIF5){
|
||||
DEBUG("DMA Error");
|
||||
dma_stopped = 2;
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
return;
|
||||
}
|
||||
|
||||
if(buffer_ready > 0){
|
||||
GPIOC->BSRR = GPIO_BSRR_BS7; //остановить передачу от esp
|
||||
dma_stopped=1;
|
||||
};
|
||||
|
||||
DMA2->HIFCR=DMA_S5_CLEAR;
|
||||
//Указатель на полученный буфер
|
||||
buff=dma_buff[dma_buff_index];
|
||||
//переключить индекс
|
||||
dma_buff_index = (dma_buff_index) ? 0 : 1;
|
||||
|
||||
|
||||
DMA2_Stream5->CR = DMA_CONF;
|
||||
DMA2_Stream5->M0AR = (uint32_t)dma_buff[dma_buff_index];
|
||||
DMA2_Stream5->NDTR = ESP_PACKET_SIZE;
|
||||
DMA2_Stream5->CR = DMA_CONF|DMA_SxCR_EN;
|
||||
|
||||
++buffer_ready;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -11,30 +11,6 @@
|
||||
#define DMA_TIMEOUT 0x1ffffff
|
||||
#define ESP_PACKET_SIZE 1024
|
||||
|
||||
#ifdef STM32F1
|
||||
#define DMA_CONF (uint32_t)(DMA_CCR_PL|DMA_CCR_MINC|DMA_CCR_TEIE|DMA_CCR_TCIE)
|
||||
#define DMA_CLEAR (uint32_t)(DMA_IFCR_CGIF5|DMA_IFCR_CTEIF5|DMA_IFCR_CHTIF5|DMA_IFCR_CTCIF5)
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
#define DMA_CONF ((uint32_t)( (0x04 << DMA_SxCR_CHSEL_Pos) | \
|
||||
(0x00 << DMA_SxCR_MBURST_Pos)| \
|
||||
(0x00 << DMA_SxCR_PBURST_Pos)| \
|
||||
(0x00 << DMA_SxCR_DBM_Pos) | \
|
||||
(0x00 << DMA_SxCR_PL_Pos) | \
|
||||
(0x00 << DMA_SxCR_PINCOS_Pos)| \
|
||||
(0x00 << DMA_SxCR_MSIZE_Pos) | \
|
||||
(0x00 << DMA_SxCR_PSIZE_Pos) | \
|
||||
(0x01 << DMA_SxCR_MINC_Pos) | \
|
||||
(0x00 << DMA_SxCR_PINC_Pos) | \
|
||||
(0x00 << DMA_SxCR_CIRC_Pos) | \
|
||||
(0x01 << DMA_SxCR_TCIE_Pos) | \
|
||||
(0x01 << DMA_SxCR_TEIE_Pos) | \
|
||||
(0x00 << DMA_SxCR_PFCTRL_Pos)))
|
||||
|
||||
#define DMA_S5_CLEAR (uint32_t)(DMA_HIFCR_CTCIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 | DMA_HIFCR_CHTIF5)
|
||||
#endif
|
||||
|
||||
//Под буфер для DMA два последних КБ из буфера
|
||||
#define ESP_FILE_BUFF_COUNT (SHARED_MEM_1KB_COUNT-2)
|
||||
//Под буфер для записи в файл все оставшееся с начала
|
||||
|
||||
12001
Marlin/src/module/mks_wifi/stm32f103xe.h
Normal file
12001
Marlin/src/module/mks_wifi/stm32f103xe.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -14,6 +14,7 @@
|
||||
src_dir = Marlin
|
||||
boards_dir = buildroot/share/PlatformIO/boards
|
||||
#default_envs = mks_robin_nano_v1_3_f4
|
||||
#default_envs = mks_robin_nano35_maple
|
||||
default_envs = mks_robin_nano35
|
||||
include_dir = Marlin
|
||||
extra_configs =
|
||||
|
||||
Reference in New Issue
Block a user