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@ -41,7 +41,6 @@ |
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#include <U8glib.h> |
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#include <U8glib.h> |
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//set optimization so ARDUINO optimizes this file
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//set optimization so ARDUINO optimizes this file
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#pragma GCC push_options |
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#pragma GCC optimize (3) |
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#pragma GCC optimize (3) |
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#define DELAY_0_NOP ; |
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#define DELAY_0_NOP ; |
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@ -64,9 +63,9 @@ |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#endif |
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#endif |
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#ifndef ST7920_DELAY_3 |
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#ifndef ST7920_DELAY_3 |
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#define ST7920_DELAY_3 DELAY_2_NOP |
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#define ST7920_DELAY_3 DELAY_1_NOP |
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#endif |
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#endif |
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#elif MOTHERBOARD == BOARD_3DRAG |
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#elif (MOTHERBOARD == BOARD_3DRAG) || (MOTHERBOARD == BOARD_K8200) |
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#ifndef ST7920_DELAY_1 |
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#ifndef ST7920_DELAY_1 |
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#define ST7920_DELAY_1 DELAY_0_NOP |
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#define ST7920_DELAY_1 DELAY_0_NOP |
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#endif |
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#endif |
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@ -74,7 +73,7 @@ |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#endif |
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#endif |
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#ifndef ST7920_DELAY_3 |
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#ifndef ST7920_DELAY_3 |
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#define ST7920_DELAY_3 DELAY_2_NOP |
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#define ST7920_DELAY_3 DELAY_1_NOP |
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#endif |
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#endif |
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#elif F_CPU == 16000000 |
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#elif F_CPU == 16000000 |
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#ifndef ST7920_DELAY_1 |
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#ifndef ST7920_DELAY_1 |
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@ -84,7 +83,7 @@ |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#define ST7920_DELAY_2 DELAY_0_NOP |
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#endif |
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#endif |
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#ifndef ST7920_DELAY_3 |
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#ifndef ST7920_DELAY_3 |
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#define ST7920_DELAY_3 DELAY_2_NOP |
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#define ST7920_DELAY_3 DELAY_1_NOP |
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#endif |
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#endif |
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#else |
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#else |
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#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd.h'" |
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#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd.h'" |
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@ -94,63 +93,62 @@ static void ST7920_SWSPI_SND_8BIT(uint8_t val) { |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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val<<=1; |
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ST7920_DELAY_3 |
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ST7920_DELAY_3 |
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WRITE(ST7920_CLK_PIN,0); |
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WRITE(ST7920_CLK_PIN,0); |
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ST7920_DELAY_1 |
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ST7920_DELAY_1 |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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WRITE(ST7920_DAT_PIN,val&0x80); |
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val<<=1; |
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ST7920_DELAY_2 |
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ST7920_DELAY_2 |
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WRITE(ST7920_CLK_PIN,1); |
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WRITE(ST7920_CLK_PIN,1); |
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} |
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} |
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@ -234,7 +232,7 @@ class U8GLIB_ST7920_128X64_RRD : public U8GLIB { |
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U8GLIB_ST7920_128X64_RRD(uint8_t dummy) : U8GLIB(&u8g_dev_st7920_128x64_rrd_sw_spi) { UNUSED(dummy); } |
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U8GLIB_ST7920_128X64_RRD(uint8_t dummy) : U8GLIB(&u8g_dev_st7920_128x64_rrd_sw_spi) { UNUSED(dummy); } |
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}; |
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}; |
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#pragma GCC pop_options |
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#pragma GCC reset_options |
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#endif //U8GLIB_ST7920
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#endif //U8GLIB_ST7920
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#endif //ULCDST7920_H
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#endif //ULCDST7920_H
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