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Adjust some variants spacing, comments

vanilla_fb_2.0.x
Scott Lahteine 5 years ago
parent
df7250baa8
commit
3b87fc19e4
8 changed files with 132 additions and 126 deletions
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  1. 12
      buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c
  2. 38
      buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h
  3. 4
      buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c
  4. 38
      buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h
  5. 60
      buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h
  6. 20
      buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h
  7. 60
      buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h
  8. 26
      buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h

12
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c
View File

@ -123,12 +123,18 @@ const PinMap PinMap_PWM[] = {
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 FAN2 {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 FAN2
{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 EXTENSION1-4 {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 EXTENSION1-4
//probably unused on SKR-Pro. confirmation needed, please. /**
* Unused by specifications on BTT002. (PLEASE CONFIRM)
* Uncomment the corresponding line if you want to have HardwarePWM on some pins.
* WARNING: check timers' usage first to avoid conflicts.
* If you don't know what you're doing leave things as they are or you WILL break something (including hardware)
* If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you.
*/
//{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
//{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
//{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 is bltouch analog? //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 BLTOUCH is a "servo"
//{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
//{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 is bltouch analog? //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 BLTOUCH is a "servo"
//{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
//{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
//{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4

38
buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h
View File

@ -25,25 +25,25 @@
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_HS_ULPI_D0 = PA_3, USB_OTG_HS_ULPI_D0 = PA_3,
USB_OTG_HS_SOF = PA_4, USB_OTG_HS_SOF = PA_4,
USB_OTG_HS_ULPI_CK = PA_5, USB_OTG_HS_ULPI_CK = PA_5,
USB_OTG_HS_ULPI_D1 = PB_0, USB_OTG_HS_ULPI_D1 = PB_0,
USB_OTG_HS_ULPI_D2 = PB_1, USB_OTG_HS_ULPI_D2 = PB_1,
USB_OTG_HS_ULPI_D7 = PB_5, USB_OTG_HS_ULPI_D7 = PB_5,
USB_OTG_HS_ULPI_D3 = PB_10, USB_OTG_HS_ULPI_D3 = PB_10,
USB_OTG_HS_ULPI_D4 = PB_11, USB_OTG_HS_ULPI_D4 = PB_11,
USB_OTG_HS_ID = PB_12, USB_OTG_HS_ID = PB_12,
USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D5 = PB_12,
USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D6 = PB_13,
USB_OTG_HS_VBUS = PB_13, USB_OTG_HS_VBUS = PB_13,
USB_OTG_HS_DM = PB_14, USB_OTG_HS_DM = PB_14,
USB_OTG_HS_DP = PB_15, USB_OTG_HS_DP = PB_15,
USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_STP = PC_0,
USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_DIR = PC_2,
USB_OTG_HS_ULPI_NXT = PC_3, USB_OTG_HS_ULPI_NXT = PC_3,

4
buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c
View File

@ -152,8 +152,8 @@ const PinMap PinMap_PWM[] = {
*/ */
//{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
//{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 is bltouch analog? {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 BLTOUCH is a "servo"
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 is bltouch analog? {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 BLTOUCH is a "servo"
//{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
//{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
//{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1

38
buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h
View File

@ -25,25 +25,25 @@
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_HS_ULPI_D0 = PA_3, USB_OTG_HS_ULPI_D0 = PA_3,
USB_OTG_HS_SOF = PA_4, USB_OTG_HS_SOF = PA_4,
USB_OTG_HS_ULPI_CK = PA_5, USB_OTG_HS_ULPI_CK = PA_5,
USB_OTG_HS_ULPI_D1 = PB_0, USB_OTG_HS_ULPI_D1 = PB_0,
USB_OTG_HS_ULPI_D2 = PB_1, USB_OTG_HS_ULPI_D2 = PB_1,
USB_OTG_HS_ULPI_D7 = PB_5, USB_OTG_HS_ULPI_D7 = PB_5,
USB_OTG_HS_ULPI_D3 = PB_10, USB_OTG_HS_ULPI_D3 = PB_10,
USB_OTG_HS_ULPI_D4 = PB_11, USB_OTG_HS_ULPI_D4 = PB_11,
USB_OTG_HS_ID = PB_12, USB_OTG_HS_ID = PB_12,
USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D5 = PB_12,
USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D6 = PB_13,
USB_OTG_HS_VBUS = PB_13, USB_OTG_HS_VBUS = PB_13,
USB_OTG_HS_DM = PB_14, USB_OTG_HS_DM = PB_14,
USB_OTG_HS_DP = PB_15, USB_OTG_HS_DP = PB_15,
USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_STP = PC_0,
USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_DIR = PC_2,
USB_OTG_HS_ULPI_NXT = PC_3, USB_OTG_HS_ULPI_NXT = PC_3,

60
buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h
View File

@ -1,50 +1,50 @@
/* SYS_WKUP */ /* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1 #ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0, SYS_WKUP1 = PA_0,
#endif #endif
#ifdef PWR_WAKEUP_PIN2 #ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = NC, SYS_WKUP2 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN3 #ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = NC, SYS_WKUP3 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN4 #ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC, SYS_WKUP4 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN5 #ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC, SYS_WKUP5 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN6 #ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC, SYS_WKUP6 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN7 #ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC, SYS_WKUP7 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN8 #ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC, SYS_WKUP8 = NC,
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_HS_ULPI_D0 = PA_3, USB_OTG_HS_ULPI_D0 = PA_3,
USB_OTG_HS_SOF = PA_4, USB_OTG_HS_SOF = PA_4,
USB_OTG_HS_ULPI_CK = PA_5, USB_OTG_HS_ULPI_CK = PA_5,
USB_OTG_HS_ULPI_D1 = PB_0, USB_OTG_HS_ULPI_D1 = PB_0,
USB_OTG_HS_ULPI_D2 = PB_1, USB_OTG_HS_ULPI_D2 = PB_1,
USB_OTG_HS_ULPI_D7 = PB_5, USB_OTG_HS_ULPI_D7 = PB_5,
USB_OTG_HS_ULPI_D3 = PB_10, USB_OTG_HS_ULPI_D3 = PB_10,
USB_OTG_HS_ULPI_D4 = PB_11, USB_OTG_HS_ULPI_D4 = PB_11,
USB_OTG_HS_ID = PB_12, USB_OTG_HS_ID = PB_12,
USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D5 = PB_12,
USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D6 = PB_13,
USB_OTG_HS_VBUS = PB_13, USB_OTG_HS_VBUS = PB_13,
USB_OTG_HS_DM = PB_14, USB_OTG_HS_DM = PB_14,
USB_OTG_HS_DP = PB_15, USB_OTG_HS_DP = PB_15,
USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_STP = PC_0,
USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_DIR = PC_2,
USB_OTG_HS_ULPI_NXT = PC_3, USB_OTG_HS_ULPI_NXT = PC_3,
#endif #endif

20
buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h
View File

@ -1,30 +1,30 @@
/* SYS_WKUP */ /* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1 #ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ SYS_WKUP1 = PA_0, /* SYS_WKUP0 */
#endif #endif
#ifdef PWR_WAKEUP_PIN2 #ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = NC, SYS_WKUP2 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN3 #ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = NC, SYS_WKUP3 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN4 #ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC, SYS_WKUP4 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN5 #ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC, SYS_WKUP5 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN6 #ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC, SYS_WKUP6 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN7 #ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC, SYS_WKUP7 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN8 #ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC, SYS_WKUP8 = NC,
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
#endif #endif

60
buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h
View File

@ -1,50 +1,50 @@
/* SYS_WKUP */ /* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1 #ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0, SYS_WKUP1 = PA_0,
#endif #endif
#ifdef PWR_WAKEUP_PIN2 #ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = NC, SYS_WKUP2 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN3 #ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = NC, SYS_WKUP3 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN4 #ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC, SYS_WKUP4 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN5 #ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC, SYS_WKUP5 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN6 #ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC, SYS_WKUP6 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN7 #ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC, SYS_WKUP7 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN8 #ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC, SYS_WKUP8 = NC,
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_HS_ULPI_D0 = PA_3, USB_OTG_HS_ULPI_D0 = PA_3,
USB_OTG_HS_SOF = PA_4, USB_OTG_HS_SOF = PA_4,
USB_OTG_HS_ULPI_CK = PA_5, USB_OTG_HS_ULPI_CK = PA_5,
USB_OTG_HS_ULPI_D1 = PB_0, USB_OTG_HS_ULPI_D1 = PB_0,
USB_OTG_HS_ULPI_D2 = PB_1, USB_OTG_HS_ULPI_D2 = PB_1,
USB_OTG_HS_ULPI_D7 = PB_5, USB_OTG_HS_ULPI_D7 = PB_5,
USB_OTG_HS_ULPI_D3 = PB_10, USB_OTG_HS_ULPI_D3 = PB_10,
USB_OTG_HS_ULPI_D4 = PB_11, USB_OTG_HS_ULPI_D4 = PB_11,
USB_OTG_HS_ID = PB_12, USB_OTG_HS_ID = PB_12,
USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D5 = PB_12,
USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D6 = PB_13,
USB_OTG_HS_VBUS = PB_13, USB_OTG_HS_VBUS = PB_13,
USB_OTG_HS_DM = PB_14, USB_OTG_HS_DM = PB_14,
USB_OTG_HS_DP = PB_15, USB_OTG_HS_DP = PB_15,
USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_STP = PC_0,
USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_DIR = PC_2,
USB_OTG_HS_ULPI_NXT = PC_3, USB_OTG_HS_ULPI_NXT = PC_3,
#endif #endif

26
buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h
View File

@ -1,33 +1,33 @@
/* SYS_WKUP */ /* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1 #ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0, SYS_WKUP1 = PA_0,
#endif #endif
#ifdef PWR_WAKEUP_PIN2 #ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = NC, SYS_WKUP2 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN3 #ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = NC, SYS_WKUP3 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN4 #ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC, SYS_WKUP4 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN5 #ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC, SYS_WKUP5 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN6 #ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC, SYS_WKUP6 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN7 #ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC, SYS_WKUP7 = NC,
#endif #endif
#ifdef PWR_WAKEUP_PIN8 #ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC, SYS_WKUP8 = NC,
#endif #endif
/* USB */ /* USB */
#ifdef USBCON #ifdef USBCON
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
#endif #endif

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