From 3b87fc19e4ab1182d22b83197cb75a470f3123be Mon Sep 17 00:00:00 2001 From: Scott Lahteine Date: Sun, 10 May 2020 19:28:49 -0500 Subject: [PATCH] Adjust some variants spacing, comments --- .../variants/BIGTREE_BTT002/PeripheralPins.c | 12 +++- .../variants/BIGTREE_BTT002/PinNamesVar.h | 38 ++++++------ .../BIGTREE_SKR_PRO_1v1/PeripheralPins.c | 4 +- .../BIGTREE_SKR_PRO_1v1/PinNamesVar.h | 38 ++++++------ .../variants/FLY_F407ZG/PinNamesVar.h | 60 +++++++++---------- .../variants/FYSETC_S6/PinNamesVar.h | 20 +++---- .../variants/MARLIN_F407VE/PinNamesVar.h | 60 +++++++++---------- .../variants/STEVAL_F401VE/PinNamesVar.h | 26 ++++---- 8 files changed, 132 insertions(+), 126 deletions(-) diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c index 7f5ca78356..cff269db0b 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c @@ -123,12 +123,18 @@ const PinMap PinMap_PWM[] = { {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 FAN2 {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 EXTENSION1-4 - //probably unused on SKR-Pro. confirmation needed, please. + /** + * Unused by specifications on BTT002. (PLEASE CONFIRM) + * Uncomment the corresponding line if you want to have HardwarePWM on some pins. + * WARNING: check timers' usage first to avoid conflicts. + * If you don't know what you're doing leave things as they are or you WILL break something (including hardware) + * If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you. + */ //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 is bltouch analog? + //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 BLTOUCH is a "servo" //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 - //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 is bltouch analog? + //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 BLTOUCH is a "servo" //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h index 2424885937..b4bb9d45f8 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h @@ -25,25 +25,25 @@ #endif /* USB */ #ifdef USBCON - USB_OTG_FS_SOF = PA_8, - USB_OTG_FS_VBUS = PA_9, - USB_OTG_FS_ID = PA_10, - USB_OTG_FS_DM = PA_11, - USB_OTG_FS_DP = PA_12, - USB_OTG_HS_ULPI_D0 = PA_3, - USB_OTG_HS_SOF = PA_4, - USB_OTG_HS_ULPI_CK = PA_5, - USB_OTG_HS_ULPI_D1 = PB_0, - USB_OTG_HS_ULPI_D2 = PB_1, - USB_OTG_HS_ULPI_D7 = PB_5, - USB_OTG_HS_ULPI_D3 = PB_10, - USB_OTG_HS_ULPI_D4 = PB_11, - USB_OTG_HS_ID = PB_12, - USB_OTG_HS_ULPI_D5 = PB_12, - USB_OTG_HS_ULPI_D6 = PB_13, - USB_OTG_HS_VBUS = PB_13, - USB_OTG_HS_DM = PB_14, - USB_OTG_HS_DP = PB_15, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_VBUS = PB_13, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_NXT = PC_3, diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c index a772f64fb7..a28e712e0d 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c @@ -152,8 +152,8 @@ const PinMap PinMap_PWM[] = { */ //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 is bltouch analog? - {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 is bltouch analog? + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 BLTOUCH is a "servo" + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 BLTOUCH is a "servo" //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h index 2424885937..b4bb9d45f8 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h @@ -25,25 +25,25 @@ #endif /* USB */ #ifdef USBCON - USB_OTG_FS_SOF = PA_8, - USB_OTG_FS_VBUS = PA_9, - USB_OTG_FS_ID = PA_10, - USB_OTG_FS_DM = PA_11, - USB_OTG_FS_DP = PA_12, - USB_OTG_HS_ULPI_D0 = PA_3, - USB_OTG_HS_SOF = PA_4, - USB_OTG_HS_ULPI_CK = PA_5, - USB_OTG_HS_ULPI_D1 = PB_0, - USB_OTG_HS_ULPI_D2 = PB_1, - USB_OTG_HS_ULPI_D7 = PB_5, - USB_OTG_HS_ULPI_D3 = PB_10, - USB_OTG_HS_ULPI_D4 = PB_11, - USB_OTG_HS_ID = PB_12, - USB_OTG_HS_ULPI_D5 = PB_12, - USB_OTG_HS_ULPI_D6 = PB_13, - USB_OTG_HS_VBUS = PB_13, - USB_OTG_HS_DM = PB_14, - USB_OTG_HS_DP = PB_15, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_VBUS = PB_13, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_ULPI_DIR = PC_2, USB_OTG_HS_ULPI_NXT = PC_3, diff --git a/buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h b/buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h index f3c4f0ee07..b4bb9d45f8 100644 --- a/buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h @@ -1,50 +1,50 @@ /* SYS_WKUP */ #ifdef PWR_WAKEUP_PIN1 -SYS_WKUP1 = PA_0, + SYS_WKUP1 = PA_0, #endif #ifdef PWR_WAKEUP_PIN2 -SYS_WKUP2 = NC, + SYS_WKUP2 = NC, #endif #ifdef PWR_WAKEUP_PIN3 -SYS_WKUP3 = NC, + SYS_WKUP3 = NC, #endif #ifdef PWR_WAKEUP_PIN4 -SYS_WKUP4 = NC, + SYS_WKUP4 = NC, #endif #ifdef PWR_WAKEUP_PIN5 -SYS_WKUP5 = NC, + SYS_WKUP5 = NC, #endif #ifdef PWR_WAKEUP_PIN6 -SYS_WKUP6 = NC, + SYS_WKUP6 = NC, #endif #ifdef PWR_WAKEUP_PIN7 -SYS_WKUP7 = NC, + SYS_WKUP7 = NC, #endif #ifdef PWR_WAKEUP_PIN8 -SYS_WKUP8 = NC, + SYS_WKUP8 = NC, #endif /* USB */ #ifdef USBCON -USB_OTG_FS_SOF = PA_8, -USB_OTG_FS_VBUS = PA_9, -USB_OTG_FS_ID = PA_10, -USB_OTG_FS_DM = PA_11, -USB_OTG_FS_DP = PA_12, -USB_OTG_HS_ULPI_D0 = PA_3, -USB_OTG_HS_SOF = PA_4, -USB_OTG_HS_ULPI_CK = PA_5, -USB_OTG_HS_ULPI_D1 = PB_0, -USB_OTG_HS_ULPI_D2 = PB_1, -USB_OTG_HS_ULPI_D7 = PB_5, -USB_OTG_HS_ULPI_D3 = PB_10, -USB_OTG_HS_ULPI_D4 = PB_11, -USB_OTG_HS_ID = PB_12, -USB_OTG_HS_ULPI_D5 = PB_12, -USB_OTG_HS_ULPI_D6 = PB_13, -USB_OTG_HS_VBUS = PB_13, -USB_OTG_HS_DM = PB_14, -USB_OTG_HS_DP = PB_15, -USB_OTG_HS_ULPI_STP = PC_0, -USB_OTG_HS_ULPI_DIR = PC_2, -USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_VBUS = PB_13, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ULPI_STP = PC_0, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_NXT = PC_3, #endif diff --git a/buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h b/buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h index 77f1689b3d..bff3f21349 100644 --- a/buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/FYSETC_S6/PinNamesVar.h @@ -1,30 +1,30 @@ /* SYS_WKUP */ #ifdef PWR_WAKEUP_PIN1 -SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ + SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ #endif #ifdef PWR_WAKEUP_PIN2 -SYS_WKUP2 = NC, + SYS_WKUP2 = NC, #endif #ifdef PWR_WAKEUP_PIN3 -SYS_WKUP3 = NC, + SYS_WKUP3 = NC, #endif #ifdef PWR_WAKEUP_PIN4 -SYS_WKUP4 = NC, + SYS_WKUP4 = NC, #endif #ifdef PWR_WAKEUP_PIN5 -SYS_WKUP5 = NC, + SYS_WKUP5 = NC, #endif #ifdef PWR_WAKEUP_PIN6 -SYS_WKUP6 = NC, + SYS_WKUP6 = NC, #endif #ifdef PWR_WAKEUP_PIN7 -SYS_WKUP7 = NC, + SYS_WKUP7 = NC, #endif #ifdef PWR_WAKEUP_PIN8 -SYS_WKUP8 = NC, + SYS_WKUP8 = NC, #endif /* USB */ #ifdef USBCON -USB_OTG_FS_DM = PA_11, -USB_OTG_FS_DP = PA_12, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, #endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h index f3c4f0ee07..b4bb9d45f8 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h @@ -1,50 +1,50 @@ /* SYS_WKUP */ #ifdef PWR_WAKEUP_PIN1 -SYS_WKUP1 = PA_0, + SYS_WKUP1 = PA_0, #endif #ifdef PWR_WAKEUP_PIN2 -SYS_WKUP2 = NC, + SYS_WKUP2 = NC, #endif #ifdef PWR_WAKEUP_PIN3 -SYS_WKUP3 = NC, + SYS_WKUP3 = NC, #endif #ifdef PWR_WAKEUP_PIN4 -SYS_WKUP4 = NC, + SYS_WKUP4 = NC, #endif #ifdef PWR_WAKEUP_PIN5 -SYS_WKUP5 = NC, + SYS_WKUP5 = NC, #endif #ifdef PWR_WAKEUP_PIN6 -SYS_WKUP6 = NC, + SYS_WKUP6 = NC, #endif #ifdef PWR_WAKEUP_PIN7 -SYS_WKUP7 = NC, + SYS_WKUP7 = NC, #endif #ifdef PWR_WAKEUP_PIN8 -SYS_WKUP8 = NC, + SYS_WKUP8 = NC, #endif /* USB */ #ifdef USBCON -USB_OTG_FS_SOF = PA_8, -USB_OTG_FS_VBUS = PA_9, -USB_OTG_FS_ID = PA_10, -USB_OTG_FS_DM = PA_11, -USB_OTG_FS_DP = PA_12, -USB_OTG_HS_ULPI_D0 = PA_3, -USB_OTG_HS_SOF = PA_4, -USB_OTG_HS_ULPI_CK = PA_5, -USB_OTG_HS_ULPI_D1 = PB_0, -USB_OTG_HS_ULPI_D2 = PB_1, -USB_OTG_HS_ULPI_D7 = PB_5, -USB_OTG_HS_ULPI_D3 = PB_10, -USB_OTG_HS_ULPI_D4 = PB_11, -USB_OTG_HS_ID = PB_12, -USB_OTG_HS_ULPI_D5 = PB_12, -USB_OTG_HS_ULPI_D6 = PB_13, -USB_OTG_HS_VBUS = PB_13, -USB_OTG_HS_DM = PB_14, -USB_OTG_HS_DP = PB_15, -USB_OTG_HS_ULPI_STP = PC_0, -USB_OTG_HS_ULPI_DIR = PC_2, -USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_VBUS = PB_13, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ULPI_STP = PC_0, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_NXT = PC_3, #endif diff --git a/buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h b/buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h index 3082f8842a..6a1eb9b887 100644 --- a/buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h +++ b/buildroot/share/PlatformIO/variants/STEVAL_F401VE/PinNamesVar.h @@ -1,33 +1,33 @@ /* SYS_WKUP */ #ifdef PWR_WAKEUP_PIN1 -SYS_WKUP1 = PA_0, + SYS_WKUP1 = PA_0, #endif #ifdef PWR_WAKEUP_PIN2 -SYS_WKUP2 = NC, + SYS_WKUP2 = NC, #endif #ifdef PWR_WAKEUP_PIN3 -SYS_WKUP3 = NC, + SYS_WKUP3 = NC, #endif #ifdef PWR_WAKEUP_PIN4 -SYS_WKUP4 = NC, + SYS_WKUP4 = NC, #endif #ifdef PWR_WAKEUP_PIN5 -SYS_WKUP5 = NC, + SYS_WKUP5 = NC, #endif #ifdef PWR_WAKEUP_PIN6 -SYS_WKUP6 = NC, + SYS_WKUP6 = NC, #endif #ifdef PWR_WAKEUP_PIN7 -SYS_WKUP7 = NC, + SYS_WKUP7 = NC, #endif #ifdef PWR_WAKEUP_PIN8 -SYS_WKUP8 = NC, + SYS_WKUP8 = NC, #endif /* USB */ #ifdef USBCON -USB_OTG_FS_SOF = PA_8, -USB_OTG_FS_VBUS = PA_9, -USB_OTG_FS_ID = PA_10, -USB_OTG_FS_DM = PA_11, -USB_OTG_FS_DP = PA_12, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, #endif