|
@ -21,10 +21,7 @@ |
|
|
*/ |
|
|
*/ |
|
|
#ifdef __AVR__ |
|
|
#ifdef __AVR__ |
|
|
|
|
|
|
|
|
#include "../../inc/MarlinConfigPre.h" |
|
|
#include "../../inc/MarlinConfig.h" |
|
|
#include "HAL.h" |
|
|
|
|
|
|
|
|
|
|
|
#if NEEDS_HARDWARE_PWM // Specific meta-flag for features that mandate PWM
|
|
|
|
|
|
|
|
|
|
|
|
struct Timer { |
|
|
struct Timer { |
|
|
volatile uint8_t* TCCRnQ[3]; // max 3 TCCR registers per timer
|
|
|
volatile uint8_t* TCCRnQ[3]; // max 3 TCCR registers per timer
|
|
@ -32,6 +29,8 @@ struct Timer { |
|
|
volatile uint16_t* ICRn; // max 1 ICR register per timer
|
|
|
volatile uint16_t* ICRn; // max 1 ICR register per timer
|
|
|
uint8_t n; // the timer number [0->5]
|
|
|
uint8_t n; // the timer number [0->5]
|
|
|
uint8_t q; // the timer output [0->2] (A->C)
|
|
|
uint8_t q; // the timer output [0->2] (A->C)
|
|
|
|
|
|
bool isPWM; // True if pin is a "hardware timer"
|
|
|
|
|
|
bool isProtected; // True if timer is protected
|
|
|
}; |
|
|
}; |
|
|
|
|
|
|
|
|
// Macros for the Timer structure
|
|
|
// Macros for the Timer structure
|
|
@ -53,16 +52,13 @@ struct Timer { |
|
|
#define _SET_ICRn(ICRn, V) (*(ICRn) = int(V) & 0xFFFF) |
|
|
#define _SET_ICRn(ICRn, V) (*(ICRn) = int(V) & 0xFFFF) |
|
|
|
|
|
|
|
|
/**
|
|
|
/**
|
|
|
* get_pwm_timer |
|
|
* Return a Timer struct describing a pin's timer. |
|
|
* Get the timer information and register of the provided pin. |
|
|
|
|
|
* Return a Timer struct containing this information. |
|
|
|
|
|
* Used by set_pwm_frequency, set_pwm_duty |
|
|
|
|
|
*/ |
|
|
*/ |
|
|
Timer get_pwm_timer(const pin_t pin) { |
|
|
Timer get_pwm_timer(const pin_t pin) { |
|
|
|
|
|
|
|
|
uint8_t q = 0; |
|
|
uint8_t q = 0; |
|
|
|
|
|
|
|
|
switch (digitalPinToTimer(pin)) { |
|
|
switch (digitalPinToTimer(pin)) { |
|
|
// Protect reserved timers (TIMER0 & TIMER1)
|
|
|
|
|
|
#ifdef TCCR0A |
|
|
#ifdef TCCR0A |
|
|
IF_DISABLED(AVR_AT90USB1286_FAMILY, case TIMER0A:) |
|
|
IF_DISABLED(AVR_AT90USB1286_FAMILY, case TIMER0A:) |
|
|
case TIMER0B: |
|
|
case TIMER0B: |
|
@ -71,190 +67,112 @@ Timer get_pwm_timer(const pin_t pin) { |
|
|
case TIMER1A: case TIMER1B: |
|
|
case TIMER1A: case TIMER1B: |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
|
|
|
break; |
|
|
break; // Protect reserved timers (TIMER0 & TIMER1)
|
|
|
|
|
|
|
|
|
#if HAS_TCCR2 |
|
|
#if HAS_TCCR2 |
|
|
case TIMER2: { |
|
|
case TIMER2: |
|
|
Timer timer = { |
|
|
return Timer({ { &TCCR2, nullptr, nullptr }, { (uint16_t*)&OCR2, nullptr, nullptr }, nullptr, 2, 0, true, false }); |
|
|
{ &TCCR2, nullptr, nullptr }, |
|
|
#elif ENABLED(USE_OCR2A_AS_TOP) |
|
|
{ (uint16_t*)&OCR2, nullptr, nullptr }, |
|
|
case TIMER2A: break; // protect TIMER2A since its OCR is used by TIMER2B
|
|
|
nullptr, |
|
|
case TIMER2B: |
|
|
2, 0 |
|
|
return Timer({ { &TCCR2A, &TCCR2B, nullptr }, { (uint16_t*)&OCR2A, (uint16_t*)&OCR2B, nullptr }, nullptr, 2, 1, true, false }); |
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#elif defined(TCCR2A) |
|
|
#elif defined(TCCR2A) |
|
|
#if ENABLED(USE_OCR2A_AS_TOP) |
|
|
case TIMER2B: ++q; case TIMER2A: |
|
|
case TIMER2A: break; // protect TIMER2A
|
|
|
return Timer({ { &TCCR2A, &TCCR2B, nullptr }, { (uint16_t*)&OCR2A, (uint16_t*)&OCR2B, nullptr }, nullptr, 2, q, true, false }); |
|
|
case TIMER2B: { |
|
|
|
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR2A, &TCCR2B, nullptr }, |
|
|
|
|
|
{ (uint16_t*)&OCR2A, (uint16_t*)&OCR2B, nullptr }, |
|
|
|
|
|
nullptr, |
|
|
|
|
|
2, 1 |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#else |
|
|
|
|
|
case TIMER2B: ++q; |
|
|
|
|
|
case TIMER2A: { |
|
|
|
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR2A, &TCCR2B, nullptr }, |
|
|
|
|
|
{ (uint16_t*)&OCR2A, (uint16_t*)&OCR2B, nullptr }, |
|
|
|
|
|
nullptr, |
|
|
|
|
|
2, q |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#endif |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
|
|
|
|
|
|
#ifdef OCR3C |
|
|
#ifdef OCR3C |
|
|
case TIMER3C: ++q; |
|
|
case TIMER3C: ++q; case TIMER3B: ++q; case TIMER3A: |
|
|
case TIMER3B: ++q; |
|
|
return Timer({ { &TCCR3A, &TCCR3B, &TCCR3C }, { &OCR3A, &OCR3B, &OCR3C }, &ICR3, 3, q, true, false }); |
|
|
case TIMER3A: { |
|
|
|
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR3A, &TCCR3B, &TCCR3C }, |
|
|
|
|
|
{ &OCR3A, &OCR3B, &OCR3C }, |
|
|
|
|
|
&ICR3, |
|
|
|
|
|
3, q |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#elif defined(OCR3B) |
|
|
#elif defined(OCR3B) |
|
|
case TIMER3B: ++q; |
|
|
case TIMER3B: ++q; case TIMER3A: |
|
|
case TIMER3A: { |
|
|
return Timer({ { &TCCR3A, &TCCR3B, nullptr }, { &OCR3A, &OCR3B, nullptr }, &ICR3, 3, q, true, false }); |
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR3A, &TCCR3B, nullptr }, |
|
|
|
|
|
{ &OCR3A, &OCR3B, nullptr }, |
|
|
|
|
|
&ICR3, |
|
|
|
|
|
3, q |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
|
|
|
|
|
|
#ifdef TCCR4A |
|
|
#ifdef TCCR4A |
|
|
case TIMER4C: ++q; |
|
|
case TIMER4C: ++q; case TIMER4B: ++q; case TIMER4A: |
|
|
case TIMER4B: ++q; |
|
|
return Timer({ { &TCCR4A, &TCCR4B, &TCCR4C }, { &OCR4A, &OCR4B, &OCR4C }, &ICR4, 4, q, true, false }); |
|
|
case TIMER4A: { |
|
|
|
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR4A, &TCCR4B, &TCCR4C }, |
|
|
|
|
|
{ &OCR4A, &OCR4B, &OCR4C }, |
|
|
|
|
|
&ICR4, |
|
|
|
|
|
4, q |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
|
|
|
|
|
|
#ifdef TCCR5A |
|
|
#ifdef TCCR5A |
|
|
case TIMER5C: ++q; |
|
|
case TIMER5C: ++q; case TIMER5B: ++q; case TIMER5A: |
|
|
case TIMER5B: ++q; |
|
|
return Timer({ { &TCCR5A, &TCCR5B, &TCCR5C }, { &OCR5A, &OCR5B, &OCR5C }, &ICR5, 5, q, true, false }); |
|
|
case TIMER5A: { |
|
|
|
|
|
Timer timer = { |
|
|
|
|
|
{ &TCCR5A, &TCCR5B, &TCCR5C }, |
|
|
|
|
|
{ &OCR5A, &OCR5B, &OCR5C }, |
|
|
|
|
|
&ICR5, |
|
|
|
|
|
5, q |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
Timer timer = { |
|
|
return Timer(); |
|
|
{ nullptr, nullptr, nullptr }, |
|
|
|
|
|
{ nullptr, nullptr, nullptr }, |
|
|
|
|
|
nullptr, |
|
|
|
|
|
0, 0 |
|
|
|
|
|
}; |
|
|
|
|
|
return timer; |
|
|
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void set_pwm_frequency(const pin_t pin, const uint16_t f_desired) { |
|
|
void set_pwm_frequency(const pin_t pin, const uint16_t f_desired) { |
|
|
Timer timer = get_pwm_timer(pin); |
|
|
Timer timer = get_pwm_timer(pin); |
|
|
if (timer.n == 0) return; // Don't proceed if protected timer or not recognized
|
|
|
if (timer.isProtected || !timer.isPWM) return; // Don't proceed if protected timer or not recognized
|
|
|
uint16_t size; |
|
|
|
|
|
if (timer.n == 2) size = 255; else size = 65535; |
|
|
|
|
|
|
|
|
|
|
|
uint16_t res = 255; // resolution (TOP value)
|
|
|
const bool is_timer2 = timer.n == 2; |
|
|
uint8_t j = 0; // prescaler index
|
|
|
const uint16_t maxtop = is_timer2 ? 0xFF : 0xFFFF; |
|
|
uint8_t wgm = 1; // waveform generation mode
|
|
|
|
|
|
|
|
|
uint16_t res = 0xFF; // resolution (TOP value)
|
|
|
|
|
|
uint8_t j = CS_NONE; // prescaler index
|
|
|
|
|
|
uint8_t wgm = WGM_PWM_PC_8; // waveform generation mode
|
|
|
|
|
|
|
|
|
// Calculating the prescaler and resolution to use to achieve closest frequency
|
|
|
// Calculating the prescaler and resolution to use to achieve closest frequency
|
|
|
if (f_desired != 0) { |
|
|
if (f_desired != 0) { |
|
|
int f = (F_CPU) / (2 * 1024 * size) + 1; // Initialize frequency as lowest (non-zero) achievable
|
|
|
constexpr uint16_t prescaler[] = { 1, 8, (32), 64, (128), 256, 1024 }; // (*) are Timer 2 only
|
|
|
uint16_t prescaler[] = { 0, 1, 8, /*TIMER2 ONLY*/32, 64, /*TIMER2 ONLY*/128, 256, 1024 }; |
|
|
uint16_t f = (F_CPU) / (2 * 1024 * maxtop) + 1; // Start with the lowest non-zero frequency achievable (1 or 31)
|
|
|
|
|
|
|
|
|
// loop over prescaler values
|
|
|
LOOP_L_N(i, COUNT(prescaler)) { // Loop through all prescaler values
|
|
|
LOOP_S_L_N(i, 1, 8) { |
|
|
const uint16_t p = prescaler[i]; |
|
|
uint16_t res_temp_fast = 255, res_temp_phase_correct = 255; |
|
|
uint16_t res_fast_temp, res_pc_temp; |
|
|
if (timer.n == 2) { |
|
|
if (is_timer2) { |
|
|
// No resolution calculation for TIMER2 unless enabled USE_OCR2A_AS_TOP
|
|
|
#if ENABLED(USE_OCR2A_AS_TOP) // No resolution calculation for TIMER2 unless enabled USE_OCR2A_AS_TOP
|
|
|
#if ENABLED(USE_OCR2A_AS_TOP) |
|
|
const uint16_t rft = (F_CPU) / (p * f_desired); |
|
|
const uint16_t rtf = (F_CPU) / (prescaler[i] * f_desired); |
|
|
res_fast_temp = rft - 1; |
|
|
res_temp_fast = rtf - 1; |
|
|
res_pc_temp = rft / 2; |
|
|
res_temp_phase_correct = rtf / 2; |
|
|
#else |
|
|
|
|
|
res_fast_temp = res_pc_temp = maxtop; |
|
|
#endif |
|
|
#endif |
|
|
} |
|
|
} |
|
|
else { |
|
|
else { |
|
|
// Skip TIMER2 specific prescalers when not TIMER2
|
|
|
if (p == 32 || p == 128) continue; // Skip TIMER2 specific prescalers when not TIMER2
|
|
|
if (i == 3 || i == 5) continue; |
|
|
const uint16_t rft = (F_CPU) / (p * f_desired); |
|
|
const uint16_t rtf = (F_CPU) / (prescaler[i] * f_desired); |
|
|
res_fast_temp = rft - 1; |
|
|
res_temp_fast = rtf - 1; |
|
|
res_pc_temp = rft / 2; |
|
|
res_temp_phase_correct = rtf / 2; |
|
|
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
LIMIT(res_temp_fast, 1U, size); |
|
|
LIMIT(res_fast_temp, 1U, maxtop); |
|
|
LIMIT(res_temp_phase_correct, 1U, size); |
|
|
LIMIT(res_pc_temp, 1U, maxtop); |
|
|
|
|
|
|
|
|
// Calculate frequencies of test prescaler and resolution values
|
|
|
// Calculate frequencies of test prescaler and resolution values
|
|
|
const int f_temp_fast = (F_CPU) / (prescaler[i] * (1 + res_temp_fast)), |
|
|
const uint32_t f_diff = _MAX(f, f_desired) - _MIN(f, f_desired), |
|
|
f_temp_phase_correct = (F_CPU) / (2 * prescaler[i] * res_temp_phase_correct), |
|
|
f_fast_temp = (F_CPU) / (p * (1 + res_fast_temp)), |
|
|
f_diff = ABS(f - f_desired), |
|
|
f_fast_diff = _MAX(f_fast_temp, f_desired) - _MIN(f_fast_temp, f_desired), |
|
|
f_fast_diff = ABS(f_temp_fast - f_desired), |
|
|
f_pc_temp = (F_CPU) / (2 * p * res_pc_temp), |
|
|
f_phase_diff = ABS(f_temp_phase_correct - f_desired); |
|
|
f_pc_diff = _MAX(f_pc_temp, f_desired) - _MIN(f_pc_temp, f_desired); |
|
|
|
|
|
|
|
|
// If FAST values are closest to desired f
|
|
|
if (f_fast_diff < f_diff && f_fast_diff <= f_pc_diff) { // FAST values are closest to desired f
|
|
|
if (f_fast_diff < f_diff && f_fast_diff <= f_phase_diff) { |
|
|
|
|
|
// Remember this combination
|
|
|
|
|
|
f = f_temp_fast; |
|
|
|
|
|
res = res_temp_fast; |
|
|
|
|
|
j = i; |
|
|
|
|
|
// Set the Wave Generation Mode to FAST PWM
|
|
|
// Set the Wave Generation Mode to FAST PWM
|
|
|
if (timer.n == 2) |
|
|
wgm = is_timer2 ? uint8_t(TERN(USE_OCR2A_AS_TOP, WGM2_FAST_PWM_OCR2A, WGM2_FAST_PWM)) : uint8_t(WGM_FAST_PWM_ICRn); |
|
|
wgm = TERN(USE_OCR2A_AS_TOP, WGM2_FAST_PWM_OCR2A, WGM2_FAST_PWM); |
|
|
// Remember this combination
|
|
|
else |
|
|
f = f_fast_temp; res = res_fast_temp; j = i + 1; |
|
|
wgm = WGM_FAST_PWM_ICRn; |
|
|
|
|
|
} |
|
|
} |
|
|
// If PHASE CORRECT values are closes to desired f
|
|
|
else if (f_pc_diff < f_diff) { // PHASE CORRECT values are closes to desired f
|
|
|
else if (f_phase_diff < f_diff) { |
|
|
|
|
|
f = f_temp_phase_correct; |
|
|
|
|
|
res = res_temp_phase_correct; |
|
|
|
|
|
j = i; |
|
|
|
|
|
// Set the Wave Generation Mode to PWM PHASE CORRECT
|
|
|
// Set the Wave Generation Mode to PWM PHASE CORRECT
|
|
|
if (timer.n == 2) |
|
|
wgm = is_timer2 ? uint8_t(TERN(USE_OCR2A_AS_TOP, WGM2_PWM_PC_OCR2A, WGM2_PWM_PC)) : uint8_t(WGM_PWM_PC_ICRn); |
|
|
wgm = TERN(USE_OCR2A_AS_TOP, WGM2_PWM_PC_OCR2A, WGM2_FAST_PWM); |
|
|
f = f_pc_temp; res = res_pc_temp; j = i + 1; |
|
|
else |
|
|
|
|
|
wgm = WGM_PWM_PC_ICRn; |
|
|
|
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
_SET_WGMnQ(timer.TCCRnQ, wgm); |
|
|
_SET_WGMnQ(timer.TCCRnQ, wgm); |
|
|
_SET_CSn(timer.TCCRnQ, j); |
|
|
_SET_CSn(timer.TCCRnQ, j); |
|
|
|
|
|
|
|
|
if (timer.n == 2) { |
|
|
if (is_timer2) { |
|
|
TERN_(USE_OCR2A_AS_TOP, _SET_OCRnQ(timer.OCRnQ, 0, res)); // Set OCR2A value (TOP) = res
|
|
|
TERN_(USE_OCR2A_AS_TOP, _SET_OCRnQ(timer.OCRnQ, 0, res)); // Set OCR2A value (TOP) = res
|
|
|
} |
|
|
} |
|
|
else |
|
|
else |
|
|
_SET_ICRn(timer.ICRn, res); // Set ICRn value (TOP) = res
|
|
|
_SET_ICRn(timer.ICRn, res); // Set ICRn value (TOP) = res
|
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
#endif // NEEDS_HARDWARE_PWM
|
|
|
|
|
|
|
|
|
|
|
|
void set_pwm_duty(const pin_t pin, const uint16_t v, const uint16_t v_size/*=255*/, const bool invert/*=false*/) { |
|
|
void set_pwm_duty(const pin_t pin, const uint16_t v, const uint16_t v_size/*=255*/, const bool invert/*=false*/) { |
|
|
#if NEEDS_HARDWARE_PWM |
|
|
|
|
|
|
|
|
|
|
|
// If v is 0 or v_size (max), digitalWrite to LOW or HIGH.
|
|
|
// If v is 0 or v_size (max), digitalWrite to LOW or HIGH.
|
|
|
// Note that digitalWrite also disables pwm output for us (sets COM bit to 0)
|
|
|
// Note that digitalWrite also disables pwm output for us (sets COM bit to 0)
|
|
|
if (v == 0) |
|
|
if (v == 0) |
|
@ -263,20 +181,33 @@ void set_pwm_duty(const pin_t pin, const uint16_t v, const uint16_t v_size/*=255 |
|
|
digitalWrite(pin, !invert); |
|
|
digitalWrite(pin, !invert); |
|
|
else { |
|
|
else { |
|
|
Timer timer = get_pwm_timer(pin); |
|
|
Timer timer = get_pwm_timer(pin); |
|
|
if (timer.n == 0) return; // Don't proceed if protected timer or not recognized
|
|
|
if (timer.isProtected) return; // Leave protected timer unchanged
|
|
|
// Set compare output mode to CLEAR -> SET or SET -> CLEAR (if inverted)
|
|
|
if (timer.isPWM) { |
|
|
_SET_COMnQ(timer.TCCRnQ, timer.q TERN_(HAS_TCCR2, + (timer.q == 2)), COM_CLEAR_SET + invert); // COM20 is on bit 4 of TCCR2, so +1 for q==2
|
|
|
_SET_COMnQ(timer.TCCRnQ, SUM_TERN(HAS_TCCR2, timer.q, timer.q == 2), COM_CLEAR_SET + invert); // COM20 is on bit 4 of TCCR2, so +1 for q==2
|
|
|
const uint16_t top = timer.n == 2 ? TERN(USE_OCR2A_AS_TOP, *timer.OCRnQ[0], 255) : *timer.ICRn; |
|
|
const uint16_t top = timer.n == 2 ? TERN(USE_OCR2A_AS_TOP, *timer.OCRnQ[0], 255) : *timer.ICRn; |
|
|
_SET_OCRnQ(timer.OCRnQ, timer.q, uint16_t(uint32_t(v) * top / v_size)); // Scale 8/16-bit v to top value
|
|
|
_SET_OCRnQ(timer.OCRnQ, timer.q, uint16_t(uint32_t(v) * top / v_size)); // Scale 8/16-bit v to top value
|
|
|
} |
|
|
} |
|
|
|
|
|
else |
|
|
|
|
|
digitalWrite(pin, v < 128 ? LOW : HIGH); |
|
|
|
|
|
} |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
#else |
|
|
void init_pwm_timers() { |
|
|
|
|
|
// Init some timer frequencies to a default 1KHz
|
|
|
analogWrite(pin, v); |
|
|
const pin_t pwm_pin[] = { |
|
|
UNUSED(v_size); |
|
|
#ifdef __AVR_ATmega2560__ |
|
|
UNUSED(invert); |
|
|
10, 5, 6, 46 |
|
|
|
|
|
#elif defined(__AVR_ATmega1280__) |
|
|
|
|
|
12, 31 |
|
|
|
|
|
#elif defined(__AVR_ATmega644__) || defined(__AVR_ATmega1284__) |
|
|
|
|
|
15, 6 |
|
|
|
|
|
#elif defined(__AVR_AT90USB1286__) || defined(__AVR_mega64) || defined(__AVR_mega128) |
|
|
|
|
|
16, 24 |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
LOOP_L_N(i, COUNT(pwm_pin)) |
|
|
|
|
|
set_pwm_frequency(pwm_pin[i], 1000); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
#endif // __AVR__
|
|
|
#endif // __AVR__
|
|
|