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@ -155,7 +155,9 @@ typedef struct |
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#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x00000444U) |
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#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x00000444U) |
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#define SDIO_BASE (PERIPH_BASE + 0x00018000U) |
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#define SDIO_BASE (PERIPH_BASE + 0x00018000U) |
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#define I2C1_BASE (APB1PERIPH_BASE + 0x00005400U) |
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#define I2C1_BASE (APB1PERIPH_BASE + 0x00005400U) |
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#define PORTA_BASE (APB2PERIPH_BASE + 0x00000800U) |
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#define PORTB_BASE (APB2PERIPH_BASE + 0x00000C00U) |
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#define PORTB_BASE (APB2PERIPH_BASE + 0x00000C00U) |
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#define PORTC_BASE (APB2PERIPH_BASE + 0x00001000U) |
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#define AFIOBASE (APB2PERIPH_BASE + 0x00000000U) |
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#define AFIOBASE (APB2PERIPH_BASE + 0x00000000U) |
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#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ |
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#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ |
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#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ |
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#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ |
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@ -169,7 +171,9 @@ typedef struct |
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#define DMA2_Channel4 ((DMA_Channel_TypeDef *)DMA2_Channel4_BASE) |
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#define DMA2_Channel4 ((DMA_Channel_TypeDef *)DMA2_Channel4_BASE) |
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#define DMA2 ((DMA_TypeDef *)DMA2_BASE) |
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#define DMA2 ((DMA_TypeDef *)DMA2_BASE) |
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#define I2C1 ((I2C_TypeDef *)I2C1_BASE) |
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#define I2C1 ((I2C_TypeDef *)I2C1_BASE) |
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#define PORTA ((GPIO_TypeDef *)PORTA_BASE) |
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#define PORTB ((GPIO_TypeDef *)PORTB_BASE) |
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#define PORTB ((GPIO_TypeDef *)PORTB_BASE) |
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#define PORTC ((GPIO_TypeDef *)PORTC_BASE) |
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#define AFIO ((AFIO_TypeDef *)AFIOBASE) |
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#define AFIO ((AFIO_TypeDef *)AFIOBASE) |
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#define CoreDebug ((CoreDebug_Type *)CoreDebug_BASE) /*!< Core Debug configuration struct */ |
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#define CoreDebug ((CoreDebug_Type *)CoreDebug_BASE) /*!< Core Debug configuration struct */ |
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#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ |
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#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ |
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