Tanguy Pruvot
5 years ago
committed by
Scott Lahteine
4 changed files with 1161 additions and 11 deletions
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/******************************************************************************
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* The MIT License |
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* |
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* Copyright (c) 2010 Perry Hung. |
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* |
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* Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, copy, |
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* modify, merge, publish, distribute, sublicense, and/or sell copies |
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* of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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* SOFTWARE. |
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*****************************************************************************/ |
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/**
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* @author Marti Bolivar <mbolivar@leaflabs.com> |
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* @brief Wirish SPI implementation. |
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*/ |
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#ifdef __STM32F1__ |
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#include "SPI.h" |
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#include <libmaple/timer.h> |
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#include <libmaple/util.h> |
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#include <libmaple/rcc.h> |
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#include <boards.h> |
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#include <wirish.h> |
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/** Time in ms for DMA receive timeout */ |
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#define DMA_TIMEOUT 100 |
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#if CYCLES_PER_MICROSECOND != 72 |
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#warning "Unexpected clock speed; SPI frequency calculation will be incorrect" |
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#endif |
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struct spi_pins { |
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uint8_t nss; |
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uint8_t sck; |
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uint8_t miso; |
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uint8_t mosi; |
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}; |
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static const spi_pins* dev_to_spi_pins(spi_dev *dev); |
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static void configure_gpios(spi_dev *dev, bool as_master); |
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static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq); |
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#if (BOARD_NR_SPI >= 3) && !defined(STM32_HIGH_DENSITY) |
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#error "The SPI library is misconfigured: 3 SPI ports only available on high density STM32 devices" |
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#endif |
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static const spi_pins board_spi_pins[] __FLASH__ = { |
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#if BOARD_NR_SPI >= 1 |
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{ BOARD_SPI1_NSS_PIN, |
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BOARD_SPI1_SCK_PIN, |
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BOARD_SPI1_MISO_PIN, |
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BOARD_SPI1_MOSI_PIN }, |
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#endif |
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#if BOARD_NR_SPI >= 2 |
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{ BOARD_SPI2_NSS_PIN, |
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BOARD_SPI2_SCK_PIN, |
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BOARD_SPI2_MISO_PIN, |
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BOARD_SPI2_MOSI_PIN }, |
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#endif |
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#if BOARD_NR_SPI >= 3 |
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{ BOARD_SPI3_NSS_PIN, |
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BOARD_SPI3_SCK_PIN, |
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BOARD_SPI3_MISO_PIN, |
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BOARD_SPI3_MOSI_PIN }, |
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#endif |
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}; |
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#if BOARD_NR_SPI >= 1 |
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static void (*_spi1_this); |
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#endif |
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#if BOARD_NR_SPI >= 2 |
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static void (*_spi2_this); |
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#endif |
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#if BOARD_NR_SPI >= 3 |
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static void (*_spi3_this); |
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#endif |
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/**
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* Constructor |
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*/ |
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SPIClass::SPIClass(uint32_t spi_num) { |
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_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
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switch (spi_num) { |
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#if BOARD_NR_SPI >= 1 |
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case 1: |
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_currentSetting->spi_d = SPI1; |
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_spi1_this = (void*)this; |
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break; |
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#endif |
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#if BOARD_NR_SPI >= 2 |
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case 2: |
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_currentSetting->spi_d = SPI2; |
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_spi2_this = (void*)this; |
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break; |
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#endif |
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#if BOARD_NR_SPI >= 3 |
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case 3: |
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_currentSetting->spi_d = SPI3; |
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_spi3_this = (void*)this; |
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break; |
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#endif |
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default: ASSERT(0); |
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} |
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// Init things specific to each SPI device
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// clock divider setup is a bit of hack, and needs to be improved at a later date.
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#if BOARD_NR_SPI >= 1 |
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_settings[0].spi_d = SPI1; |
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_settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock); |
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_settings[0].spiDmaDev = DMA1; |
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_settings[0].spiTxDmaChannel = DMA_CH3; |
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_settings[0].spiRxDmaChannel = DMA_CH2; |
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#endif |
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#if BOARD_NR_SPI >= 2 |
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_settings[1].spi_d = SPI2; |
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_settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock); |
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_settings[1].spiDmaDev = DMA1; |
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_settings[1].spiTxDmaChannel = DMA_CH5; |
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_settings[1].spiRxDmaChannel = DMA_CH4; |
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#endif |
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#if BOARD_NR_SPI >= 3 |
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_settings[2].spi_d = SPI3; |
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_settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock); |
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_settings[2].spiDmaDev = DMA2; |
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_settings[2].spiTxDmaChannel = DMA_CH2; |
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_settings[2].spiRxDmaChannel = DMA_CH1; |
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#endif |
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// added for DMA callbacks.
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_currentSetting->state = SPI_STATE_IDLE; |
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} |
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/*
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* Set up/tear down |
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*/ |
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void SPIClass::updateSettings() { |
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uint32_t flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS); |
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spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags); |
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} |
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void SPIClass::begin() { |
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spi_init(_currentSetting->spi_d); |
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configure_gpios(_currentSetting->spi_d, 1); |
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updateSettings(); |
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// added for DMA callbacks.
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_currentSetting->state = SPI_STATE_READY; |
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} |
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void SPIClass::beginSlave() { |
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spi_init(_currentSetting->spi_d); |
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configure_gpios(_currentSetting->spi_d, 0); |
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uint32_t flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize); |
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spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags); |
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// added for DMA callbacks.
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_currentSetting->state = SPI_STATE_READY; |
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} |
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void SPIClass::end() { |
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if (!spi_is_enabled(_currentSetting->spi_d)) |
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return; |
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// Follows RM0008's sequence for disabling a SPI in master/slave
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// full duplex mode.
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while (spi_is_rx_nonempty(_currentSetting->spi_d)) { |
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// FIXME [0.1.0] remove this once you have an interrupt based driver
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volatile uint16_t rx __attribute__((unused)) = spi_rx_reg(_currentSetting->spi_d); |
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} |
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while (!spi_is_tx_empty(_currentSetting->spi_d)) {}; |
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while (spi_is_busy(_currentSetting->spi_d)) {}; |
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spi_peripheral_disable(_currentSetting->spi_d); |
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// added for DMA callbacks.
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// Need to add unsetting the callbacks for the DMA channels.
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_currentSetting->state = SPI_STATE_IDLE; |
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} |
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/* Roger Clark added 3 functions */ |
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void SPIClass::setClockDivider(uint32_t clockDivider) { |
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_currentSetting->clockDivider = clockDivider; |
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uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR); |
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_currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR); |
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} |
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void SPIClass::setBitOrder(BitOrder bitOrder) { |
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_currentSetting->bitOrder = bitOrder; |
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uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST); |
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if (bitOrder == LSBFIRST) cr1 |= SPI_CR1_LSBFIRST; |
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_currentSetting->spi_d->regs->CR1 = cr1; |
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} |
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/* Victor Perez. Added to test changing datasize from 8 to 16 bit modes on the fly.
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* Input parameter should be SPI_CR1_DFF set to 0 or 1 on a 32bit word. |
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* |
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*/ |
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void SPIClass::setDataSize(uint32_t datasize) { |
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_currentSetting->dataSize = datasize; |
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uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF); |
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uint8_t en = spi_is_enabled(_currentSetting->spi_d); |
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spi_peripheral_disable(_currentSetting->spi_d); |
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_currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en; |
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} |
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void SPIClass::setDataMode(uint8_t dataMode) { |
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/* Notes:
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As far as I can tell, the AVR numbers for dataMode appear to match the numbers required by the STM32 |
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From the AVR doc http://www.atmel.com/images/doc2585.pdf section 2.4
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SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge |
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0 0 0 Falling Rising |
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1 0 1 Rising Falling |
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2 1 0 Rising Falling |
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3 1 1 Falling Rising |
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On the STM32 it appears to be |
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bit 1 - CPOL : Clock polarity |
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(This bit should not be changed when communication is ongoing) |
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0 : CLK to 0 when idle |
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1 : CLK to 1 when idle |
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bit 0 - CPHA : Clock phase |
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(This bit should not be changed when communication is ongoing) |
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0 : The first clock transition is the first data capture edge |
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1 : The second clock transition is the first data capture edge |
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If someone finds this is not the case or sees a logic error with this let me know ;-) |
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*/ |
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_currentSetting->dataMode = dataMode; |
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uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA); |
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_currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA)); |
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} |
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void SPIClass::beginTransaction(uint8_t pin, SPISettings settings) { |
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setBitOrder(settings.bitOrder); |
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setDataMode(settings.dataMode); |
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setDataSize(settings.dataSize); |
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setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock)); |
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begin(); |
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} |
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void SPIClass::beginTransactionSlave(SPISettings settings) { |
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setBitOrder(settings.bitOrder); |
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setDataMode(settings.dataMode); |
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setDataSize(settings.dataSize); |
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beginSlave(); |
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} |
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void SPIClass::endTransaction() { } |
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/*
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* I/O |
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*/ |
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uint16_t SPIClass::read() { |
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while ( spi_is_rx_nonempty(_currentSetting->spi_d)==0 ) ; |
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return (uint16)spi_rx_reg(_currentSetting->spi_d); |
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} |
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void SPIClass::read(uint8_t *buf, uint32_t len) { |
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if (len == 0) return; |
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spi_rx_reg(_currentSetting->spi_d); // clear the RX buffer in case a byte is waiting on it.
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spi_reg_map * regs = _currentSetting->spi_d->regs; |
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// start sequence: write byte 0
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regs->DR = 0x00FF; // write the first byte
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// main loop
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while ( (--len) ) { |
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while( !(regs->SR & SPI_SR_TXE) ); // wait for TXE flag
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noInterrupts(); // go atomic level - avoid interrupts to surely get the previously received data
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regs->DR = 0x00FF; // write the next data item to be transmitted into the SPI_DR register. This clears the TXE flag.
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while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the DR register
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*buf++ = (uint8)(regs->DR); // read and store the received byte. This clears the RXNE flag.
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interrupts(); // let systick do its job
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} |
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// read remaining last byte
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while ( !(regs->SR & SPI_SR_RXNE) ) {} // wait till data is available in the Rx register
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*buf++ = (uint8)(regs->DR); // read and store the received byte
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} |
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void SPIClass::write(uint16_t data) { |
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/* Added for 16bit data Victor Perez. Roger Clark
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* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, |
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* by taking the Tx code from transfer(byte) |
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* This almost doubles the speed of this function. |
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*/ |
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spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
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while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
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while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
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} |
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void SPIClass::write16(uint16_t data) { |
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// Added by stevestrong: write two consecutive bytes in 8 bit mode (DFF=0)
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spi_tx_reg(_currentSetting->spi_d, data>>8); // write high byte
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while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // Wait until TXE=1
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spi_tx_reg(_currentSetting->spi_d, data); // write low byte
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while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // Wait until TXE=1
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while (spi_is_busy(_currentSetting->spi_d) != 0); // wait until BSY=0
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} |
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void SPIClass::write(uint16_t data, uint32_t n) { |
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// Added by stevstrong: Repeatedly send same data by the specified number of times
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spi_reg_map * regs = _currentSetting->spi_d->regs; |
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while ( (n--)>0 ) { |
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regs->DR = data; // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
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while ( (regs->SR & SPI_SR_TXE)==0 ) ; // wait till Tx empty
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} |
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while ( (regs->SR & SPI_SR_BSY) != 0); // wait until BSY=0 before returning
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} |
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void SPIClass::write(const void *data, uint32_t length) { |
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spi_dev * spi_d = _currentSetting->spi_d; |
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spi_tx(spi_d, data, length); // data can be array of bytes or words
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while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..."
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while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
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} |
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uint8_t SPIClass::transfer(uint8_t byte) const { |
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spi_dev * spi_d = _currentSetting->spi_d; |
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spi_rx_reg(spi_d); // read any previous data
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spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register
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while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..."
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while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
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return (uint8)spi_rx_reg(spi_d); // "... and read the last received data."
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} |
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uint16_t SPIClass::transfer16(uint16_t data) const { |
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// Modified by stevestrong: write & read two consecutive bytes in 8 bit mode (DFF=0)
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// This is more effective than two distinct byte transfers
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spi_dev * spi_d = _currentSetting->spi_d; |
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spi_rx_reg(spi_d); // read any previous data
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spi_tx_reg(spi_d, data>>8); // write high byte
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while (spi_is_tx_empty(spi_d) == 0); // wait until TXE=1
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while (spi_is_busy(spi_d) != 0); // wait until BSY=0
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uint16_t ret = spi_rx_reg(spi_d)<<8; // read and shift high byte
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spi_tx_reg(spi_d, data); // write low byte
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while (spi_is_tx_empty(spi_d) == 0); // wait until TXE=1
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while (spi_is_busy(spi_d) != 0); // wait until BSY=0
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ret += spi_rx_reg(spi_d); // read low byte
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return ret; |
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} |
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/* Roger Clark and Victor Perez, 2015
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* Performs a DMA SPI transfer with at least a receive buffer. |
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* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer. |
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* On exit TX buffer is not modified, and RX buffer cotains the received data. |
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* Still in progress. |
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*/ |
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void SPIClass::dmaTransferSet(const void *transmitBuf, void *receiveBuf) { |
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dma_init(_currentSetting->spiDmaDev); |
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//spi_rx_dma_enable(_currentSetting->spi_d);
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//spi_tx_dma_enable(_currentSetting->spi_d);
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dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; |
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dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, |
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dma_bit_size, receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA
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if (!transmitBuf) { |
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transmitBuf = &ff; |
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dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, |
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dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly
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} |
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else { |
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dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, |
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dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA
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} |
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dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); |
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dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH); |
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} |
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uint8_t SPIClass::dmaTransferRepeat(uint16_t length) { |
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if (length == 0) return 0; |
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if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d); |
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_currentSetting->state = SPI_STATE_TRANSFER; |
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dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length); |
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dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); |
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dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
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dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
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spi_rx_dma_enable(_currentSetting->spi_d); |
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spi_tx_dma_enable(_currentSetting->spi_d); |
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if (_currentSetting->receiveCallback) |
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return 0; |
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//uint32_t m = millis();
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uint8_t b = 0; |
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uint32_t m = millis(); |
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while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1) == 0) { |
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//Avoid interrupts and just loop waiting for the flag to be set.
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if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } |
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} |
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while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
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while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
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spi_tx_dma_disable(_currentSetting->spi_d); |
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spi_rx_dma_disable(_currentSetting->spi_d); |
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dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
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dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); |
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dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); |
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dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
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_currentSetting->state = SPI_STATE_READY; |
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return b; |
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} |
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/* Roger Clark and Victor Perez, 2015
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* Performs a DMA SPI transfer with at least a receive buffer. |
|||
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer. |
|||
* On exit TX buffer is not modified, and RX buffer contains the received data. |
|||
* Still in progress. |
|||
*/ |
|||
uint8_t SPIClass::dmaTransfer(const void *transmitBuf, void *receiveBuf, uint16_t length) { |
|||
dmaTransferSet(transmitBuf, receiveBuf); |
|||
return dmaTransferRepeat(length); |
|||
} |
|||
|
|||
/* Roger Clark and Victor Perez, 2015
|
|||
* Performs a DMA SPI send using a TX buffer. |
|||
* On exit TX buffer is not modified. |
|||
* Still in progress. |
|||
* 2016 - stevstrong - reworked to automatically detect bit size from SPI setting |
|||
*/ |
|||
void SPIClass::dmaSendSet(const void * transmitBuf, bool minc) { |
|||
uint32_t flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); |
|||
dma_init(_currentSetting->spiDmaDev); |
|||
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; |
|||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, |
|||
(volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
|
|||
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); |
|||
} |
|||
|
|||
uint8_t SPIClass::dmaSendRepeat(uint16_t length) { |
|||
if (length == 0) return 0; |
|||
|
|||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); |
|||
_currentSetting->state = SPI_STATE_TRANSMIT; |
|||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
|||
spi_tx_dma_enable(_currentSetting->spi_d); |
|||
if (_currentSetting->transmitCallback) |
|||
return 0; |
|||
|
|||
uint32_t m = millis(); |
|||
uint8_t b = 0; |
|||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { |
|||
//Avoid interrupts and just loop waiting for the flag to be set.
|
|||
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } |
|||
} |
|||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
|||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
|||
spi_tx_dma_disable(_currentSetting->spi_d); |
|||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
_currentSetting->state = SPI_STATE_READY; |
|||
return b; |
|||
} |
|||
|
|||
uint8_t SPIClass::dmaSend(const void * transmitBuf, uint16_t length, bool minc) { |
|||
dmaSendSet(transmitBuf, minc); |
|||
return dmaSendRepeat(length); |
|||
} |
|||
|
|||
uint8_t SPIClass::dmaSendAsync(const void * transmitBuf, uint16_t length, bool minc) { |
|||
uint8_t b = 0; |
|||
|
|||
if (_currentSetting->state != SPI_STATE_READY) { |
|||
uint32_t m = millis(); |
|||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { |
|||
//Avoid interrupts and just loop waiting for the flag to be set.
|
|||
//delayMicroseconds(10);
|
|||
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } |
|||
} |
|||
|
|||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
|||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
|||
spi_tx_dma_disable(_currentSetting->spi_d); |
|||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
_currentSetting->state = SPI_STATE_READY; |
|||
} |
|||
|
|||
if (length == 0) return 0; |
|||
uint32_t flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); |
|||
|
|||
dma_init(_currentSetting->spiDmaDev); |
|||
// TX
|
|||
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; |
|||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, |
|||
dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
|
|||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); |
|||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
|||
spi_tx_dma_enable(_currentSetting->spi_d); |
|||
|
|||
_currentSetting->state = SPI_STATE_TRANSMIT; |
|||
return b; |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* New functions added to manage callbacks. |
|||
* Victor Perez 2017 |
|||
*/ |
|||
void SPIClass::onReceive(void(*callback)(void)) { |
|||
_currentSetting->receiveCallback = callback; |
|||
if (callback) { |
|||
switch (_currentSetting->spi_d->clk_id) { |
|||
#if BOARD_NR_SPI >= 1 |
|||
case RCC_SPI1: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback); |
|||
break; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 2 |
|||
case RCC_SPI2: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback); |
|||
break; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 3 |
|||
case RCC_SPI3: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback); |
|||
break; |
|||
#endif |
|||
default: |
|||
ASSERT(0); |
|||
} |
|||
} |
|||
else { |
|||
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); |
|||
} |
|||
} |
|||
|
|||
void SPIClass::onTransmit(void(*callback)(void)) { |
|||
_currentSetting->transmitCallback = callback; |
|||
if (callback) { |
|||
switch (_currentSetting->spi_d->clk_id) { |
|||
#if BOARD_NR_SPI >= 1 |
|||
case RCC_SPI1: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback); |
|||
break; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 2 |
|||
case RCC_SPI2: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback); |
|||
break; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 3 |
|||
case RCC_SPI3: |
|||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback); |
|||
break; |
|||
#endif |
|||
default: |
|||
ASSERT(0); |
|||
} |
|||
} |
|||
else { |
|||
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* TODO: check if better to first call the customer code, next disable the DMA requests. |
|||
* Also see if we need to check whether callbacks are set or not, may be better to be checked |
|||
* during the initial setup and only set the callback to EventCallback if they are set. |
|||
*/ |
|||
void SPIClass::EventCallback() { |
|||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
|||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0"
|
|||
switch (_currentSetting->state) { |
|||
case SPI_STATE_TRANSFER: |
|||
while (spi_is_rx_nonempty(_currentSetting->spi_d)); |
|||
_currentSetting->state = SPI_STATE_READY; |
|||
spi_tx_dma_disable(_currentSetting->spi_d); |
|||
spi_rx_dma_disable(_currentSetting->spi_d); |
|||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
|||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
|||
if (_currentSetting->receiveCallback) |
|||
_currentSetting->receiveCallback(); |
|||
break; |
|||
case SPI_STATE_TRANSMIT: |
|||
_currentSetting->state = SPI_STATE_READY; |
|||
spi_tx_dma_disable(_currentSetting->spi_d); |
|||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
|||
if (_currentSetting->transmitCallback) |
|||
_currentSetting->transmitCallback(); |
|||
break; |
|||
default: |
|||
break; |
|||
} |
|||
} |
|||
|
|||
void SPIClass::attachInterrupt() { |
|||
// Should be enableInterrupt()
|
|||
} |
|||
|
|||
void SPIClass::detachInterrupt() { |
|||
// Should be disableInterrupt()
|
|||
} |
|||
|
|||
/*
|
|||
* Pin accessors |
|||
*/ |
|||
|
|||
uint8_t SPIClass::misoPin() { |
|||
return dev_to_spi_pins(_currentSetting->spi_d)->miso; |
|||
} |
|||
|
|||
uint8_t SPIClass::mosiPin() { |
|||
return dev_to_spi_pins(_currentSetting->spi_d)->mosi; |
|||
} |
|||
|
|||
uint8_t SPIClass::sckPin() { |
|||
return dev_to_spi_pins(_currentSetting->spi_d)->sck; |
|||
} |
|||
|
|||
uint8_t SPIClass::nssPin() { |
|||
return dev_to_spi_pins(_currentSetting->spi_d)->nss; |
|||
} |
|||
|
|||
/*
|
|||
* Deprecated functions |
|||
*/ |
|||
|
|||
uint8_t SPIClass::send(uint8_t data) { |
|||
this->write(data); |
|||
return 1; |
|||
} |
|||
|
|||
uint8_t SPIClass::send(uint8_t *buf, uint32_t len) { |
|||
this->write(buf, len); |
|||
return len; |
|||
} |
|||
|
|||
uint8_t SPIClass::recv() { |
|||
return this->read(); |
|||
} |
|||
|
|||
/*
|
|||
* DMA call back functions, one per port. |
|||
*/ |
|||
#if BOARD_NR_SPI >= 1 |
|||
void SPIClass::_spi1EventCallback() { |
|||
reinterpret_cast<class SPIClass*>(_spi1_this)->EventCallback(); |
|||
} |
|||
#endif |
|||
#if BOARD_NR_SPI >= 2 |
|||
void SPIClass::_spi2EventCallback() { |
|||
reinterpret_cast<class SPIClass*>(_spi2_this)->EventCallback(); |
|||
} |
|||
#endif |
|||
#if BOARD_NR_SPI >= 3 |
|||
void SPIClass::_spi3EventCallback() { |
|||
reinterpret_cast<class SPIClass*>(_spi3_this)->EventCallback(); |
|||
} |
|||
#endif |
|||
|
|||
/*
|
|||
* Auxiliary functions |
|||
*/ |
|||
static const spi_pins* dev_to_spi_pins(spi_dev *dev) { |
|||
switch (dev->clk_id) { |
|||
#if BOARD_NR_SPI >= 1 |
|||
case RCC_SPI1: return board_spi_pins; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 2 |
|||
case RCC_SPI2: return board_spi_pins + 1; |
|||
#endif |
|||
#if BOARD_NR_SPI >= 3 |
|||
case RCC_SPI3: return board_spi_pins + 2; |
|||
#endif |
|||
default: return NULL; |
|||
} |
|||
} |
|||
|
|||
static void disable_pwm(const stm32_pin_info *i) { |
|||
if (i->timer_device) |
|||
timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED); |
|||
} |
|||
|
|||
static void configure_gpios(spi_dev *dev, bool as_master) { |
|||
const spi_pins *pins = dev_to_spi_pins(dev); |
|||
if (!pins) return; |
|||
|
|||
const stm32_pin_info *nssi = &PIN_MAP[pins->nss], |
|||
*scki = &PIN_MAP[pins->sck], |
|||
*misoi = &PIN_MAP[pins->miso], |
|||
*mosii = &PIN_MAP[pins->mosi]; |
|||
|
|||
disable_pwm(nssi); |
|||
disable_pwm(scki); |
|||
disable_pwm(misoi); |
|||
disable_pwm(mosii); |
|||
|
|||
spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit, |
|||
scki->gpio_device, scki->gpio_bit, misoi->gpio_bit, |
|||
mosii->gpio_bit); |
|||
} |
|||
|
|||
static const spi_baud_rate baud_rates[8] __FLASH__ = { |
|||
SPI_BAUD_PCLK_DIV_2, |
|||
SPI_BAUD_PCLK_DIV_4, |
|||
SPI_BAUD_PCLK_DIV_8, |
|||
SPI_BAUD_PCLK_DIV_16, |
|||
SPI_BAUD_PCLK_DIV_32, |
|||
SPI_BAUD_PCLK_DIV_64, |
|||
SPI_BAUD_PCLK_DIV_128, |
|||
SPI_BAUD_PCLK_DIV_256, |
|||
}; |
|||
|
|||
/*
|
|||
* Note: This assumes you're on a LeafLabs-style board |
|||
* (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz). |
|||
*/ |
|||
static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq) { |
|||
uint32_t clock = 0; |
|||
switch (rcc_dev_clk(dev->clk_id)) { |
|||
case RCC_AHB: |
|||
case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz
|
|||
case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz
|
|||
} |
|||
clock >>= 1; |
|||
|
|||
uint8_t i = 0; |
|||
while (i < 7 && freq < clock) { clock >>= 1; i++; } |
|||
return baud_rates[i]; |
|||
} |
|||
|
|||
SPIClass SPI(1); |
|||
|
|||
#endif // __STM32F1__
|
@ -0,0 +1,409 @@ |
|||
/******************************************************************************
|
|||
* The MIT License |
|||
* |
|||
* Copyright (c) 2010 Perry Hung. |
|||
* |
|||
* Permission is hereby granted, free of charge, to any person |
|||
* obtaining a copy of this software and associated documentation |
|||
* files (the "Software"), to deal in the Software without |
|||
* restriction, including without limitation the rights to use, copy, |
|||
* modify, merge, publish, distribute, sublicense, and/or sell copies |
|||
* of the Software, and to permit persons to whom the Software is |
|||
* furnished to do so, subject to the following conditions: |
|||
* |
|||
* The above copyright notice and this permission notice shall be |
|||
* included in all copies or substantial portions of the Software. |
|||
* |
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
|||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
|||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
|||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
|||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
|||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
|||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
|||
* SOFTWARE. |
|||
*****************************************************************************/ |
|||
#pragma once |
|||
|
|||
#include <libmaple/libmaple_types.h> |
|||
#include <libmaple/spi.h> |
|||
#include <libmaple/dma.h> |
|||
|
|||
#include <boards.h> |
|||
#include <stdint.h> |
|||
#include <wirish.h> |
|||
|
|||
// SPI_HAS_TRANSACTION means SPI has
|
|||
// - beginTransaction()
|
|||
// - endTransaction()
|
|||
// - usingInterrupt()
|
|||
// - SPISetting(clock, bitOrder, dataMode)
|
|||
//#define SPI_HAS_TRANSACTION
|
|||
|
|||
#define SPI_CLOCK_DIV2 SPI_BAUD_PCLK_DIV_2 |
|||
#define SPI_CLOCK_DIV4 SPI_BAUD_PCLK_DIV_4 |
|||
#define SPI_CLOCK_DIV8 SPI_BAUD_PCLK_DIV_8 |
|||
#define SPI_CLOCK_DIV16 SPI_BAUD_PCLK_DIV_16 |
|||
#define SPI_CLOCK_DIV32 SPI_BAUD_PCLK_DIV_32 |
|||
#define SPI_CLOCK_DIV64 SPI_BAUD_PCLK_DIV_64 |
|||
#define SPI_CLOCK_DIV128 SPI_BAUD_PCLK_DIV_128 |
|||
#define SPI_CLOCK_DIV256 SPI_BAUD_PCLK_DIV_256 |
|||
|
|||
/*
|
|||
* Roger Clark. 20150106 |
|||
* Commented out redundant AVR defined |
|||
* |
|||
#define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
|
|||
#define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
|
|||
#define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
|
|||
|
|||
// define SPI_AVR_EIMSK for AVR boards with external interrupt pins
|
|||
#if defined(EIMSK) |
|||
#define SPI_AVR_EIMSK EIMSK |
|||
#elif defined(GICR) |
|||
#define SPI_AVR_EIMSK GICR |
|||
#elif defined(GIMSK) |
|||
#define SPI_AVR_EIMSK GIMSK |
|||
#endif |
|||
*/ |
|||
|
|||
#ifndef STM32_LSBFIRST |
|||
#define STM32_LSBFIRST 0 |
|||
#endif |
|||
#ifndef STM32_MSBFIRST |
|||
#define STM32_MSBFIRST 1 |
|||
#endif |
|||
|
|||
// PC13 or PA4
|
|||
#define BOARD_SPI_DEFAULT_SS PA4 |
|||
//#define BOARD_SPI_DEFAULT_SS PC13
|
|||
|
|||
#define SPI_MODE0 SPI_MODE_0 |
|||
#define SPI_MODE1 SPI_MODE_1 |
|||
#define SPI_MODE2 SPI_MODE_2 |
|||
#define SPI_MODE3 SPI_MODE_3 |
|||
|
|||
#define DATA_SIZE_8BIT SPI_CR1_DFF_8_BIT |
|||
#define DATA_SIZE_16BIT SPI_CR1_DFF_16_BIT |
|||
|
|||
typedef enum { |
|||
SPI_STATE_IDLE, |
|||
SPI_STATE_READY, |
|||
SPI_STATE_RECEIVE, |
|||
SPI_STATE_TRANSMIT, |
|||
SPI_STATE_TRANSFER |
|||
} spi_mode_t; |
|||
|
|||
class SPISettings { |
|||
public: |
|||
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) { |
|||
if (__builtin_constant_p(clock)) |
|||
init_AlwaysInline(clock, bitOrder, dataMode, DATA_SIZE_8BIT); |
|||
else |
|||
init_MightInline(clock, bitOrder, dataMode, DATA_SIZE_8BIT); |
|||
} |
|||
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode, uint32_t dataSize) { |
|||
if (__builtin_constant_p(clock)) |
|||
init_AlwaysInline(clock, bitOrder, dataMode, dataSize); |
|||
else |
|||
init_MightInline(clock, bitOrder, dataMode, dataSize); |
|||
} |
|||
SPISettings(uint32_t clock) { |
|||
if (__builtin_constant_p(clock)) |
|||
init_AlwaysInline(clock, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT); |
|||
else |
|||
init_MightInline(clock, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT); |
|||
} |
|||
SPISettings() { |
|||
init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT); |
|||
} |
|||
private: |
|||
void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode, uint32_t dataSize) { |
|||
init_AlwaysInline(clock, bitOrder, dataMode, dataSize); |
|||
} |
|||
void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode, uint32_t dataSize) __attribute__((__always_inline__)) { |
|||
this->clock = clock; |
|||
this->bitOrder = bitOrder; |
|||
this->dataMode = dataMode; |
|||
this->dataSize = dataSize; |
|||
} |
|||
uint32_t clock; |
|||
uint32_t dataSize; |
|||
uint32_t clockDivider; |
|||
BitOrder bitOrder; |
|||
uint8_t dataMode; |
|||
uint8_t _SSPin; |
|||
volatile spi_mode_t state; |
|||
spi_dev *spi_d; |
|||
dma_channel spiRxDmaChannel, spiTxDmaChannel; |
|||
dma_dev* spiDmaDev; |
|||
void (*receiveCallback)(void) = NULL; |
|||
void (*transmitCallback)(void) = NULL; |
|||
|
|||
friend class SPIClass; |
|||
}; |
|||
|
|||
/*
|
|||
* Kept for compat. |
|||
*/ |
|||
static const uint8_t ff = 0xFF; |
|||
|
|||
/**
|
|||
* @brief Wirish SPI interface. |
|||
* |
|||
* This implementation uses software slave management, so the caller |
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* is responsible for controlling the slave select line. |
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*/ |
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class SPIClass { |
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|
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public: |
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/**
|
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* @param spiPortNumber Number of the SPI port to manage. |
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*/ |
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SPIClass(uint32_t spiPortNumber); |
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|
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/**
|
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* @brief Equivalent to begin(SPI_1_125MHZ, MSBFIRST, 0). |
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*/ |
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void begin(); |
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|
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/**
|
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* @brief Turn on a SPI port and set its GPIO pin modes for use as a slave. |
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* |
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* SPI port is enabled in full duplex mode, with software slave management. |
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* |
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* @param bitOrder Either LSBFIRST (little-endian) or MSBFIRST(big-endian) |
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* @param mode SPI mode to use |
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*/ |
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void beginSlave(uint32_t bitOrder, uint32_t mode); |
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|
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/**
|
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* @brief Equivalent to beginSlave(MSBFIRST, 0). |
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*/ |
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void beginSlave(); |
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|
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/**
|
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* @brief Disables the SPI port, but leaves its GPIO pin modes unchanged. |
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*/ |
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void end(); |
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|
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void beginTransaction(SPISettings settings) { beginTransaction(BOARD_SPI_DEFAULT_SS, settings); } |
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void beginTransaction(uint8_t pin, SPISettings settings); |
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void endTransaction(); |
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|
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void beginTransactionSlave(SPISettings settings); |
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|
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void setClockDivider(uint32_t clockDivider); |
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void setBitOrder(BitOrder bitOrder); |
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void setDataMode(uint8_t dataMode); |
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|
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// SPI Configuration methods
|
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void attachInterrupt(); |
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void detachInterrupt(); |
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|
|||
/* Victor Perez. Added to change datasize from 8 to 16 bit modes on the fly.
|
|||
* Input parameter should be SPI_CR1_DFF set to 0 or 1 on a 32bit word. |
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* Requires an added function spi_data_size on STM32F1 / cores / maple / libmaple / spi.c |
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*/ |
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void setDataSize(uint32_t ds); |
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|
|||
/* Victor Perez 2017. Added to set and clear callback functions for callback
|
|||
* on DMA transfer completion. |
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* onReceive used to set the callback in case of dmaTransfer (tx/rx), once rx is completed |
|||
* onTransmit used to set the callback in case of dmaSend (tx only). That function |
|||
* will NOT be called in case of TX/RX |
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*/ |
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void onReceive(void(*)(void)); |
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void onTransmit(void(*)(void)); |
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|
|||
/*
|
|||
* I/O |
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*/ |
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|
|||
/**
|
|||
* @brief Return the next unread byte/word. |
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* |
|||
* If there is no unread byte/word waiting, this function will block |
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* until one is received. |
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*/ |
|||
uint16_t read(); |
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|
|||
/**
|
|||
* @brief Read length bytes, storing them into buffer. |
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* @param buffer Buffer to store received bytes into. |
|||
* @param length Number of bytes to store in buffer. This |
|||
* function will block until the desired number of |
|||
* bytes have been read. |
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*/ |
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void read(uint8_t *buffer, uint32_t length); |
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|
|||
/**
|
|||
* @brief Transmit one byte/word. |
|||
* @param data to transmit. |
|||
*/ |
|||
void write(uint16_t data); |
|||
void write16(uint16_t data); // write 2 bytes in 8 bit mode (DFF=0)
|
|||
|
|||
/**
|
|||
* @brief Transmit one byte/word a specified number of times. |
|||
* @param data to transmit. |
|||
*/ |
|||
void write(uint16_t data, uint32_t n); |
|||
|
|||
/**
|
|||
* @brief Transmit multiple bytes/words. |
|||
* @param buffer Bytes/words to transmit. |
|||
* @param length Number of bytes/words in buffer to transmit. |
|||
*/ |
|||
void write(const void * buffer, uint32_t length); |
|||
|
|||
/**
|
|||
* @brief Transmit a byte, then return the next unread byte. |
|||
* |
|||
* This function transmits before receiving. |
|||
* |
|||
* @param data Byte to transmit. |
|||
* @return Next unread byte. |
|||
*/ |
|||
uint8_t transfer(uint8_t data) const; |
|||
uint16_t transfer16(uint16_t data) const; |
|||
|
|||
/**
|
|||
* @brief Sets up a DMA Transfer for "length" bytes. |
|||
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting. |
|||
* |
|||
* This function transmits and receives to buffers. |
|||
* |
|||
* @param transmitBuf buffer Bytes to transmit. If passed as 0, it sends FF repeatedly for "length" bytes |
|||
* @param receiveBuf buffer Bytes to save received data. |
|||
* @param length Number of bytes in buffer to transmit. |
|||
*/ |
|||
uint8_t dmaTransfer(const void * transmitBuf, void * receiveBuf, uint16_t length); |
|||
void dmaTransferSet(const void *transmitBuf, void *receiveBuf); |
|||
uint8_t dmaTransferRepeat(uint16_t length); |
|||
|
|||
/**
|
|||
* @brief Sets up a DMA Transmit for SPI 8 or 16 bit transfer mode. |
|||
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting. |
|||
* |
|||
* This function only transmits and does not care about the RX fifo. |
|||
* |
|||
* @param data buffer half words to transmit, |
|||
* @param length Number of bytes in buffer to transmit. |
|||
* @param minc Set to use Memory Increment mode, clear to use Circular mode. |
|||
*/ |
|||
uint8_t dmaSend(const void * transmitBuf, uint16_t length, bool minc = 1); |
|||
void dmaSendSet(const void * transmitBuf, bool minc); |
|||
uint8_t dmaSendRepeat(uint16_t length); |
|||
|
|||
uint8_t dmaSendAsync(const void * transmitBuf, uint16_t length, bool minc = 1); |
|||
/*
|
|||
* Pin accessors |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief Return the number of the MISO (master in, slave out) pin |
|||
*/ |
|||
uint8_t misoPin(); |
|||
|
|||
/**
|
|||
* @brief Return the number of the MOSI (master out, slave in) pin |
|||
*/ |
|||
uint8_t mosiPin(); |
|||
|
|||
/**
|
|||
* @brief Return the number of the SCK (serial clock) pin |
|||
*/ |
|||
uint8_t sckPin(); |
|||
|
|||
/**
|
|||
* @brief Return the number of the NSS (slave select) pin |
|||
*/ |
|||
uint8_t nssPin(); |
|||
|
|||
/* Escape hatch */ |
|||
|
|||
/**
|
|||
* @brief Get a pointer to the underlying libmaple spi_dev for |
|||
* this HardwareSPI instance. |
|||
*/ |
|||
spi_dev* c_dev(void) { return _currentSetting->spi_d; } |
|||
|
|||
spi_dev* dev() { return _currentSetting->spi_d; } |
|||
|
|||
/**
|
|||
* @brief Sets the number of the SPI peripheral to be used by |
|||
* this HardwareSPI instance. |
|||
* |
|||
* @param spi_num Number of the SPI port. 1-2 in low density devices |
|||
* or 1-3 in high density devices. |
|||
*/ |
|||
void setModule(int spi_num) { |
|||
_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
|||
} |
|||
|
|||
/* -- The following methods are deprecated --------------------------- */ |
|||
|
|||
/**
|
|||
* @brief Deprecated. |
|||
* |
|||
* Use HardwareSPI::transfer() instead. |
|||
* |
|||
* @see HardwareSPI::transfer() |
|||
*/ |
|||
uint8_t send(uint8_t data); |
|||
|
|||
/**
|
|||
* @brief Deprecated. |
|||
* |
|||
* Use HardwareSPI::write() in combination with |
|||
* HardwareSPI::read() (or HardwareSPI::transfer()) instead. |
|||
* |
|||
* @see HardwareSPI::write() |
|||
* @see HardwareSPI::read() |
|||
* @see HardwareSPI::transfer() |
|||
*/ |
|||
uint8_t send(uint8_t *data, uint32_t length); |
|||
|
|||
/**
|
|||
* @brief Deprecated. |
|||
* |
|||
* Use HardwareSPI::read() instead. |
|||
* |
|||
* @see HardwareSPI::read() |
|||
*/ |
|||
uint8_t recv(); |
|||
|
|||
private: |
|||
|
|||
SPISettings _settings[BOARD_NR_SPI]; |
|||
SPISettings *_currentSetting; |
|||
|
|||
void updateSettings(); |
|||
|
|||
/*
|
|||
* Functions added for DMA transfers with Callback. |
|||
* Experimental. |
|||
*/ |
|||
|
|||
void EventCallback(); |
|||
|
|||
#if BOARD_NR_SPI >= 1 |
|||
static void _spi1EventCallback(); |
|||
#endif |
|||
#if BOARD_NR_SPI >= 2 |
|||
static void _spi2EventCallback(); |
|||
#endif |
|||
#if BOARD_NR_SPI >= 3 |
|||
static void _spi3EventCallback(); |
|||
#endif |
|||
/*
|
|||
spi_dev *spi_d; |
|||
uint8_t _SSPin; |
|||
uint32_t clockDivider; |
|||
uint8_t dataMode; |
|||
BitOrder bitOrder; |
|||
*/ |
|||
}; |
|||
|
|||
extern SPIClass SPI; |
Loading…
Reference in new issue