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122 lines
3.3 KiB
122 lines
3.3 KiB
/**
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* \file
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*
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* \brief Chip-specific system clock management functions.
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*
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* Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifdef ARDUINO_ARCH_SAM
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#include "sysclk.h"
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/// @endcond
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/**
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* \weakgroup sysclk_group
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* @{
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*/
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#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__)
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/**
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* \brief Enable full speed USB clock.
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*
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* \note The SAM3X PMC hardware interprets div as div+1. For readability the hardware div+1
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* is hidden in this implementation. Use div as div effective value.
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*
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* \param pll_id Source of the USB clock.
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* \param div Actual clock divisor. Must be superior to 0.
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*/
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void sysclk_enable_usb(void)
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{
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Assert(CONFIG_USBCLK_DIV > 0);
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#ifdef CONFIG_PLL0_SOURCE
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if (CONFIG_USBCLK_SOURCE == USBCLK_SRC_PLL0) {
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struct pll_config pllcfg;
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pll_enable_source(CONFIG_PLL0_SOURCE);
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pll_config_defaults(&pllcfg, 0);
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pll_enable(&pllcfg, 0);
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pll_wait_for_lock(0);
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pmc_switch_udpck_to_pllack(CONFIG_USBCLK_DIV - 1);
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pmc_enable_udpck();
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return;
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}
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#endif
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if (CONFIG_USBCLK_SOURCE == USBCLK_SRC_UPLL) {
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pmc_enable_upll_clock();
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pmc_switch_udpck_to_upllck(CONFIG_USBCLK_DIV - 1);
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pmc_enable_udpck();
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return;
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}
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}
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/**
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* \brief Disable full speed USB clock.
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*
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* \note This implementation does not switch off the PLL, it just turns off the USB clock.
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*/
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void sysclk_disable_usb(void)
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{
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pmc_disable_udpck();
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}
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#endif // CONFIG_USBCLK_SOURCE
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//! @}
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/// @endcond
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#endif // ARDUINO_ARCH_SAM
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