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65 lines
2.2 KiB
65 lines
2.2 KiB
/**
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* Marlin 3D Printer Firmware
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*
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* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
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* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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/**
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* Description:
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*
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* Timers for LPC1768
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*/
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#ifdef TARGET_LPC1768
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#include "../../inc/MarlinConfig.h"
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void HAL_timer_init() {
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SBI(LPC_SC->PCONP, SBIT_TIMER0); // Power ON Timer 0
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LPC_TIM0->PR = (HAL_TIMER_RATE) / (STEPPER_TIMER_RATE) - 1; // Use prescaler to set frequency if needed
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SBI(LPC_SC->PCONP, SBIT_TIMER1); // Power ON Timer 1
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LPC_TIM1->PR = (HAL_TIMER_RATE) / 1000000 - 1;
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}
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void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
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switch (timer_num) {
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case 0:
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LPC_TIM0->MCR = _BV(SBIT_MR0I) | _BV(SBIT_MR0R); // Match on MR0, reset on MR0, interrupts when NVIC enables them
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LPC_TIM0->MR0 = uint32_t(STEPPER_TIMER_RATE) / frequency; // Match value (period) to set frequency
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LPC_TIM0->TCR = _BV(SBIT_CNTEN); // Counter Enable
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NVIC_SetPriority(TIMER0_IRQn, NVIC_EncodePriority(0, 1, 0));
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NVIC_EnableIRQ(TIMER0_IRQn);
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break;
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case 1:
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LPC_TIM1->MCR = _BV(SBIT_MR0I) | _BV(SBIT_MR0R); // Match on MR0, reset on MR0, interrupts when NVIC enables them
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LPC_TIM1->MR0 = uint32_t(TEMP_TIMER_RATE) / frequency;
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LPC_TIM1->TCR = _BV(SBIT_CNTEN); // Counter Enable
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NVIC_SetPriority(TIMER1_IRQn, NVIC_EncodePriority(0, 2, 0));
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NVIC_EnableIRQ(TIMER1_IRQn);
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break;
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default: break;
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}
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}
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#endif // TARGET_LPC1768
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