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118 lines
4.4 KiB
118 lines
4.4 KiB
/**
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* Marlin 3D Printer Firmware
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* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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* Copyright (c) 2017 Victor Perez
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#ifdef __STM32F1__
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#include "../../inc/MarlinConfigPre.h"
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#if ENABLED(POSTMORTEM_DEBUGGING)
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#include "../shared/HAL_MinSerial.h"
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#include "watchdog.h"
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#include <libmaple/usart.h>
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#include <libmaple/rcc.h>
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#include <libmaple/nvic.h>
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/* Instruction Synchronization Barrier */
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#define isb() __asm__ __volatile__ ("isb" : : : "memory")
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/* Data Synchronization Barrier */
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#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
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static void TXBegin() {
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#if !WITHIN(SERIAL_PORT, 1, 6)
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#warning "Using POSTMORTEM_DEBUGGING requires a physical U(S)ART hardware in case of severe error."
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#warning "Disabling the severe error reporting feature currently because the used serial port is not a HW port."
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#else
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// We use MYSERIAL1 here, so we need to figure out how to get the linked register
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struct usart_dev* dev = MYSERIAL1.c_dev();
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// Or use this if removing libmaple
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// int irq = dev->irq_num;
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// int nvicUART[] = { NVIC_USART1 /* = 37 */, NVIC_USART2 /* = 38 */, NVIC_USART3 /* = 39 */, NVIC_UART4 /* = 52 */, NVIC_UART5 /* = 53 */ };
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// Disabling irq means setting the bit in the NVIC ICER register located at
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// Disable UART interrupt in NVIC
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nvic_irq_disable(dev->irq_num);
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// Use this if removing libmaple
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//SBI(NVIC_BASE->ICER[1], irq - 32);
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// We NEED memory barriers to ensure Interrupts are actually disabled!
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// ( https://dzone.com/articles/nvic-disabling-interrupts-on-arm-cortex-m-and-the )
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dsb();
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isb();
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rcc_clk_disable(dev->clk_id);
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rcc_clk_enable(dev->clk_id);
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usart_reg_map *regs = dev->regs;
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regs->CR1 = 0; // Reset the USART
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regs->CR2 = 0; // 1 stop bit
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// If we don't touch the BRR (baudrate register), we don't need to recompute. Else we would need to call
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usart_set_baud_rate(dev, 0, BAUDRATE);
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regs->CR1 = (USART_CR1_TE | USART_CR1_UE); // 8 bits, no parity, 1 stop bit
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#endif
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}
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// A SW memory barrier, to ensure GCC does not overoptimize loops
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#define sw_barrier() __asm__ volatile("": : :"memory");
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static void TX(char c) {
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#if WITHIN(SERIAL_PORT, 1, 6)
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struct usart_dev* dev = MYSERIAL1.c_dev();
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while (!(dev->regs->SR & USART_SR_TXE)) {
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TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
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sw_barrier();
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}
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dev->regs->DR = c;
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#endif
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}
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void install_min_serial() {
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HAL_min_serial_init = &TXBegin;
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HAL_min_serial_out = &TX;
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}
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#if DISABLED(DYNAMIC_VECTORTABLE) && DISABLED(STM32F0xx) // Cortex M0 can't branch to a symbol that's too far, so we have a specific hack for them
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extern "C" {
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__attribute__((naked)) void JumpHandler_ASM() {
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__asm__ __volatile__ (
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"b CommonHandler_ASM\n"
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);
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}
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __exc_hardfault();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __exc_busfault();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __exc_usagefault();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __exc_memmanage();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __exc_nmi();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __stm32reservedexception7();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __stm32reservedexception8();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __stm32reservedexception9();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __stm32reservedexception10();
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void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) __stm32reservedexception13();
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}
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#endif
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#endif // POSTMORTEM_DEBUGGING
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#endif // __STM32F1__
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