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249 lines
7.0 KiB
249 lines
7.0 KiB
/*
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*******************************************************************************
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* Copyright (c) 2019, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#include "pins_arduino.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Digital PinName array
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const PinName digitalPin[] = {
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PA_0, //D0
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PA_1, //D1
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PA_2, //D2
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PA_3, //D3
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PA_4, //D4
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PA_5, //D5
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PA_6, //D6
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PA_7, //D7
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PA_8, //D8
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PA_9, //D9
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PA_10, //D10
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PA_11, //D11
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PA_12, //D12
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PA_13, //D13
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PA_14, //D14
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PA_15, //D15
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PB_0, //D16
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PB_1, //D17
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PB_2, //D18
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PB_3, //D19
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PB_4, //D20
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PB_5, //D21
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PB_6, //D22
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PB_7, //D23
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PB_8, //D24
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PB_9, //D25
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PB_10, //D26
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PB_11, //D27
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PB_12, //D28
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PB_13, //D29
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PB_14, //D30
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PB_15, //D31
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PC_0, //D32
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PC_1, //D33
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PC_2, //D34
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PC_3, //D35
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PC_4, //D36
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PC_5, //D37
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PC_6, //D38
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PC_7, //D39
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PC_8, //D40
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PC_9, //D41
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PC_10, //D42
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PC_11, //D43
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PC_12, //D44
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PC_13, //D45
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PC_14, //D46
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PC_15, //D47
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PD_0, //D48
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PD_1, //D49
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PD_2, //D50
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PD_3, //D51
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PD_4, //D52
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PD_5, //D53
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PD_6, //D54
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PD_7, //D55
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PD_8, //D56
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PD_9, //D57
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PD_10, //D58
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PD_11, //D59
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PD_12, //D60
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PD_13, //D61
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PD_14, //D62
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PD_15, //D63
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PE_0, //D64
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PE_1, //D65
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PE_2, //D66
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PE_3, //D67
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PE_4, //D68
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PE_5, //D69
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PE_6, //D70
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PE_7, //D71
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PE_8, //D72
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PE_9, //D73
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PE_10, //D74
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PE_11, //D75
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PE_12, //D76
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PE_13, //D77
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PE_14, //D78
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PE_15, //D79
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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0, // A0, PA0
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1, // A1, PA1
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2, // A2, PA2
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3, // A3, PA3
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4, // A4, PA4
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5, // A5, PA5
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6, // A6, PA6
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7, // A7, PA7
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16, // A8, PB0
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17, // A9, PB1
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32, // A10, PC0
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33, // A11, PC1
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34, // A12, PC2
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35, // A13, PC3
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36, // A14, PC4
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37, // A15, PC5
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};
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/******************************************************************************/
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/* PLL (clocked by HSE) used as System clock source */
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/******************************************************************************/
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static bool SetSysClock_PLL_HSE(bool bypass)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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bool ret = false;
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// Initializes the CPU, AHB and APB busses clocks
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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if (bypass == false) {
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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} else {
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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}
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RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 8Mhz x 9 = 72MHz
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
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// Initializes the CPU, AHB and APB busses clocks
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
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PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; // 72/1.5 = 48MHz
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#ifndef USBCON
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
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#endif
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
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ret = true;
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}
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}
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}
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return ret;
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}
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/******************************************************************************/
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/* PLL (clocked by HSI) used as System clock source (64MHz max) */
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/******************************************************************************/
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bool SetSysClock_PLL_HSI(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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bool ret = false;
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// Initializes the CPU, AHB and APB busses clocks
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; // 4 MHz
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz
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#ifndef USBCON
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// When the HSI is used as a PLL clock input, the maximum
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// system clock frequency that can be achieved is 64 MHz.
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz, stay close to 72 for delay()
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#endif
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
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// Initializes the CPU, AHB and APB busses clocks
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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// FLASH_LATENCY_1 may cause boot loops
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
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PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; // requires 48 MHz
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#ifndef USBCON
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;// No USB, RTC nor I2S
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PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; // 2 4 6 8
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#endif
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
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ret = true;
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}
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}
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}
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return ret;
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}
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void SystemClock_Config(void)
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{
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/*
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* If HSE_VALUE is not 8MHz and you want use it, then:
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* - Redefine HSE_VALUE to the correct HSE_VALUE
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* - Redefine SystemClock_Config() with the correct settings
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*/
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#if HSE_VALUE == 8000000U
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// 1- Try to start with HSE and external 8MHz xtal
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if (SetSysClock_PLL_HSE(false) == false) {
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// 2- If fail try to start with HSE and external clock
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if (SetSysClock_PLL_HSE(true) == false) {
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#endif
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// 3- If fail start with HSI clock
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if (SetSysClock_PLL_HSI() == false) {
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Error_Handler();
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}
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#if HSE_VALUE == 8000000U
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}
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}
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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