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Strip trailing spaces

pull/1/head
Scott Lahteine 7 years ago
parent
8177c4334e
commit
f423e54f77
7 changed files with 73 additions and 73 deletions
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  1. 2
      Marlin/src/HAL/HAL_STM32F4/HAL_Servo_STM32F4.cpp
  2. 2
      Marlin/src/HAL/platforms.h
  3. 2
      Marlin/src/gcode/calibrate/G28.cpp
  4. 2
      Marlin/src/lcd/lcdprint_hd44780.cpp
  5. 108
      Marlin/src/module/planner.cpp
  6. 2
      Marlin/src/module/probe.cpp
  7. 28
      Marlin/src/pins/pins_STM32F4.h

2
Marlin/src/HAL/HAL_STM32F4/HAL_Servo_STM32F4.cpp
View File

@ -39,7 +39,7 @@ int8_t libServo::attach(const int pin, const int min, const int max) {
void libServo::move(const int value) {
constexpr uint16_t servo_delay[] = SERVO_DELAY;
static_assert(COUNT(servo_delay) == NUM_SERVOS, "SERVO_DELAY must be an array NUM_SERVOS long.");
static_assert(COUNT(servo_delay) == NUM_SERVOS, "SERVO_DELAY must be an array NUM_SERVOS long.");
if (this->attach(0) >= 0) {
this->write(value);
safe_delay(servo_delay[this->servoIndex]);

2
Marlin/src/HAL/platforms.h
View File

@ -14,7 +14,7 @@
#elif defined(__STM32F1__) || defined(TARGET_STM32F1)
#define HAL_PLATFORM HAL_STM32F1
#elif defined(STM32F4)
#define HAL_PLATFORM HAL_STM32F4
#define HAL_PLATFORM HAL_STM32F4
#elif defined(STM32F7)
#define HAL_PLATFORM HAL_STM32F7
#else

2
Marlin/src/gcode/calibrate/G28.cpp
View File

@ -234,7 +234,7 @@ void GcodeSuite::G28(const bool always_home_all) {
#endif
(parser.seenval('R') ? parser.value_linear_units() : Z_HOMING_HEIGHT)
);
if (z_homing_height && (home_all || homeX || homeY)) {
// Raise Z before homing any other axes and z is not already high enough (never lower z)
destination[Z_AXIS] = z_homing_height;

2
Marlin/src/lcd/lcdprint_hd44780.cpp
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@ -95,7 +95,7 @@ static const hd44780_charmap_t g_hd44780_charmap_device[] PROGMEM = {
{IV('「'), 0xA2, 0},
{IV('」'), 0xA3, 0},
{IV('゛'), 0xDE, 0}, // ‶
{IV('゜'), 0xDF, 0}, // '〫'
{IV('゜'), 0xDF, 0}, // '〫'
{IV('゠'), '=', 0},
{IV('ァ'), 0xA7, 0},
{IV('ア'), 0xB1, 0},

108
Marlin/src/module/planner.cpp
View File

@ -407,76 +407,76 @@ void Planner::init() {
__asm__ __volatile__(
// %8:%7:%6 = interval
// r31:r30: MUST be those registers, and they must point to the inv_tab
// r31:r30: MUST be those registers, and they must point to the inv_tab
" clr %13" "\n\t" // %13 = 0
" clr %13" "\n\t" // %13 = 0
// Now we must compute
// result = 0xFFFFFF / d
// Now we must compute
// result = 0xFFFFFF / d
// %8:%7:%6 = interval
// %16:%15:%14 = nr
// %16:%15:%14 = nr
// %13 = 0
// A plain division of 24x24 bits should take 388 cycles to complete. We will
// A plain division of 24x24 bits should take 388 cycles to complete. We will
// use Newton-Raphson for the calculation, and will strive to get way less cycles
// for the same result - Using C division, it takes 500cycles to complete .
" clr %3" "\n\t" // idx = 0
" clr %3" "\n\t" // idx = 0
" mov %14,%6" "\n\t"
" mov %15,%7" "\n\t"
" mov %16,%8" "\n\t" // nr = interval
" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
" brne 2f" "\n\t" // No, skip this
" mov %16,%8" "\n\t" // nr = interval
" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
" brne 2f" "\n\t" // No, skip this
" mov %16,%15" "\n\t"
" mov %15,%14" "\n\t" // nr <<= 8, %14 not needed
" subi %3,-8" "\n\t" // idx += 8
" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
" brne 2f" "\n\t" // No, skip this
" mov %16,%15" "\n\t" // nr <<= 8, %14 not needed
" clr %15" "\n\t" // We clear %14
" subi %3,-8" "\n\t" // idx += 8
// here %16 != 0 and %16:%15 contains at least 9 MSBits, or both %16:%15 are 0
" mov %15,%14" "\n\t" // nr <<= 8, %14 not needed
" subi %3,-8" "\n\t" // idx += 8
" tst %16" "\n\t" // nr & 0xFF0000 == 0 ?
" brne 2f" "\n\t" // No, skip this
" mov %16,%15" "\n\t" // nr <<= 8, %14 not needed
" clr %15" "\n\t" // We clear %14
" subi %3,-8" "\n\t" // idx += 8
// here %16 != 0 and %16:%15 contains at least 9 MSBits, or both %16:%15 are 0
"2:" "\n\t"
" cpi %16,0x10" "\n\t" // (nr & 0xf00000) == 0 ?
" brcc 3f" "\n\t" // No, skip this
" swap %15" "\n\t" // Swap nibbles
" swap %16" "\n\t" // Swap nibbles. Low nibble is 0
" cpi %16,0x10" "\n\t" // (nr & 0xf00000) == 0 ?
" brcc 3f" "\n\t" // No, skip this
" swap %15" "\n\t" // Swap nibbles
" swap %16" "\n\t" // Swap nibbles. Low nibble is 0
" mov %14, %15" "\n\t"
" andi %14,0x0f" "\n\t" // Isolate low nibble
" andi %15,0xf0" "\n\t" // Keep proper nibble in %15
" or %16, %14" "\n\t" // %16:%15 <<= 4
" subi %3,-4" "\n\t" // idx += 4
" andi %14,0x0f" "\n\t" // Isolate low nibble
" andi %15,0xf0" "\n\t" // Keep proper nibble in %15
" or %16, %14" "\n\t" // %16:%15 <<= 4
" subi %3,-4" "\n\t" // idx += 4
"3:" "\n\t"
" cpi %16,0x40" "\n\t" // (nr & 0xc00000) == 0 ?
" cpi %16,0x40" "\n\t" // (nr & 0xc00000) == 0 ?
" brcc 4f" "\n\t" // No, skip this
" add %15,%15" "\n\t"
" adc %16,%16" "\n\t"
" add %15,%15" "\n\t"
" adc %16,%16" "\n\t" // %16:%15 <<= 2
" subi %3,-2" "\n\t" // idx += 2
" adc %16,%16" "\n\t" // %16:%15 <<= 2
" subi %3,-2" "\n\t" // idx += 2
"4:" "\n\t"
" cpi %16,0x80" "\n\t" // (nr & 0x800000) == 0 ?
" brcc 5f" "\n\t" // No, skip this
" cpi %16,0x80" "\n\t" // (nr & 0x800000) == 0 ?
" brcc 5f" "\n\t" // No, skip this
" add %15,%15" "\n\t"
" adc %16,%16" "\n\t" // %16:%15 <<= 1
" inc %3" "\n\t" // idx += 1
" adc %16,%16" "\n\t" // %16:%15 <<= 1
" inc %3" "\n\t" // idx += 1
// Now %16:%15 contains its MSBit set to 1, or %16:%15 is == 0. We are now absolutely sure
// we have at least 9 MSBits available to enter the initial estimation table
"5:" "\n\t"
" add %15,%15" "\n\t"
" adc %16,%16" "\n\t" // %16:%15 = tidx = (nr <<= 1), we lose the top MSBit (always set to 1, %16 is the index into the inverse table)
" add r30,%16" "\n\t" // Only use top 8 bits
" adc r31,%13" "\n\t" // r31:r30 = inv_tab + (tidx)
" lpm %14, Z" "\n\t" // %14 = inv_tab[tidx]
" ldi %15, 1" "\n\t" // %15 = 1 %15:%14 = inv_tab[tidx] + 256
" add r30,%16" "\n\t" // Only use top 8 bits
" adc r31,%13" "\n\t" // r31:r30 = inv_tab + (tidx)
" lpm %14, Z" "\n\t" // %14 = inv_tab[tidx]
" ldi %15, 1" "\n\t" // %15 = 1 %15:%14 = inv_tab[tidx] + 256
// We must scale the approximation to the proper place
" clr %16" "\n\t" // %16 will always be 0 here
" subi %3,8" "\n\t" // idx == 8 ?
" clr %16" "\n\t" // %16 will always be 0 here
" subi %3,8" "\n\t" // idx == 8 ?
" breq 6f" "\n\t" // yes, no need to scale
" brcs 7f" "\n\t" // If C=1, means idx < 8, result was negative!
@ -503,13 +503,13 @@ void Planner::init() {
" or %15,%12" "\n\t" // %15:%16 <<= 4
"16:" "\n\t"
" sbrs %3,3" "\n\t" // shift by 8bits position?
" rjmp 6f" "\n\t" // No, we are done
" rjmp 6f" "\n\t" // No, we are done
" mov %16,%15" "\n\t"
" mov %15,%14" "\n\t"
" clr %14" "\n\t"
" jmp 6f" "\n\t"
// idx < 8, now %3 = idx - 8. Get the count of bits
// idx < 8, now %3 = idx - 8. Get the count of bits
"7:" "\n\t"
" neg %3" "\n\t" // %3 = -idx = count of bits to move right. idx range:[1...8]
" sbrs %3,0" "\n\t" // shift by 1 bit position ?
@ -541,7 +541,7 @@ void Planner::init() {
// Now, we must refine the estimation present on %16:%15:%14 using 1 iteration
// of Newton-Raphson. As it has a quadratic convergence, 1 iteration is enough
// to get more than 18bits of precision (the initial table lookup gives 9 bits of
// precision to start from). 18bits of precision is all what is needed here for result
// precision to start from). 18bits of precision is all what is needed here for result
// %8:%7:%6 = d = interval
// %16:%15:%14 = x = initial estimation of 0x1000000 / d
@ -585,7 +585,7 @@ void Planner::init() {
// %16:%15:%14 = x = initial estimation of 0x1000000 / d
// %3:%2:%1:%0 = (1<<25) - x*d = acc
// %13 = 0
// %13 = 0
// result = %11:%10:%9:%5:%4
" mul %14,%0" "\n\t" // r1:r0 = LO(x) * LO(acc)
@ -599,7 +599,7 @@ void Planner::init() {
" adc %5,r1" "\n\t"
" adc %9,%13" "\n\t"
" adc %10,%13" "\n\t"
" adc %11,%13" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * LO(acc)
" adc %11,%13" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * LO(acc)
" mul %16,%0" "\n\t" // r1:r0 = HI(x) * LO(acc)
" add %5,r0" "\n\t"
" adc %9,r1" "\n\t"
@ -645,12 +645,12 @@ void Planner::init() {
" mul %16,%3" "\n\t" // r1:r0 = HI(x) * HI(acc)
" add %11,r0" "\n\t" // %11:%10:%9:%5:%4 += MI(x) * HI(acc) << 32
// At this point, %11:%10:%9 contains the new estimation of x.
// At this point, %11:%10:%9 contains the new estimation of x.
// Finally, we must correct the result. Estimate remainder as
// (1<<24) - x*d
// %11:%10:%9 = x
// %8:%7:%6 = d = interval" "\n\t"
// (1<<24) - x*d
// %11:%10:%9 = x
// %8:%7:%6 = d = interval" "\n\t"
" ldi %3,1" "\n\t"
" clr %2" "\n\t"
" clr %1" "\n\t"
@ -682,23 +682,23 @@ void Planner::init() {
" mul %7,%11" "\n\t" // r1:r0 = MI(d) * HI(x)
" sub %3,r0" "\n\t" // %3:%2:%1:%0 -= MI(d) * HI(x) << 24
// %3:%2:%1:%0 = r = (1<<24) - x*d
// %8:%7:%6 = d = interval
// %8:%7:%6 = d = interval
// Perform the final correction
" sub %0,%6" "\n\t"
" sbc %1,%7" "\n\t"
" sbc %2,%8" "\n\t" // r -= d
" brcs 14f" "\n\t" // if ( r >= d)
" brcs 14f" "\n\t" // if ( r >= d)
// %11:%10:%9 = x
// %11:%10:%9 = x
" ldi %3,1" "\n\t"
" add %9,%3" "\n\t"
" adc %10,%13" "\n\t"
" adc %11,%13" "\n\t" // x++
"14:" "\n\t"
// Estimation is done. %11:%10:%9 = x
" clr __zero_reg__" "\n\t" // Make C runtime happy
// Estimation is done. %11:%10:%9 = x
" clr __zero_reg__" "\n\t" // Make C runtime happy
// [211 cycles total]
: "=r" (r2),
"=r" (r3),

2
Marlin/src/module/probe.cpp
View File

@ -500,7 +500,7 @@ static bool do_probe_move(const float z, const float fr_mm_m) {
while (thermalManager.isHeatingBed()) safe_delay(200);
lcd_reset_status();
}
#endif
#endif
// Deploy BLTouch at the start of any probe
#if ENABLED(BLTOUCH)

28
Marlin/src/pins/pins_STM32F4.h
View File

@ -125,8 +125,8 @@
// Misc. Functions
//
//#define CASE_LIGHT_PIN_CI PF13
//#define CASE_LIGHT_PIN_DO PF14
//#define CASE_LIGHT_PIN_CI PF13
//#define CASE_LIGHT_PIN_DO PF14
//#define NEOPIXEL_PIN PF13
//
@ -148,24 +148,24 @@
#define SS_PIN PE7
#define LED_PIN PB7 //Alive
#define PS_ON_PIN PA10
#define KILL_PIN PA8
#define KILL_PIN PA8
#define PWR_LOSS PA4 //Power loss / nAC_FAULT
//
// LCD / Controller
//
#define SD_DETECT_PIN PA15
#define BEEPER_PIN PC9
#define LCD_PINS_RS PE9
#define LCD_PINS_ENABLE PE8
#define LCD_PINS_D4 PB12
#define LCD_PINS_D5 PB13
#define LCD_PINS_D6 PB14
#define LCD_PINS_D7 PB15
#define BTN_EN1 PC4
#define BTN_EN2 PC5
#define BTN_ENC PC3
#define SD_DETECT_PIN PA15
#define BEEPER_PIN PC9
#define LCD_PINS_RS PE9
#define LCD_PINS_ENABLE PE8
#define LCD_PINS_D4 PB12
#define LCD_PINS_D5 PB13
#define LCD_PINS_D6 PB14
#define LCD_PINS_D7 PB15
#define BTN_EN1 PC4
#define BTN_EN2 PC5
#define BTN_ENC PC3
//
// Filament runout

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