diff --git a/.gitignore b/.gitignore index 7a436b1f26..bc603ba38b 100755 --- a/.gitignore +++ b/.gitignore @@ -171,7 +171,3 @@ __pycache__ # Simulation / Native eeprom.dat imgui.ini - -#Ozone -ozone.jdebug -ozone.jdebug.user diff --git a/STM32F103.svd b/STM32F103.svd deleted file mode 100644 index 7f234e465c..0000000000 --- a/STM32F103.svd +++ /dev/null @@ -1,31903 +0,0 @@ - - - - CM3 - r1p1 - little - 4 - - STM32F103 - 1.0 - STM32F103 - - - 8 - - 32 - - 0x20 - 0x0 - 0xFFFFFFFF - - - FSMC - Flexible static memory controller - FSMC - 0xA0000000 - - 0x0 - 0x1000 - registers - - - FSMC - FSMC global interrupt - 48 - - - - BCR1 - BCR1 - SRAM/NOR-Flash chip-select control register - 1 - 0x0 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR1 - BTR1 - SRAM/NOR-Flash chip-select timing register - 1 - 0x4 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR2 - BCR2 - SRAM/NOR-Flash chip-select control register - 2 - 0x8 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR2 - BTR2 - SRAM/NOR-Flash chip-select timing register - 2 - 0xC - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR3 - BCR3 - SRAM/NOR-Flash chip-select control register - 3 - 0x10 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR3 - BTR3 - SRAM/NOR-Flash chip-select timing register - 3 - 0x14 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR4 - BCR4 - SRAM/NOR-Flash chip-select control register - 4 - 0x18 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR4 - BTR4 - SRAM/NOR-Flash chip-select timing register - 4 - 0x1C - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - PCR2 - PCR2 - PC Card/NAND Flash control register - 2 - 0x60 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR2 - SR2 - FIFO status and interrupt register - 2 - 0x64 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM2 - PMEM2 - Common memory space timing register - 2 - 0x68 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT2 - PATT2 - Attribute memory space timing register - 2 - 0x6C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - Attribute memory x databus HiZ - time - 24 - 8 - - - ATTHOLDx - Attribute memory x hold - time - 16 - 8 - - - ATTWAITx - Attribute memory x wait - time - 8 - 8 - - - ATTSETx - Attribute memory x setup - time - 0 - 8 - - - - - ECCR2 - ECCR2 - ECC result register 2 - 0x74 - 0x20 - read-only - 0x00000000 - - - ECCx - ECC result - 0 - 32 - - - - - PCR3 - PCR3 - PC Card/NAND Flash control register - 3 - 0x80 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR3 - SR3 - FIFO status and interrupt register - 3 - 0x84 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM3 - PMEM3 - Common memory space timing register - 3 - 0x88 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT3 - PATT3 - Attribute memory space timing register - 3 - 0x8C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR3 - ECCR3 - ECC result register 3 - 0x94 - 0x20 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR4 - PCR4 - PC Card/NAND Flash control register - 4 - 0xA0 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR4 - SR4 - FIFO status and interrupt register - 4 - 0xA4 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM4 - PMEM4 - Common memory space timing register - 4 - 0xA8 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT4 - PATT4 - Attribute memory space timing register - 4 - 0xAC - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - PIO4 - PIO4 - I/O space timing register 4 - 0xB0 - 0x20 - read-write - 0xFCFCFCFC - - - IOHIZx - IOHIZx - 24 - 8 - - - IOHOLDx - IOHOLDx - 16 - 8 - - - IOWAITx - IOWAITx - 8 - 8 - - - IOSETx - IOSETx - 0 - 8 - - - - - BWTR1 - BWTR1 - SRAM/NOR-Flash write timing registers - 1 - 0x104 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR2 - BWTR2 - SRAM/NOR-Flash write timing registers - 2 - 0x10C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR3 - BWTR3 - SRAM/NOR-Flash write timing registers - 3 - 0x114 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR4 - BWTR4 - SRAM/NOR-Flash write timing registers - 4 - 0x11C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - PVD - PVD through EXTI line detection - interrupt - 1 - - - - CR - CR - Power control register - (PWR_CR) - 0x0 - 0x20 - read-write - 0x00000000 - - - LPDS - Low Power Deep Sleep - 0 - 1 - - - PDDS - Power Down Deep Sleep - 1 - 1 - - - CWUF - Clear Wake-up Flag - 2 - 1 - - - CSBF - Clear STANDBY Flag - 3 - 1 - - - PVDE - Power Voltage Detector - Enable - 4 - 1 - - - PLS - PVD Level Selection - 5 - 3 - - - DBP - Disable Backup Domain write - protection - 8 - 1 - - - - - CSR - CSR - Power control register - (PWR_CR) - 0x4 - 0x20 - 0x00000000 - - - WUF - Wake-Up Flag - 0 - 1 - read-only - - - SBF - STANDBY Flag - 1 - 1 - read-only - - - PVDO - PVD Output - 2 - 1 - read-only - - - EWUP - Enable WKUP pin - 8 - 1 - read-write - - - - - - - RCC - Reset and clock control - RCC - 0x40021000 - - 0x0 - 0x400 - registers - - - RCC - RCC global interrupt - 5 - - - - CR - CR - Clock control register - 0x0 - 0x20 - 0x00000083 - - - HSION - Internal High Speed clock - enable - 0 - 1 - read-write - - - HSIRDY - Internal High Speed clock ready - flag - 1 - 1 - read-only - - - HSITRIM - Internal High Speed clock - trimming - 3 - 5 - read-write - - - HSICAL - Internal High Speed clock - Calibration - 8 - 8 - read-only - - - HSEON - External High Speed clock - enable - 16 - 1 - read-write - - - HSERDY - External High Speed clock ready - flag - 17 - 1 - read-only - - - HSEBYP - External High Speed clock - Bypass - 18 - 1 - read-write - - - CSSON - Clock Security System - enable - 19 - 1 - read-write - - - PLLON - PLL enable - 24 - 1 - read-write - - - PLLRDY - PLL clock ready flag - 25 - 1 - read-only - - - - - CFGR - CFGR - Clock configuration register - (RCC_CFGR) - 0x4 - 0x20 - 0x00000000 - - - SW - System clock Switch - 0 - 2 - read-write - - - SWS - System Clock Switch Status - 2 - 2 - read-only - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - PPRE1 - APB Low speed prescaler - (APB1) - 8 - 3 - read-write - - - PPRE2 - APB High speed prescaler - (APB2) - 11 - 3 - read-write - - - ADCPRE - ADC prescaler - 14 - 2 - read-write - - - PLLSRC - PLL entry clock source - 16 - 1 - read-write - - - PLLXTPRE - HSE divider for PLL entry - 17 - 1 - read-write - - - PLLMUL - PLL Multiplication Factor - 18 - 4 - read-write - - - OTGFSPRE - USB OTG FS prescaler - 22 - 1 - read-write - - - MCO - Microcontroller clock - output - 24 - 3 - read-write - - - - - CIR - CIR - Clock interrupt register - (RCC_CIR) - 0x8 - 0x20 - 0x00000000 - - - LSIRDYF - LSI Ready Interrupt flag - 0 - 1 - read-only - - - LSERDYF - LSE Ready Interrupt flag - 1 - 1 - read-only - - - HSIRDYF - HSI Ready Interrupt flag - 2 - 1 - read-only - - - HSERDYF - HSE Ready Interrupt flag - 3 - 1 - read-only - - - PLLRDYF - PLL Ready Interrupt flag - 4 - 1 - read-only - - - CSSF - Clock Security System Interrupt - flag - 7 - 1 - read-only - - - LSIRDYIE - LSI Ready Interrupt Enable - 8 - 1 - read-write - - - LSERDYIE - LSE Ready Interrupt Enable - 9 - 1 - read-write - - - HSIRDYIE - HSI Ready Interrupt Enable - 10 - 1 - read-write - - - HSERDYIE - HSE Ready Interrupt Enable - 11 - 1 - read-write - - - PLLRDYIE - PLL Ready Interrupt Enable - 12 - 1 - read-write - - - LSIRDYC - LSI Ready Interrupt Clear - 16 - 1 - write-only - - - LSERDYC - LSE Ready Interrupt Clear - 17 - 1 - write-only - - - HSIRDYC - HSI Ready Interrupt Clear - 18 - 1 - write-only - - - HSERDYC - HSE Ready Interrupt Clear - 19 - 1 - write-only - - - PLLRDYC - PLL Ready Interrupt Clear - 20 - 1 - write-only - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - - - APB2RSTR - APB2RSTR - APB2 peripheral reset register - (RCC_APB2RSTR) - 0xC - 0x20 - read-write - 0x000000000 - - - AFIORST - Alternate function I/O - reset - 0 - 1 - - - IOPARST - IO port A reset - 2 - 1 - - - IOPBRST - IO port B reset - 3 - 1 - - - IOPCRST - IO port C reset - 4 - 1 - - - IOPDRST - IO port D reset - 5 - 1 - - - IOPERST - IO port E reset - 6 - 1 - - - IOPFRST - IO port F reset - 7 - 1 - - - IOPGRST - IO port G reset - 8 - 1 - - - ADC1RST - ADC 1 interface reset - 9 - 1 - - - ADC2RST - ADC 2 interface reset - 10 - 1 - - - TIM1RST - TIM1 timer reset - 11 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - TIM8RST - TIM8 timer reset - 13 - 1 - - - USART1RST - USART1 reset - 14 - 1 - - - ADC3RST - ADC 3 interface reset - 15 - 1 - - - TIM9RST - TIM9 timer reset - 19 - 1 - - - TIM10RST - TIM10 timer reset - 20 - 1 - - - TIM11RST - TIM11 timer reset - 21 - 1 - - - - - APB1RSTR - APB1RSTR - APB1 peripheral reset register - (RCC_APB1RSTR) - 0x10 - 0x20 - read-write - 0x00000000 - - - TIM2RST - Timer 2 reset - 0 - 1 - - - TIM3RST - Timer 3 reset - 1 - 1 - - - TIM4RST - Timer 4 reset - 2 - 1 - - - TIM5RST - Timer 5 reset - 3 - 1 - - - TIM6RST - Timer 6 reset - 4 - 1 - - - TIM7RST - Timer 7 reset - 5 - 1 - - - TIM12RST - Timer 12 reset - 6 - 1 - - - TIM13RST - Timer 13 reset - 7 - 1 - - - TIM14RST - Timer 14 reset - 8 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - SPI2RST - SPI2 reset - 14 - 1 - - - SPI3RST - SPI3 reset - 15 - 1 - - - USART2RST - USART 2 reset - 17 - 1 - - - USART3RST - USART 3 reset - 18 - 1 - - - UART4RST - UART 4 reset - 19 - 1 - - - UART5RST - UART 5 reset - 20 - 1 - - - I2C1RST - I2C1 reset - 21 - 1 - - - I2C2RST - I2C2 reset - 22 - 1 - - - USBRST - USB reset - 23 - 1 - - - CANRST - CAN reset - 25 - 1 - - - BKPRST - Backup interface reset - 27 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - DACRST - DAC interface reset - 29 - 1 - - - - - AHBENR - AHBENR - AHB Peripheral Clock enable register - (RCC_AHBENR) - 0x14 - 0x20 - read-write - 0x00000014 - - - DMA1EN - DMA1 clock enable - 0 - 1 - - - DMA2EN - DMA2 clock enable - 1 - 1 - - - SRAMEN - SRAM interface clock - enable - 2 - 1 - - - FLITFEN - FLITF clock enable - 4 - 1 - - - CRCEN - CRC clock enable - 6 - 1 - - - FSMCEN - FSMC clock enable - 8 - 1 - - - SDIOEN - SDIO clock enable - 10 - 1 - - - - - APB2ENR - APB2ENR - APB2 peripheral clock enable register - (RCC_APB2ENR) - 0x18 - 0x20 - read-write - 0x00000000 - - - AFIOEN - Alternate function I/O clock - enable - 0 - 1 - - - IOPAEN - I/O port A clock enable - 2 - 1 - - - IOPBEN - I/O port B clock enable - 3 - 1 - - - IOPCEN - I/O port C clock enable - 4 - 1 - - - IOPDEN - I/O port D clock enable - 5 - 1 - - - IOPEEN - I/O port E clock enable - 6 - 1 - - - IOPFEN - I/O port F clock enable - 7 - 1 - - - IOPGEN - I/O port G clock enable - 8 - 1 - - - ADC1EN - ADC 1 interface clock - enable - 9 - 1 - - - ADC2EN - ADC 2 interface clock - enable - 10 - 1 - - - TIM1EN - TIM1 Timer clock enable - 11 - 1 - - - SPI1EN - SPI 1 clock enable - 12 - 1 - - - TIM8EN - TIM8 Timer clock enable - 13 - 1 - - - USART1EN - USART1 clock enable - 14 - 1 - - - ADC3EN - ADC3 interface clock - enable - 15 - 1 - - - TIM9EN - TIM9 Timer clock enable - 19 - 1 - - - TIM10EN - TIM10 Timer clock enable - 20 - 1 - - - TIM11EN - TIM11 Timer clock enable - 21 - 1 - - - - - APB1ENR - APB1ENR - APB1 peripheral clock enable register - (RCC_APB1ENR) - 0x1C - 0x20 - read-write - 0x00000000 - - - TIM2EN - Timer 2 clock enable - 0 - 1 - - - TIM3EN - Timer 3 clock enable - 1 - 1 - - - TIM4EN - Timer 4 clock enable - 2 - 1 - - - TIM5EN - Timer 5 clock enable - 3 - 1 - - - TIM6EN - Timer 6 clock enable - 4 - 1 - - - TIM7EN - Timer 7 clock enable - 5 - 1 - - - TIM12EN - Timer 12 clock enable - 6 - 1 - - - TIM13EN - Timer 13 clock enable - 7 - 1 - - - TIM14EN - Timer 14 clock enable - 8 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - SPI2EN - SPI 2 clock enable - 14 - 1 - - - SPI3EN - SPI 3 clock enable - 15 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - USART3EN - USART 3 clock enable - 18 - 1 - - - UART4EN - UART 4 clock enable - 19 - 1 - - - UART5EN - UART 5 clock enable - 20 - 1 - - - I2C1EN - I2C 1 clock enable - 21 - 1 - - - I2C2EN - I2C 2 clock enable - 22 - 1 - - - USBEN - USB clock enable - 23 - 1 - - - CANEN - CAN clock enable - 25 - 1 - - - BKPEN - Backup interface clock - enable - 27 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - DACEN - DAC interface clock enable - 29 - 1 - - - - - BDCR - BDCR - Backup domain control register - (RCC_BDCR) - 0x20 - 0x20 - 0x00000000 - - - LSEON - External Low Speed oscillator - enable - 0 - 1 - read-write - - - LSERDY - External Low Speed oscillator - ready - 1 - 1 - read-only - - - LSEBYP - External Low Speed oscillator - bypass - 2 - 1 - read-write - - - RTCSEL - RTC clock source selection - 8 - 2 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - - - CSR - CSR - Control/status register - (RCC_CSR) - 0x24 - 0x20 - 0x0C000000 - - - LSION - Internal low speed oscillator - enable - 0 - 1 - read-write - - - LSIRDY - Internal low speed oscillator - ready - 1 - 1 - read-only - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - PINRSTF - PIN reset flag - 26 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - IWDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - - - - - GPIOA - General purpose I/O - GPIO - 0x40010800 - - 0x0 - 0x400 - registers - - - - CRL - CRL - Port configuration register low - (GPIOn_CRL) - 0x0 - 0x20 - read-write - 0x44444444 - - - MODE0 - Port n.0 mode bits - 0 - 2 - - - CNF0 - Port n.0 configuration - bits - 2 - 2 - - - MODE1 - Port n.1 mode bits - 4 - 2 - - - CNF1 - Port n.1 configuration - bits - 6 - 2 - - - MODE2 - Port n.2 mode bits - 8 - 2 - - - CNF2 - Port n.2 configuration - bits - 10 - 2 - - - MODE3 - Port n.3 mode bits - 12 - 2 - - - CNF3 - Port n.3 configuration - bits - 14 - 2 - - - MODE4 - Port n.4 mode bits - 16 - 2 - - - CNF4 - Port n.4 configuration - bits - 18 - 2 - - - MODE5 - Port n.5 mode bits - 20 - 2 - - - CNF5 - Port n.5 configuration - bits - 22 - 2 - - - MODE6 - Port n.6 mode bits - 24 - 2 - - - CNF6 - Port n.6 configuration - bits - 26 - 2 - - - MODE7 - Port n.7 mode bits - 28 - 2 - - - CNF7 - Port n.7 configuration - bits - 30 - 2 - - - - - CRH - CRH - Port configuration register high - (GPIOn_CRL) - 0x4 - 0x20 - read-write - 0x44444444 - - - MODE8 - Port n.8 mode bits - 0 - 2 - - - CNF8 - Port n.8 configuration - bits - 2 - 2 - - - MODE9 - Port n.9 mode bits - 4 - 2 - - - CNF9 - Port n.9 configuration - bits - 6 - 2 - - - MODE10 - Port n.10 mode bits - 8 - 2 - - - CNF10 - Port n.10 configuration - bits - 10 - 2 - - - MODE11 - Port n.11 mode bits - 12 - 2 - - - CNF11 - Port n.11 configuration - bits - 14 - 2 - - - MODE12 - Port n.12 mode bits - 16 - 2 - - - CNF12 - Port n.12 configuration - bits - 18 - 2 - - - MODE13 - Port n.13 mode bits - 20 - 2 - - - CNF13 - Port n.13 configuration - bits - 22 - 2 - - - MODE14 - Port n.14 mode bits - 24 - 2 - - - CNF14 - Port n.14 configuration - bits - 26 - 2 - - - MODE15 - Port n.15 mode bits - 28 - 2 - - - CNF15 - Port n.15 configuration - bits - 30 - 2 - - - - - IDR - IDR - Port input data register - (GPIOn_IDR) - 0x8 - 0x20 - read-only - 0x00000000 - - - IDR0 - Port input data - 0 - 1 - - - IDR1 - Port input data - 1 - 1 - - - IDR2 - Port input data - 2 - 1 - - - IDR3 - Port input data - 3 - 1 - - - IDR4 - Port input data - 4 - 1 - - - IDR5 - Port input data - 5 - 1 - - - IDR6 - Port input data - 6 - 1 - - - IDR7 - Port input data - 7 - 1 - - - IDR8 - Port input data - 8 - 1 - - - IDR9 - Port input data - 9 - 1 - - - IDR10 - Port input data - 10 - 1 - - - IDR11 - Port input data - 11 - 1 - - - IDR12 - Port input data - 12 - 1 - - - IDR13 - Port input data - 13 - 1 - - - IDR14 - Port input data - 14 - 1 - - - IDR15 - Port input data - 15 - 1 - - - - - ODR - ODR - Port output data register - (GPIOn_ODR) - 0xC - 0x20 - read-write - 0x00000000 - - - ODR0 - Port output data - 0 - 1 - - - ODR1 - Port output data - 1 - 1 - - - ODR2 - Port output data - 2 - 1 - - - ODR3 - Port output data - 3 - 1 - - - ODR4 - Port output data - 4 - 1 - - - ODR5 - Port output data - 5 - 1 - - - ODR6 - Port output data - 6 - 1 - - - ODR7 - Port output data - 7 - 1 - - - ODR8 - Port output data - 8 - 1 - - - ODR9 - Port output data - 9 - 1 - - - ODR10 - Port output data - 10 - 1 - - - ODR11 - Port output data - 11 - 1 - - - ODR12 - Port output data - 12 - 1 - - - ODR13 - Port output data - 13 - 1 - - - ODR14 - Port output data - 14 - 1 - - - ODR15 - Port output data - 15 - 1 - - - - - BSRR - BSRR - Port bit set/reset register - (GPIOn_BSRR) - 0x10 - 0x20 - write-only - 0x00000000 - - - BS0 - Set bit 0 - 0 - 1 - - - BS1 - Set bit 1 - 1 - 1 - - - BS2 - Set bit 1 - 2 - 1 - - - BS3 - Set bit 3 - 3 - 1 - - - BS4 - Set bit 4 - 4 - 1 - - - BS5 - Set bit 5 - 5 - 1 - - - BS6 - Set bit 6 - 6 - 1 - - - BS7 - Set bit 7 - 7 - 1 - - - BS8 - Set bit 8 - 8 - 1 - - - BS9 - Set bit 9 - 9 - 1 - - - BS10 - Set bit 10 - 10 - 1 - - - BS11 - Set bit 11 - 11 - 1 - - - BS12 - Set bit 12 - 12 - 1 - - - BS13 - Set bit 13 - 13 - 1 - - - BS14 - Set bit 14 - 14 - 1 - - - BS15 - Set bit 15 - 15 - 1 - - - BR0 - Reset bit 0 - 16 - 1 - - - BR1 - Reset bit 1 - 17 - 1 - - - BR2 - Reset bit 2 - 18 - 1 - - - BR3 - Reset bit 3 - 19 - 1 - - - BR4 - Reset bit 4 - 20 - 1 - - - BR5 - Reset bit 5 - 21 - 1 - - - BR6 - Reset bit 6 - 22 - 1 - - - BR7 - Reset bit 7 - 23 - 1 - - - BR8 - Reset bit 8 - 24 - 1 - - - BR9 - Reset bit 9 - 25 - 1 - - - BR10 - Reset bit 10 - 26 - 1 - - - BR11 - Reset bit 11 - 27 - 1 - - - BR12 - Reset bit 12 - 28 - 1 - - - BR13 - Reset bit 13 - 29 - 1 - - - BR14 - Reset bit 14 - 30 - 1 - - - BR15 - Reset bit 15 - 31 - 1 - - - - - BRR - BRR - Port bit reset register - (GPIOn_BRR) - 0x14 - 0x20 - write-only - 0x00000000 - - - BR0 - Reset bit 0 - 0 - 1 - - - BR1 - Reset bit 1 - 1 - 1 - - - BR2 - Reset bit 1 - 2 - 1 - - - BR3 - Reset bit 3 - 3 - 1 - - - BR4 - Reset bit 4 - 4 - 1 - - - BR5 - Reset bit 5 - 5 - 1 - - - BR6 - Reset bit 6 - 6 - 1 - - - BR7 - Reset bit 7 - 7 - 1 - - - BR8 - Reset bit 8 - 8 - 1 - - - BR9 - Reset bit 9 - 9 - 1 - - - BR10 - Reset bit 10 - 10 - 1 - - - BR11 - Reset bit 11 - 11 - 1 - - - BR12 - Reset bit 12 - 12 - 1 - - - BR13 - Reset bit 13 - 13 - 1 - - - BR14 - Reset bit 14 - 14 - 1 - - - BR15 - Reset bit 15 - 15 - 1 - - - - - LCKR - LCKR - Port configuration lock - register - 0x18 - 0x20 - read-write - 0x00000000 - - - LCK0 - Port A Lock bit 0 - 0 - 1 - - - LCK1 - Port A Lock bit 1 - 1 - 1 - - - LCK2 - Port A Lock bit 2 - 2 - 1 - - - LCK3 - Port A Lock bit 3 - 3 - 1 - - - LCK4 - Port A Lock bit 4 - 4 - 1 - - - LCK5 - Port A Lock bit 5 - 5 - 1 - - - LCK6 - Port A Lock bit 6 - 6 - 1 - - - LCK7 - Port A Lock bit 7 - 7 - 1 - - - LCK8 - Port A Lock bit 8 - 8 - 1 - - - LCK9 - Port A Lock bit 9 - 9 - 1 - - - LCK10 - Port A Lock bit 10 - 10 - 1 - - - LCK11 - Port A Lock bit 11 - 11 - 1 - - - LCK12 - Port A Lock bit 12 - 12 - 1 - - - LCK13 - Port A Lock bit 13 - 13 - 1 - - - LCK14 - Port A Lock bit 14 - 14 - 1 - - - LCK15 - Port A Lock bit 15 - 15 - 1 - - - LCKK - Lock key - 16 - 1 - - - - - - - GPIOB - 0x40010C00 - - - GPIOC - 0x40011000 - - - GPIOD - 0x40011400 - - - GPIOE - 0x40011800 - - - GPIOF - 0x40011C00 - - - GPIOG - 0x40012000 - - - AFIO - Alternate function I/O - AFIO - 0x40010000 - - 0x0 - 0x400 - registers - - - - EVCR - EVCR - Event Control Register - (AFIO_EVCR) - 0x0 - 0x20 - read-write - 0x00000000 - - - PIN - Pin selection - 0 - 4 - - - PORT - Port selection - 4 - 3 - - - EVOE - Event Output Enable - 7 - 1 - - - - - MAPR - MAPR - AF remap and debug I/O configuration - register (AFIO_MAPR) - 0x4 - 0x20 - 0x00000000 - - - SPI1_REMAP - SPI1 remapping - 0 - 1 - read-write - - - I2C1_REMAP - I2C1 remapping - 1 - 1 - read-write - - - USART1_REMAP - USART1 remapping - 2 - 1 - read-write - - - USART2_REMAP - USART2 remapping - 3 - 1 - read-write - - - USART3_REMAP - USART3 remapping - 4 - 2 - read-write - - - TIM1_REMAP - TIM1 remapping - 6 - 2 - read-write - - - TIM2_REMAP - TIM2 remapping - 8 - 2 - read-write - - - TIM3_REMAP - TIM3 remapping - 10 - 2 - read-write - - - TIM4_REMAP - TIM4 remapping - 12 - 1 - read-write - - - CAN_REMAP - CAN1 remapping - 13 - 2 - read-write - - - PD01_REMAP - Port D0/Port D1 mapping on - OSCIN/OSCOUT - 15 - 1 - read-write - - - TIM5CH4_IREMAP - Set and cleared by - software - 16 - 1 - read-write - - - ADC1_ETRGINJ_REMAP - ADC 1 External trigger injected - conversion remapping - 17 - 1 - read-write - - - ADC1_ETRGREG_REMAP - ADC 1 external trigger regular - conversion remapping - 18 - 1 - read-write - - - ADC2_ETRGINJ_REMAP - ADC 2 external trigger injected - conversion remapping - 19 - 1 - read-write - - - ADC2_ETRGREG_REMAP - ADC 2 external trigger regular - conversion remapping - 20 - 1 - read-write - - - SWJ_CFG - Serial wire JTAG - configuration - 24 - 3 - write-only - - - - - EXTICR1 - EXTICR1 - External interrupt configuration register 1 - (AFIO_EXTICR1) - 0x8 - 0x20 - read-write - 0x00000000 - - - EXTI0 - EXTI0 configuration - 0 - 4 - - - EXTI1 - EXTI1 configuration - 4 - 4 - - - EXTI2 - EXTI2 configuration - 8 - 4 - - - EXTI3 - EXTI3 configuration - 12 - 4 - - - - - EXTICR2 - EXTICR2 - External interrupt configuration register 2 - (AFIO_EXTICR2) - 0xC - 0x20 - read-write - 0x00000000 - - - EXTI4 - EXTI4 configuration - 0 - 4 - - - EXTI5 - EXTI5 configuration - 4 - 4 - - - EXTI6 - EXTI6 configuration - 8 - 4 - - - EXTI7 - EXTI7 configuration - 12 - 4 - - - - - EXTICR3 - EXTICR3 - External interrupt configuration register 3 - (AFIO_EXTICR3) - 0x10 - 0x20 - read-write - 0x00000000 - - - EXTI8 - EXTI8 configuration - 0 - 4 - - - EXTI9 - EXTI9 configuration - 4 - 4 - - - EXTI10 - EXTI10 configuration - 8 - 4 - - - EXTI11 - EXTI11 configuration - 12 - 4 - - - - - EXTICR4 - EXTICR4 - External interrupt configuration register 4 - (AFIO_EXTICR4) - 0x14 - 0x20 - read-write - 0x00000000 - - - EXTI12 - EXTI12 configuration - 0 - 4 - - - EXTI13 - EXTI13 configuration - 4 - 4 - - - EXTI14 - EXTI14 configuration - 8 - 4 - - - EXTI15 - EXTI15 configuration - 12 - 4 - - - - - MAPR2 - MAPR2 - AF remap and debug I/O configuration - register - 0x1C - 0x20 - read-write - 0x00000000 - - - TIM9_REMAP - TIM9 remapping - 5 - 1 - - - TIM10_REMAP - TIM10 remapping - 6 - 1 - - - TIM11_REMAP - TIM11 remapping - 7 - 1 - - - TIM13_REMAP - TIM13 remapping - 8 - 1 - - - TIM14_REMAP - TIM14 remapping - 9 - 1 - - - FSMC_NADV - NADV connect/disconnect - 10 - 1 - - - - - - - EXTI - EXTI - EXTI - 0x40010400 - - 0x0 - 0x400 - registers - - - TAMPER - Tamper interrupt - 2 - - - EXTI0 - EXTI Line0 interrupt - 6 - - - EXTI1 - EXTI Line1 interrupt - 7 - - - EXTI2 - EXTI Line2 interrupt - 8 - - - EXTI3 - EXTI Line3 interrupt - 9 - - - EXTI4 - EXTI Line4 interrupt - 10 - - - EXTI9_5 - EXTI Line[9:5] interrupts - 23 - - - EXTI15_10 - EXTI Line[15:10] interrupts - 40 - - - - IMR - IMR - Interrupt mask register - (EXTI_IMR) - 0x0 - 0x20 - read-write - 0x00000000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - - - EMR - EMR - Event mask register (EXTI_EMR) - 0x4 - 0x20 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - - - RTSR - RTSR - Rising Trigger selection register - (EXTI_RTSR) - 0x8 - 0x20 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Rising trigger event configuration of - line 18 - 18 - 1 - - - - - FTSR - FTSR - Falling Trigger selection register - (EXTI_FTSR) - 0xC - 0x20 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Falling trigger event configuration of - line 18 - 18 - 1 - - - - - SWIER - SWIER - Software interrupt event register - (EXTI_SWIER) - 0x10 - 0x20 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER18 - Software Interrupt on line - 18 - 18 - 1 - - - - - PR - PR - Pending register (EXTI_PR) - 0x14 - 0x20 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR18 - Pending bit 18 - 18 - 1 - - - - - - - DMA1 - DMA controller - DMA - 0x40020000 - - 0x0 - 0x400 - registers - - - DMA1_Channel1 - DMA1 Channel1 global interrupt - 11 - - - DMA1_Channel2 - DMA1 Channel2 global interrupt - 12 - - - DMA1_Channel3 - DMA1 Channel3 global interrupt - 13 - - - DMA1_Channel4 - DMA1 Channel4 global interrupt - 14 - - - DMA1_Channel5 - DMA1 Channel5 global interrupt - 15 - - - DMA1_Channel6 - DMA1 Channel6 global interrupt - 16 - - - DMA1_Channel7 - DMA1 Channel7 global interrupt - 17 - - - - ISR - ISR - DMA interrupt status register - (DMA_ISR) - 0x0 - 0x20 - read-only - 0x00000000 - - - GIF1 - Channel 1 Global interrupt - flag - 0 - 1 - - - TCIF1 - Channel 1 Transfer Complete - flag - 1 - 1 - - - HTIF1 - Channel 1 Half Transfer Complete - flag - 2 - 1 - - - TEIF1 - Channel 1 Transfer Error - flag - 3 - 1 - - - GIF2 - Channel 2 Global interrupt - flag - 4 - 1 - - - TCIF2 - Channel 2 Transfer Complete - flag - 5 - 1 - - - HTIF2 - Channel 2 Half Transfer Complete - flag - 6 - 1 - - - TEIF2 - Channel 2 Transfer Error - flag - 7 - 1 - - - GIF3 - Channel 3 Global interrupt - flag - 8 - 1 - - - TCIF3 - Channel 3 Transfer Complete - flag - 9 - 1 - - - HTIF3 - Channel 3 Half Transfer Complete - flag - 10 - 1 - - - TEIF3 - Channel 3 Transfer Error - flag - 11 - 1 - - - GIF4 - Channel 4 Global interrupt - flag - 12 - 1 - - - TCIF4 - Channel 4 Transfer Complete - flag - 13 - 1 - - - HTIF4 - Channel 4 Half Transfer Complete - flag - 14 - 1 - - - TEIF4 - Channel 4 Transfer Error - flag - 15 - 1 - - - GIF5 - Channel 5 Global interrupt - flag - 16 - 1 - - - TCIF5 - Channel 5 Transfer Complete - flag - 17 - 1 - - - HTIF5 - Channel 5 Half Transfer Complete - flag - 18 - 1 - - - TEIF5 - Channel 5 Transfer Error - flag - 19 - 1 - - - GIF6 - Channel 6 Global interrupt - flag - 20 - 1 - - - TCIF6 - Channel 6 Transfer Complete - flag - 21 - 1 - - - HTIF6 - Channel 6 Half Transfer Complete - flag - 22 - 1 - - - TEIF6 - Channel 6 Transfer Error - flag - 23 - 1 - - - GIF7 - Channel 7 Global interrupt - flag - 24 - 1 - - - TCIF7 - Channel 7 Transfer Complete - flag - 25 - 1 - - - HTIF7 - Channel 7 Half Transfer Complete - flag - 26 - 1 - - - TEIF7 - Channel 7 Transfer Error - flag - 27 - 1 - - - - - IFCR - IFCR - DMA interrupt flag clear register - (DMA_IFCR) - 0x4 - 0x20 - write-only - 0x00000000 - - - CGIF1 - Channel 1 Global interrupt - clear - 0 - 1 - - - CGIF2 - Channel 2 Global interrupt - clear - 4 - 1 - - - CGIF3 - Channel 3 Global interrupt - clear - 8 - 1 - - - CGIF4 - Channel 4 Global interrupt - clear - 12 - 1 - - - CGIF5 - Channel 5 Global interrupt - clear - 16 - 1 - - - CGIF6 - Channel 6 Global interrupt - clear - 20 - 1 - - - CGIF7 - Channel 7 Global interrupt - clear - 24 - 1 - - - CTCIF1 - Channel 1 Transfer Complete - clear - 1 - 1 - - - CTCIF2 - Channel 2 Transfer Complete - clear - 5 - 1 - - - CTCIF3 - Channel 3 Transfer Complete - clear - 9 - 1 - - - CTCIF4 - Channel 4 Transfer Complete - clear - 13 - 1 - - - CTCIF5 - Channel 5 Transfer Complete - clear - 17 - 1 - - - CTCIF6 - Channel 6 Transfer Complete - clear - 21 - 1 - - - CTCIF7 - Channel 7 Transfer Complete - clear - 25 - 1 - - - CHTIF1 - Channel 1 Half Transfer - clear - 2 - 1 - - - CHTIF2 - Channel 2 Half Transfer - clear - 6 - 1 - - - CHTIF3 - Channel 3 Half Transfer - clear - 10 - 1 - - - CHTIF4 - Channel 4 Half Transfer - clear - 14 - 1 - - - CHTIF5 - Channel 5 Half Transfer - clear - 18 - 1 - - - CHTIF6 - Channel 6 Half Transfer - clear - 22 - 1 - - - CHTIF7 - Channel 7 Half Transfer - clear - 26 - 1 - - - CTEIF1 - Channel 1 Transfer Error - clear - 3 - 1 - - - CTEIF2 - Channel 2 Transfer Error - clear - 7 - 1 - - - CTEIF3 - Channel 3 Transfer Error - clear - 11 - 1 - - - CTEIF4 - Channel 4 Transfer Error - clear - 15 - 1 - - - CTEIF5 - Channel 5 Transfer Error - clear - 19 - 1 - - - CTEIF6 - Channel 6 Transfer Error - clear - 23 - 1 - - - CTEIF7 - Channel 7 Transfer Error - clear - 27 - 1 - - - - - CCR1 - CCR1 - DMA channel configuration register - (DMA_CCR) - 0x8 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR1 - CNDTR1 - DMA channel 1 number of data - register - 0xC - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR1 - CPAR1 - DMA channel 1 peripheral address - register - 0x10 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR1 - CMAR1 - DMA channel 1 memory address - register - 0x14 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR2 - CCR2 - DMA channel configuration register - (DMA_CCR) - 0x1C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR2 - CNDTR2 - DMA channel 2 number of data - register - 0x20 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR2 - CPAR2 - DMA channel 2 peripheral address - register - 0x24 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR2 - CMAR2 - DMA channel 2 memory address - register - 0x28 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR3 - CCR3 - DMA channel configuration register - (DMA_CCR) - 0x30 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR3 - CNDTR3 - DMA channel 3 number of data - register - 0x34 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR3 - CPAR3 - DMA channel 3 peripheral address - register - 0x38 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR3 - CMAR3 - DMA channel 3 memory address - register - 0x3C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR4 - CCR4 - DMA channel configuration register - (DMA_CCR) - 0x44 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR4 - CNDTR4 - DMA channel 4 number of data - register - 0x48 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR4 - CPAR4 - DMA channel 4 peripheral address - register - 0x4C - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR4 - CMAR4 - DMA channel 4 memory address - register - 0x50 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR5 - CCR5 - DMA channel configuration register - (DMA_CCR) - 0x58 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR5 - CNDTR5 - DMA channel 5 number of data - register - 0x5C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR5 - CPAR5 - DMA channel 5 peripheral address - register - 0x60 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR5 - CMAR5 - DMA channel 5 memory address - register - 0x64 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR6 - CCR6 - DMA channel configuration register - (DMA_CCR) - 0x6C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR6 - CNDTR6 - DMA channel 6 number of data - register - 0x70 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR6 - CPAR6 - DMA channel 6 peripheral address - register - 0x74 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR6 - CMAR6 - DMA channel 6 memory address - register - 0x78 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR7 - CCR7 - DMA channel configuration register - (DMA_CCR) - 0x80 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR7 - CNDTR7 - DMA channel 7 number of data - register - 0x84 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR7 - CPAR7 - DMA channel 7 peripheral address - register - 0x88 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR7 - CMAR7 - DMA channel 7 memory address - register - 0x8C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - - - DMA2 - 0x40020400 - - DMA2_Channel1 - DMA2 Channel1 global interrupt - 56 - - - DMA2_Channel2 - DMA2 Channel2 global interrupt - 57 - - - DMA2_Channel3 - DMA2 Channel3 global interrupt - 58 - - - DMA2_Channel4_5 - DMA2 Channel4 and DMA2 Channel5 global - interrupt - 59 - - - - SDIO - Secure digital input/output - interface - SDIO - 0x40018000 - - 0x0 - 0x400 - registers - - - SDIO - SDIO global interrupt - 49 - - - - POWER - POWER - Bits 1:0 = PWRCTRL: Power supply control - bits - 0x0 - 0x20 - read-write - 0x00000000 - - - PWRCTRL - PWRCTRL - 0 - 2 - - - - - CLKCR - CLKCR - SDI clock control register - (SDIO_CLKCR) - 0x4 - 0x20 - read-write - 0x00000000 - - - CLKDIV - Clock divide factor - 0 - 8 - - - CLKEN - Clock enable bit - 8 - 1 - - - PWRSAV - Power saving configuration - bit - 9 - 1 - - - BYPASS - Clock divider bypass enable - bit - 10 - 1 - - - WIDBUS - Wide bus mode enable bit - 11 - 2 - - - NEGEDGE - SDIO_CK dephasing selection - bit - 13 - 1 - - - HWFC_EN - HW Flow Control enable - 14 - 1 - - - - - ARG - ARG - Bits 31:0 = : Command argument - 0x8 - 0x20 - read-write - 0x00000000 - - - CMDARG - Command argument - 0 - 32 - - - - - CMD - CMD - SDIO command register - (SDIO_CMD) - 0xC - 0x20 - read-write - 0x00000000 - - - CMDINDEX - CMDINDEX - 0 - 6 - - - WAITRESP - WAITRESP - 6 - 2 - - - WAITINT - WAITINT - 8 - 1 - - - WAITPEND - WAITPEND - 9 - 1 - - - CPSMEN - CPSMEN - 10 - 1 - - - SDIOSuspend - SDIOSuspend - 11 - 1 - - - ENCMDcompl - ENCMDcompl - 12 - 1 - - - nIEN - nIEN - 13 - 1 - - - CE_ATACMD - CE_ATACMD - 14 - 1 - - - - - RESPCMD - RESPCMD - SDIO command register - 0x10 - 0x20 - read-only - 0x00000000 - - - RESPCMD - RESPCMD - 0 - 6 - - - - - RESPI1 - RESPI1 - Bits 31:0 = CARDSTATUS1 - 0x14 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS1 - CARDSTATUS1 - 0 - 32 - - - - - RESP2 - RESP2 - Bits 31:0 = CARDSTATUS2 - 0x18 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS2 - CARDSTATUS2 - 0 - 32 - - - - - RESP3 - RESP3 - Bits 31:0 = CARDSTATUS3 - 0x1C - 0x20 - read-only - 0x00000000 - - - CARDSTATUS3 - CARDSTATUS3 - 0 - 32 - - - - - RESP4 - RESP4 - Bits 31:0 = CARDSTATUS4 - 0x20 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS4 - CARDSTATUS4 - 0 - 32 - - - - - DTIMER - DTIMER - Bits 31:0 = DATATIME: Data timeout - period - 0x24 - 0x20 - read-write - 0x00000000 - - - DATATIME - Data timeout period - 0 - 32 - - - - - DLEN - DLEN - Bits 24:0 = DATALENGTH: Data length - value - 0x28 - 0x20 - read-write - 0x00000000 - - - DATALENGTH - Data length value - 0 - 25 - - - - - DCTRL - DCTRL - SDIO data control register - (SDIO_DCTRL) - 0x2C - 0x20 - read-write - 0x00000000 - - - DTEN - DTEN - 0 - 1 - - - DTDIR - DTDIR - 1 - 1 - - - DTMODE - DTMODE - 2 - 1 - - - DMAEN - DMAEN - 3 - 1 - - - DBLOCKSIZE - DBLOCKSIZE - 4 - 4 - - - PWSTART - PWSTART - 8 - 1 - - - PWSTOP - PWSTOP - 9 - 1 - - - RWMOD - RWMOD - 10 - 1 - - - SDIOEN - SDIOEN - 11 - 1 - - - - - DCOUNT - DCOUNT - Bits 24:0 = DATACOUNT: Data count - value - 0x30 - 0x20 - read-only - 0x00000000 - - - DATACOUNT - Data count value - 0 - 25 - - - - - STA - STA - SDIO status register - (SDIO_STA) - 0x34 - 0x20 - read-only - 0x00000000 - - - CCRCFAIL - CCRCFAIL - 0 - 1 - - - DCRCFAIL - DCRCFAIL - 1 - 1 - - - CTIMEOUT - CTIMEOUT - 2 - 1 - - - DTIMEOUT - DTIMEOUT - 3 - 1 - - - TXUNDERR - TXUNDERR - 4 - 1 - - - RXOVERR - RXOVERR - 5 - 1 - - - CMDREND - CMDREND - 6 - 1 - - - CMDSENT - CMDSENT - 7 - 1 - - - DATAEND - DATAEND - 8 - 1 - - - STBITERR - STBITERR - 9 - 1 - - - DBCKEND - DBCKEND - 10 - 1 - - - CMDACT - CMDACT - 11 - 1 - - - TXACT - TXACT - 12 - 1 - - - RXACT - RXACT - 13 - 1 - - - TXFIFOHE - TXFIFOHE - 14 - 1 - - - RXFIFOHF - RXFIFOHF - 15 - 1 - - - TXFIFOF - TXFIFOF - 16 - 1 - - - RXFIFOF - RXFIFOF - 17 - 1 - - - TXFIFOE - TXFIFOE - 18 - 1 - - - RXFIFOE - RXFIFOE - 19 - 1 - - - TXDAVL - TXDAVL - 20 - 1 - - - RXDAVL - RXDAVL - 21 - 1 - - - SDIOIT - SDIOIT - 22 - 1 - - - CEATAEND - CEATAEND - 23 - 1 - - - - - ICR - ICR - SDIO interrupt clear register - (SDIO_ICR) - 0x38 - 0x20 - read-write - 0x00000000 - - - CCRCFAILC - CCRCFAILC - 0 - 1 - - - DCRCFAILC - DCRCFAILC - 1 - 1 - - - CTIMEOUTC - CTIMEOUTC - 2 - 1 - - - DTIMEOUTC - DTIMEOUTC - 3 - 1 - - - TXUNDERRC - TXUNDERRC - 4 - 1 - - - RXOVERRC - RXOVERRC - 5 - 1 - - - CMDRENDC - CMDRENDC - 6 - 1 - - - CMDSENTC - CMDSENTC - 7 - 1 - - - DATAENDC - DATAENDC - 8 - 1 - - - STBITERRC - STBITERRC - 9 - 1 - - - DBCKENDC - DBCKENDC - 10 - 1 - - - SDIOITC - SDIOITC - 22 - 1 - - - CEATAENDC - CEATAENDC - 23 - 1 - - - - - MASK - MASK - SDIO mask register (SDIO_MASK) - 0x3C - 0x20 - read-write - 0x00000000 - - - CCRCFAILIE - CCRCFAILIE - 0 - 1 - - - DCRCFAILIE - DCRCFAILIE - 1 - 1 - - - CTIMEOUTIE - CTIMEOUTIE - 2 - 1 - - - DTIMEOUTIE - DTIMEOUTIE - 3 - 1 - - - TXUNDERRIE - TXUNDERRIE - 4 - 1 - - - RXOVERRIE - RXOVERRIE - 5 - 1 - - - CMDRENDIE - CMDRENDIE - 6 - 1 - - - CMDSENTIE - CMDSENTIE - 7 - 1 - - - DATAENDIE - DATAENDIE - 8 - 1 - - - STBITERRIE - STBITERRIE - 9 - 1 - - - DBACKENDIE - DBACKENDIE - 10 - 1 - - - CMDACTIE - CMDACTIE - 11 - 1 - - - TXACTIE - TXACTIE - 12 - 1 - - - RXACTIE - RXACTIE - 13 - 1 - - - TXFIFOHEIE - TXFIFOHEIE - 14 - 1 - - - RXFIFOHFIE - RXFIFOHFIE - 15 - 1 - - - TXFIFOFIE - TXFIFOFIE - 16 - 1 - - - RXFIFOFIE - RXFIFOFIE - 17 - 1 - - - TXFIFOEIE - TXFIFOEIE - 18 - 1 - - - RXFIFOEIE - RXFIFOEIE - 19 - 1 - - - TXDAVLIE - TXDAVLIE - 20 - 1 - - - RXDAVLIE - RXDAVLIE - 21 - 1 - - - SDIOITIE - SDIOITIE - 22 - 1 - - - CEATENDIE - CEATENDIE - 23 - 1 - - - - - FIFOCNT - FIFOCNT - Bits 23:0 = FIFOCOUNT: Remaining number of - words to be written to or read from the - FIFO - 0x48 - 0x20 - read-only - 0x00000000 - - - FIF0COUNT - FIF0COUNT - 0 - 24 - - - - - FIFO - FIFO - bits 31:0 = FIFOData: Receive and transmit - FIFO data - 0x80 - 0x20 - read-write - 0x00000000 - - - FIFOData - FIFOData - 0 - 32 - - - - - - - RTC - Real time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC - RTC global interrupt - 3 - - - RTCAlarm - RTC Alarms through EXTI line - interrupt - 41 - - - - CRH - CRH - RTC Control Register High - 0x0 - 0x20 - read-write - 0x00000000 - - - SECIE - Second interrupt Enable - 0 - 1 - - - ALRIE - Alarm interrupt Enable - 1 - 1 - - - OWIE - Overflow interrupt Enable - 2 - 1 - - - - - CRL - CRL - RTC Control Register Low - 0x4 - 0x20 - 0x00000020 - - - SECF - Second Flag - 0 - 1 - read-write - - - ALRF - Alarm Flag - 1 - 1 - read-write - - - OWF - Overflow Flag - 2 - 1 - read-write - - - RSF - Registers Synchronized - Flag - 3 - 1 - read-write - - - CNF - Configuration Flag - 4 - 1 - read-write - - - RTOFF - RTC operation OFF - 5 - 1 - read-only - - - - - PRLH - PRLH - RTC Prescaler Load Register - High - 0x8 - 0x20 - write-only - 0x00000000 - - - PRLH - RTC Prescaler Load Register - High - 0 - 4 - - - - - PRLL - PRLL - RTC Prescaler Load Register - Low - 0xC - 0x20 - write-only - 0x8000 - - - PRLL - RTC Prescaler Divider Register - Low - 0 - 16 - - - - - DIVH - DIVH - RTC Prescaler Divider Register - High - 0x10 - 0x20 - read-only - 0x00000000 - - - DIVH - RTC prescaler divider register - high - 0 - 4 - - - - - DIVL - DIVL - RTC Prescaler Divider Register - Low - 0x14 - 0x20 - read-only - 0x8000 - - - DIVL - RTC prescaler divider register - Low - 0 - 16 - - - - - CNTH - CNTH - RTC Counter Register High - 0x18 - 0x20 - read-write - 0x00000000 - - - CNTH - RTC counter register high - 0 - 16 - - - - - CNTL - CNTL - RTC Counter Register Low - 0x1C - 0x20 - read-write - 0x00000000 - - - CNTL - RTC counter register Low - 0 - 16 - - - - - ALRH - ALRH - RTC Alarm Register High - 0x20 - 0x20 - write-only - 0xFFFF - - - ALRH - RTC alarm register high - 0 - 16 - - - - - ALRL - ALRL - RTC Alarm Register Low - 0x24 - 0x20 - write-only - 0xFFFF - - - ALRL - RTC alarm register low - 0 - 16 - - - - - - - BKP - Backup registers - BKP - 0x40006C00 - - 0x0 - 0x400 - registers - - - - DR1 - DR1 - Backup data register (BKP_DR) - 0x0 - 0x20 - read-write - 0x00000000 - - - D1 - Backup data - 0 - 16 - - - - - DR2 - DR2 - Backup data register (BKP_DR) - 0x4 - 0x20 - read-write - 0x00000000 - - - D2 - Backup data - 0 - 16 - - - - - DR3 - DR3 - Backup data register (BKP_DR) - 0x8 - 0x20 - read-write - 0x00000000 - - - D3 - Backup data - 0 - 16 - - - - - DR4 - DR4 - Backup data register (BKP_DR) - 0xC - 0x20 - read-write - 0x00000000 - - - D4 - Backup data - 0 - 16 - - - - - DR5 - DR5 - Backup data register (BKP_DR) - 0x10 - 0x20 - read-write - 0x00000000 - - - D5 - Backup data - 0 - 16 - - - - - DR6 - DR6 - Backup data register (BKP_DR) - 0x14 - 0x20 - read-write - 0x00000000 - - - D6 - Backup data - 0 - 16 - - - - - DR7 - DR7 - Backup data register (BKP_DR) - 0x18 - 0x20 - read-write - 0x00000000 - - - D7 - Backup data - 0 - 16 - - - - - DR8 - DR8 - Backup data register (BKP_DR) - 0x1C - 0x20 - read-write - 0x00000000 - - - D8 - Backup data - 0 - 16 - - - - - DR9 - DR9 - Backup data register (BKP_DR) - 0x20 - 0x20 - read-write - 0x00000000 - - - D9 - Backup data - 0 - 16 - - - - - DR10 - DR10 - Backup data register (BKP_DR) - 0x24 - 0x20 - read-write - 0x00000000 - - - D10 - Backup data - 0 - 16 - - - - - DR11 - DR11 - Backup data register (BKP_DR) - 0x3C - 0x20 - read-write - 0x00000000 - - - DR11 - Backup data - 0 - 16 - - - - - DR12 - DR12 - Backup data register (BKP_DR) - 0x40 - 0x20 - read-write - 0x00000000 - - - DR12 - Backup data - 0 - 16 - - - - - DR13 - DR13 - Backup data register (BKP_DR) - 0x44 - 0x20 - read-write - 0x00000000 - - - DR13 - Backup data - 0 - 16 - - - - - DR14 - DR14 - Backup data register (BKP_DR) - 0x48 - 0x20 - read-write - 0x00000000 - - - D14 - Backup data - 0 - 16 - - - - - DR15 - DR15 - Backup data register (BKP_DR) - 0x4C - 0x20 - read-write - 0x00000000 - - - D15 - Backup data - 0 - 16 - - - - - DR16 - DR16 - Backup data register (BKP_DR) - 0x50 - 0x20 - read-write - 0x00000000 - - - D16 - Backup data - 0 - 16 - - - - - DR17 - DR17 - Backup data register (BKP_DR) - 0x54 - 0x20 - read-write - 0x00000000 - - - D17 - Backup data - 0 - 16 - - - - - DR18 - DR18 - Backup data register (BKP_DR) - 0x58 - 0x20 - read-write - 0x00000000 - - - D18 - Backup data - 0 - 16 - - - - - DR19 - DR19 - Backup data register (BKP_DR) - 0x5C - 0x20 - read-write - 0x00000000 - - - D19 - Backup data - 0 - 16 - - - - - DR20 - DR20 - Backup data register (BKP_DR) - 0x60 - 0x20 - read-write - 0x00000000 - - - D20 - Backup data - 0 - 16 - - - - - DR21 - DR21 - Backup data register (BKP_DR) - 0x64 - 0x20 - read-write - 0x00000000 - - - D21 - Backup data - 0 - 16 - - - - - DR22 - DR22 - Backup data register (BKP_DR) - 0x68 - 0x20 - read-write - 0x00000000 - - - D22 - Backup data - 0 - 16 - - - - - DR23 - DR23 - Backup data register (BKP_DR) - 0x6C - 0x20 - read-write - 0x00000000 - - - D23 - Backup data - 0 - 16 - - - - - DR24 - DR24 - Backup data register (BKP_DR) - 0x70 - 0x20 - read-write - 0x00000000 - - - D24 - Backup data - 0 - 16 - - - - - DR25 - DR25 - Backup data register (BKP_DR) - 0x74 - 0x20 - read-write - 0x00000000 - - - D25 - Backup data - 0 - 16 - - - - - DR26 - DR26 - Backup data register (BKP_DR) - 0x78 - 0x20 - read-write - 0x00000000 - - - D26 - Backup data - 0 - 16 - - - - - DR27 - DR27 - Backup data register (BKP_DR) - 0x7C - 0x20 - read-write - 0x00000000 - - - D27 - Backup data - 0 - 16 - - - - - DR28 - DR28 - Backup data register (BKP_DR) - 0x80 - 0x20 - read-write - 0x00000000 - - - D28 - Backup data - 0 - 16 - - - - - DR29 - DR29 - Backup data register (BKP_DR) - 0x84 - 0x20 - read-write - 0x00000000 - - - D29 - Backup data - 0 - 16 - - - - - DR30 - DR30 - Backup data register (BKP_DR) - 0x88 - 0x20 - read-write - 0x00000000 - - - D30 - Backup data - 0 - 16 - - - - - DR31 - DR31 - Backup data register (BKP_DR) - 0x8C - 0x20 - read-write - 0x00000000 - - - D31 - Backup data - 0 - 16 - - - - - DR32 - DR32 - Backup data register (BKP_DR) - 0x90 - 0x20 - read-write - 0x00000000 - - - D32 - Backup data - 0 - 16 - - - - - DR33 - DR33 - Backup data register (BKP_DR) - 0x94 - 0x20 - read-write - 0x00000000 - - - D33 - Backup data - 0 - 16 - - - - - DR34 - DR34 - Backup data register (BKP_DR) - 0x98 - 0x20 - read-write - 0x00000000 - - - D34 - Backup data - 0 - 16 - - - - - DR35 - DR35 - Backup data register (BKP_DR) - 0x9C - 0x20 - read-write - 0x00000000 - - - D35 - Backup data - 0 - 16 - - - - - DR36 - DR36 - Backup data register (BKP_DR) - 0xA0 - 0x20 - read-write - 0x00000000 - - - D36 - Backup data - 0 - 16 - - - - - DR37 - DR37 - Backup data register (BKP_DR) - 0xA4 - 0x20 - read-write - 0x00000000 - - - D37 - Backup data - 0 - 16 - - - - - DR38 - DR38 - Backup data register (BKP_DR) - 0xA8 - 0x20 - read-write - 0x00000000 - - - D38 - Backup data - 0 - 16 - - - - - DR39 - DR39 - Backup data register (BKP_DR) - 0xAC - 0x20 - read-write - 0x00000000 - - - D39 - Backup data - 0 - 16 - - - - - DR40 - DR40 - Backup data register (BKP_DR) - 0xB0 - 0x20 - read-write - 0x00000000 - - - D40 - Backup data - 0 - 16 - - - - - DR41 - DR41 - Backup data register (BKP_DR) - 0xB4 - 0x20 - read-write - 0x00000000 - - - D41 - Backup data - 0 - 16 - - - - - DR42 - DR42 - Backup data register (BKP_DR) - 0xB8 - 0x20 - read-write - 0x00000000 - - - D42 - Backup data - 0 - 16 - - - - - RTCCR - RTCCR - RTC clock calibration register - (BKP_RTCCR) - 0x28 - 0x20 - read-write - 0x00000000 - - - CAL - Calibration value - 0 - 7 - - - CCO - Calibration Clock Output - 7 - 1 - - - ASOE - Alarm or second output - enable - 8 - 1 - - - ASOS - Alarm or second output - selection - 9 - 1 - - - - - CR - CR - Backup control register - (BKP_CR) - 0x2C - 0x20 - read-write - 0x00000000 - - - TPE - Tamper pin enable - 0 - 1 - - - TPAL - Tamper pin active level - 1 - 1 - - - - - CSR - CSR - BKP_CSR control/status register - (BKP_CSR) - 0x30 - 0x20 - 0x00000000 - - - CTE - Clear Tamper event - 0 - 1 - write-only - - - CTI - Clear Tamper Interrupt - 1 - 1 - write-only - - - TPIE - Tamper Pin interrupt - enable - 2 - 1 - read-write - - - TEF - Tamper Event Flag - 8 - 1 - read-only - - - TIF - Tamper Interrupt Flag - 9 - 1 - read-only - - - - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - KR - Key register (IWDG_KR) - 0x0 - 0x20 - write-only - 0x00000000 - - - KEY - Key value - 0 - 16 - - - - - PR - PR - Prescaler register (IWDG_PR) - 0x4 - 0x20 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - RLR - Reload register (IWDG_RLR) - 0x8 - 0x20 - read-write - 0x00000FFF - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - SR - Status register (IWDG_SR) - 0xC - 0x20 - read-only - 0x00000000 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002C00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - CR - Control register (WWDG_CR) - 0x0 - 0x20 - read-write - 0x0000007F - - - T - 7-bit counter (MSB to LSB) - 0 - 7 - - - WDGA - Activation bit - 7 - 1 - - - - - CFR - CFR - Configuration register - (WWDG_CFR) - 0x4 - 0x20 - read-write - 0x0000007F - - - W - 7-bit window value - 0 - 7 - - - WDGTB - Timer Base - 7 - 2 - - - EWI - Early Wakeup Interrupt - 9 - 1 - - - - - SR - SR - Status register (WWDG_SR) - 0x8 - 0x20 - read-write - 0x00000000 - - - EWI - Early Wakeup Interrupt - 0 - 1 - - - - - - - TIM1 - Advanced timer - TIM - 0x40012C00 - - 0x0 - 0x400 - registers - - - TIM1_BRK - TIM1 Break interrupt - 24 - - - TIM1_CC - TIM1 Capture Compare interrupt - 27 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - - - TIM8 - 0x40013400 - - TIM8_BRK - TIM8 Break interrupt - 43 - - - TIM8_UP - TIM8 Update interrupt - 44 - - - TIM8_TRG_COM - TIM8 Trigger and Commutation - interrupts - 45 - - - TIM8_CC - TIM8 Capture Compare interrupt - 46 - - - - TIM2 - General purpose timer - TIM - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 28 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output compare 2 clear - enable - 15 - 1 - - - OC2M - Output compare 2 mode - 12 - 3 - - - OC2PE - Output compare 2 preload - enable - 11 - 1 - - - OC2FE - Output compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output compare 1 clear - enable - 7 - 1 - - - OC1M - Output compare 1 mode - 4 - 3 - - - OC1PE - Output compare 1 preload - enable - 3 - 1 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - O24CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM3 - 0x40000400 - - TIM3 - TIM3 global interrupt - 29 - - - - TIM4 - 0x40000800 - - TIM4 - TIM4 global interrupt - 30 - - - - TIM5 - 0x40000C00 - - TIM5 - TIM5 global interrupt - 50 - - - - TIM9 - General purpose timer - TIM - 0x40014C00 - - 0x0 - 0x400 - registers - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - - - TIM12 - 0x40001800 - - - TIM10 - General purpose timer - TIM - 0x40015000 - - 0x0 - 0x400 - registers - - - TIM1_UP - TIM1 Update interrupt - 25 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - - - TIM11 - 0x40015400 - - TIM1_TRG_COM - TIM1 Trigger and Commutation - interrupts - 26 - - - - TIM13 - 0x40001C00 - - - TIM14 - 0x40002000 - - - TIM6 - Basic timer - TIM - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6 - TIM6 global interrupt - 54 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 55 - - - - I2C1 - Inter integrated circuit - I2C - 0x40005400 - - 0x0 - 0x400 - registers - - - I2C1_EV - I2C1 event interrupt - 31 - - - I2C1_ER - I2C1 error interrupt - 32 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - SWRST - Software reset - 15 - 1 - - - ALERT - SMBus alert - 13 - 1 - - - PEC - Packet error checking - 12 - 1 - - - POS - Acknowledge/PEC Position (for data - reception) - 11 - 1 - - - ACK - Acknowledge enable - 10 - 1 - - - STOP - Stop generation - 9 - 1 - - - START - Start generation - 8 - 1 - - - NOSTRETCH - Clock stretching disable (Slave - mode) - 7 - 1 - - - ENGC - General call enable - 6 - 1 - - - ENPEC - PEC enable - 5 - 1 - - - ENARP - ARP enable - 4 - 1 - - - SMBTYPE - SMBus type - 3 - 1 - - - SMBUS - SMBus mode - 1 - 1 - - - PE - Peripheral enable - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - LAST - DMA last transfer - 12 - 1 - - - DMAEN - DMA requests enable - 11 - 1 - - - ITBUFEN - Buffer interrupt enable - 10 - 1 - - - ITEVTEN - Event interrupt enable - 9 - 1 - - - ITERREN - Error interrupt enable - 8 - 1 - - - FREQ - Peripheral clock frequency - 0 - 6 - - - - - OAR1 - OAR1 - Own address register 1 - 0x8 - 0x20 - read-write - 0x0000 - - - ADDMODE - Addressing mode (slave - mode) - 15 - 1 - - - ADD10 - Interface address - 8 - 2 - - - ADD7 - Interface address - 1 - 7 - - - ADD0 - Interface address - 0 - 1 - - - - - OAR2 - OAR2 - Own address register 2 - 0xC - 0x20 - read-write - 0x0000 - - - ADD2 - Interface address - 1 - 7 - - - ENDUAL - Dual addressing mode - enable - 0 - 1 - - - - - DR - DR - Data register - 0x10 - 0x20 - read-write - 0x0000 - - - DR - 8-bit data register - 0 - 8 - - - - - SR1 - SR1 - Status register 1 - 0x14 - 0x20 - 0x0000 - - - SMBALERT - SMBus alert - 15 - 1 - read-write - - - TIMEOUT - Timeout or Tlow error - 14 - 1 - read-write - - - PECERR - PEC Error in reception - 12 - 1 - read-write - - - OVR - Overrun/Underrun - 11 - 1 - read-write - - - AF - Acknowledge failure - 10 - 1 - read-write - - - ARLO - Arbitration lost (master - mode) - 9 - 1 - read-write - - - BERR - Bus error - 8 - 1 - read-write - - - TxE - Data register empty - (transmitters) - 7 - 1 - read-only - - - RxNE - Data register not empty - (receivers) - 6 - 1 - read-only - - - STOPF - Stop detection (slave - mode) - 4 - 1 - read-only - - - ADD10 - 10-bit header sent (Master - mode) - 3 - 1 - read-only - - - BTF - Byte transfer finished - 2 - 1 - read-only - - - ADDR - Address sent (master mode)/matched - (slave mode) - 1 - 1 - read-only - - - SB - Start bit (Master mode) - 0 - 1 - read-only - - - - - SR2 - SR2 - Status register 2 - 0x18 - 0x20 - read-only - 0x0000 - - - PEC - acket error checking - register - 8 - 8 - - - DUALF - Dual flag (Slave mode) - 7 - 1 - - - SMBHOST - SMBus host header (Slave - mode) - 6 - 1 - - - SMBDEFAULT - SMBus device default address (Slave - mode) - 5 - 1 - - - GENCALL - General call address (Slave - mode) - 4 - 1 - - - TRA - Transmitter/receiver - 2 - 1 - - - BUSY - Bus busy - 1 - 1 - - - MSL - Master/slave - 0 - 1 - - - - - CCR - CCR - Clock control register - 0x1C - 0x20 - read-write - 0x0000 - - - F_S - I2C master mode selection - 15 - 1 - - - DUTY - Fast mode duty cycle - 14 - 1 - - - CCR - Clock control register in Fast/Standard - mode (Master mode) - 0 - 12 - - - - - TRISE - TRISE - TRISE register - 0x20 - 0x20 - read-write - 0x0002 - - - TRISE - Maximum rise time in Fast/Standard mode - (Master mode) - 0 - 6 - - - - - - - I2C2 - 0x40005800 - - I2C2_EV - I2C2 event interrupt - 33 - - - I2C2_ER - I2C2 error interrupt - 34 - - - - SPI1 - Serial peripheral interface - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1 global interrupt - 35 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - DFF - Data frame format - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - SSOE - SS output enable - 2 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x0002 - - - BSY - Busy flag - 7 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - MODF - Mode fault - 5 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - UDR - Underrun flag - 3 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x0000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x0007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x0000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x0000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x0000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 36 - - - - SPI3 - 0x40003C00 - - SPI3 - SPI3 global interrupt - 51 - - - - USART1 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40013800 - - 0x0 - 0x400 - registers - - - USART1 - USART1 global interrupt - 37 - - - - SR - SR - Status register - 0x0 - 0x20 - 0x00C0 - - - CTS - CTS flag - 9 - 1 - read-write - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - TC - Transmission complete - 6 - 1 - read-write - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - NE - Noise error flag - 2 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - PE - Parity error - 0 - 1 - read-only - - - - - DR - DR - Data register - 0x4 - 0x20 - read-write - 0x00000000 - - - DR - Data value - 0 - 9 - - - - - BRR - BRR - Baud rate register - 0x8 - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - CR1 - CR1 - Control register 1 - 0xC - 0x20 - read-write - 0x0000 - - - UE - USART enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - SBK - Send break - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x10 - 0x20 - read-write - 0x0000 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - lin break detection length - 5 - 1 - - - ADD - Address of the USART node - 0 - 4 - - - - - CR3 - CR3 - Control register 3 - 0x14 - 0x20 - read-write - 0x0000 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - GTPR - GTPR - Guard time and prescaler - register - 0x18 - 0x20 - read-write - 0x0000 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - - - USART2 - 0x40004400 - - USART2 - USART2 global interrupt - 38 - - - - USART3 - 0x40004800 - - USART3 - USART3 global interrupt - 39 - - - - ADC1 - Analog to digital converter - ADC - 0x40012400 - - 0x0 - 0x400 - registers - - - ADC1_2 - ADC1 and ADC2 global interrupt - 18 - - - - SR - SR - status register - 0x0 - 0x20 - read-write - 0x00000000 - - - STRT - Regular channel start flag - 4 - 1 - - - JSTRT - Injected channel start - flag - 3 - 1 - - - JEOC - Injected channel end of - conversion - 2 - 1 - - - EOC - Regular channel end of - conversion - 1 - 1 - - - AWD - Analog watchdog flag - 0 - 1 - - - - - CR1 - CR1 - control register 1 - 0x4 - 0x20 - read-write - 0x00000000 - - - AWDEN - Analog watchdog enable on regular - channels - 23 - 1 - - - JAWDEN - Analog watchdog enable on injected - channels - 22 - 1 - - - DUALMOD - Dual mode selection - 16 - 4 - - - DISCNUM - Discontinuous mode channel - count - 13 - 3 - - - JDISCEN - Discontinuous mode on injected - channels - 12 - 1 - - - DISCEN - Discontinuous mode on regular - channels - 11 - 1 - - - JAUTO - Automatic injected group - conversion - 10 - 1 - - - AWDSGL - Enable the watchdog on a single channel - in scan mode - 9 - 1 - - - SCAN - Scan mode - 8 - 1 - - - JEOCIE - Interrupt enable for injected - channels - 7 - 1 - - - AWDIE - Analog watchdog interrupt - enable - 6 - 1 - - - EOCIE - Interrupt enable for EOC - 5 - 1 - - - AWDCH - Analog watchdog channel select - bits - 0 - 5 - - - - - CR2 - CR2 - control register 2 - 0x8 - 0x20 - read-write - 0x00000000 - - - TSVREFE - Temperature sensor and VREFINT - enable - 23 - 1 - - - SWSTART - Start conversion of regular - channels - 22 - 1 - - - JSWSTART - Start conversion of injected - channels - 21 - 1 - - - EXTTRIG - External trigger conversion mode for - regular channels - 20 - 1 - - - EXTSEL - External event select for regular - group - 17 - 3 - - - JEXTTRIG - External trigger conversion mode for - injected channels - 15 - 1 - - - JEXTSEL - External event select for injected - group - 12 - 3 - - - ALIGN - Data alignment - 11 - 1 - - - DMA - Direct memory access mode - 8 - 1 - - - RSTCAL - Reset calibration - 3 - 1 - - - CAL - A/D calibration - 2 - 1 - - - CONT - Continuous conversion - 1 - 1 - - - ADON - A/D converter ON / OFF - 0 - 1 - - - - - SMPR1 - SMPR1 - sample time register 1 - 0xC - 0x20 - read-write - 0x00000000 - - - SMP10 - Channel 10 sample time - selection - 0 - 3 - - - SMP11 - Channel 11 sample time - selection - 3 - 3 - - - SMP12 - Channel 12 sample time - selection - 6 - 3 - - - SMP13 - Channel 13 sample time - selection - 9 - 3 - - - SMP14 - Channel 14 sample time - selection - 12 - 3 - - - SMP15 - Channel 15 sample time - selection - 15 - 3 - - - SMP16 - Channel 16 sample time - selection - 18 - 3 - - - SMP17 - Channel 17 sample time - selection - 21 - 3 - - - - - SMPR2 - SMPR2 - sample time register 2 - 0x10 - 0x20 - read-write - 0x00000000 - - - SMP0 - Channel 0 sample time - selection - 0 - 3 - - - SMP1 - Channel 1 sample time - selection - 3 - 3 - - - SMP2 - Channel 2 sample time - selection - 6 - 3 - - - SMP3 - Channel 3 sample time - selection - 9 - 3 - - - SMP4 - Channel 4 sample time - selection - 12 - 3 - - - SMP5 - Channel 5 sample time - selection - 15 - 3 - - - SMP6 - Channel 6 sample time - selection - 18 - 3 - - - SMP7 - Channel 7 sample time - selection - 21 - 3 - - - SMP8 - Channel 8 sample time - selection - 24 - 3 - - - SMP9 - Channel 9 sample time - selection - 27 - 3 - - - - - JOFR1 - JOFR1 - injected channel data offset register - x - 0x14 - 0x20 - read-write - 0x00000000 - - - JOFFSET1 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR2 - JOFR2 - injected channel data offset register - x - 0x18 - 0x20 - read-write - 0x00000000 - - - JOFFSET2 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR3 - JOFR3 - injected channel data offset register - x - 0x1C - 0x20 - read-write - 0x00000000 - - - JOFFSET3 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR4 - JOFR4 - injected channel data offset register - x - 0x20 - 0x20 - read-write - 0x00000000 - - - JOFFSET4 - Data offset for injected channel - x - 0 - 12 - - - - - HTR - HTR - watchdog higher threshold - register - 0x24 - 0x20 - read-write - 0x00000FFF - - - HT - Analog watchdog higher - threshold - 0 - 12 - - - - - LTR - LTR - watchdog lower threshold - register - 0x28 - 0x20 - read-write - 0x00000000 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - SQR1 - SQR1 - regular sequence register 1 - 0x2C - 0x20 - read-write - 0x00000000 - - - L - Regular channel sequence - length - 20 - 4 - - - SQ16 - 16th conversion in regular - sequence - 15 - 5 - - - SQ15 - 15th conversion in regular - sequence - 10 - 5 - - - SQ14 - 14th conversion in regular - sequence - 5 - 5 - - - SQ13 - 13th conversion in regular - sequence - 0 - 5 - - - - - SQR2 - SQR2 - regular sequence register 2 - 0x30 - 0x20 - read-write - 0x00000000 - - - SQ12 - 12th conversion in regular - sequence - 25 - 5 - - - SQ11 - 11th conversion in regular - sequence - 20 - 5 - - - SQ10 - 10th conversion in regular - sequence - 15 - 5 - - - SQ9 - 9th conversion in regular - sequence - 10 - 5 - - - SQ8 - 8th conversion in regular - sequence - 5 - 5 - - - SQ7 - 7th conversion in regular - sequence - 0 - 5 - - - - - SQR3 - SQR3 - regular sequence register 3 - 0x34 - 0x20 - read-write - 0x00000000 - - - SQ6 - 6th conversion in regular - sequence - 25 - 5 - - - SQ5 - 5th conversion in regular - sequence - 20 - 5 - - - SQ4 - 4th conversion in regular - sequence - 15 - 5 - - - SQ3 - 3rd conversion in regular - sequence - 10 - 5 - - - SQ2 - 2nd conversion in regular - sequence - 5 - 5 - - - SQ1 - 1st conversion in regular - sequence - 0 - 5 - - - - - JSQR - JSQR - injected sequence register - 0x38 - 0x20 - read-write - 0x00000000 - - - JL - Injected sequence length - 20 - 2 - - - JSQ4 - 4th conversion in injected - sequence - 15 - 5 - - - JSQ3 - 3rd conversion in injected - sequence - 10 - 5 - - - JSQ2 - 2nd conversion in injected - sequence - 5 - 5 - - - JSQ1 - 1st conversion in injected - sequence - 0 - 5 - - - - - JDR1 - JDR1 - injected data register x - 0x3C - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR2 - JDR2 - injected data register x - 0x40 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR3 - JDR3 - injected data register x - 0x44 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR4 - JDR4 - injected data register x - 0x48 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - DR - DR - regular data register - 0x4C - 0x20 - read-only - 0x00000000 - - - DATA - Regular data - 0 - 16 - - - ADC2DATA - ADC2 data - 16 - 16 - - - - - - - ADC2 - Analog to digital converter - ADC - 0x40012800 - - 0x0 - 0x400 - registers - - - - SR - SR - status register - 0x0 - 0x20 - read-write - 0x00000000 - - - STRT - Regular channel start flag - 4 - 1 - - - JSTRT - Injected channel start - flag - 3 - 1 - - - JEOC - Injected channel end of - conversion - 2 - 1 - - - EOC - Regular channel end of - conversion - 1 - 1 - - - AWD - Analog watchdog flag - 0 - 1 - - - - - CR1 - CR1 - control register 1 - 0x4 - 0x20 - read-write - 0x00000000 - - - AWDEN - Analog watchdog enable on regular - channels - 23 - 1 - - - JAWDEN - Analog watchdog enable on injected - channels - 22 - 1 - - - DISCNUM - Discontinuous mode channel - count - 13 - 3 - - - JDISCEN - Discontinuous mode on injected - channels - 12 - 1 - - - DISCEN - Discontinuous mode on regular - channels - 11 - 1 - - - JAUTO - Automatic injected group - conversion - 10 - 1 - - - AWDSGL - Enable the watchdog on a single channel - in scan mode - 9 - 1 - - - SCAN - Scan mode - 8 - 1 - - - JEOCIE - Interrupt enable for injected - channels - 7 - 1 - - - AWDIE - Analog watchdog interrupt - enable - 6 - 1 - - - EOCIE - Interrupt enable for EOC - 5 - 1 - - - AWDCH - Analog watchdog channel select - bits - 0 - 5 - - - - - CR2 - CR2 - control register 2 - 0x8 - 0x20 - read-write - 0x00000000 - - - TSVREFE - Temperature sensor and VREFINT - enable - 23 - 1 - - - SWSTART - Start conversion of regular - channels - 22 - 1 - - - JSWSTART - Start conversion of injected - channels - 21 - 1 - - - EXTTRIG - External trigger conversion mode for - regular channels - 20 - 1 - - - EXTSEL - External event select for regular - group - 17 - 3 - - - JEXTTRIG - External trigger conversion mode for - injected channels - 15 - 1 - - - JEXTSEL - External event select for injected - group - 12 - 3 - - - ALIGN - Data alignment - 11 - 1 - - - DMA - Direct memory access mode - 8 - 1 - - - RSTCAL - Reset calibration - 3 - 1 - - - CAL - A/D calibration - 2 - 1 - - - CONT - Continuous conversion - 1 - 1 - - - ADON - A/D converter ON / OFF - 0 - 1 - - - - - SMPR1 - SMPR1 - sample time register 1 - 0xC - 0x20 - read-write - 0x00000000 - - - SMP10 - Channel 10 sample time - selection - 0 - 3 - - - SMP11 - Channel 11 sample time - selection - 3 - 3 - - - SMP12 - Channel 12 sample time - selection - 6 - 3 - - - SMP13 - Channel 13 sample time - selection - 9 - 3 - - - SMP14 - Channel 14 sample time - selection - 12 - 3 - - - SMP15 - Channel 15 sample time - selection - 15 - 3 - - - SMP16 - Channel 16 sample time - selection - 18 - 3 - - - SMP17 - Channel 17 sample time - selection - 21 - 3 - - - - - SMPR2 - SMPR2 - sample time register 2 - 0x10 - 0x20 - read-write - 0x00000000 - - - SMP0 - Channel 0 sample time - selection - 0 - 3 - - - SMP1 - Channel 1 sample time - selection - 3 - 3 - - - SMP2 - Channel 2 sample time - selection - 6 - 3 - - - SMP3 - Channel 3 sample time - selection - 9 - 3 - - - SMP4 - Channel 4 sample time - selection - 12 - 3 - - - SMP5 - Channel 5 sample time - selection - 15 - 3 - - - SMP6 - Channel 6 sample time - selection - 18 - 3 - - - SMP7 - Channel 7 sample time - selection - 21 - 3 - - - SMP8 - Channel 8 sample time - selection - 24 - 3 - - - SMP9 - Channel 9 sample time - selection - 27 - 3 - - - - - JOFR1 - JOFR1 - injected channel data offset register - x - 0x14 - 0x20 - read-write - 0x00000000 - - - JOFFSET1 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR2 - JOFR2 - injected channel data offset register - x - 0x18 - 0x20 - read-write - 0x00000000 - - - JOFFSET2 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR3 - JOFR3 - injected channel data offset register - x - 0x1C - 0x20 - read-write - 0x00000000 - - - JOFFSET3 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR4 - JOFR4 - injected channel data offset register - x - 0x20 - 0x20 - read-write - 0x00000000 - - - JOFFSET4 - Data offset for injected channel - x - 0 - 12 - - - - - HTR - HTR - watchdog higher threshold - register - 0x24 - 0x20 - read-write - 0x00000FFF - - - HT - Analog watchdog higher - threshold - 0 - 12 - - - - - LTR - LTR - watchdog lower threshold - register - 0x28 - 0x20 - read-write - 0x00000000 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - SQR1 - SQR1 - regular sequence register 1 - 0x2C - 0x20 - read-write - 0x00000000 - - - L - Regular channel sequence - length - 20 - 4 - - - SQ16 - 16th conversion in regular - sequence - 15 - 5 - - - SQ15 - 15th conversion in regular - sequence - 10 - 5 - - - SQ14 - 14th conversion in regular - sequence - 5 - 5 - - - SQ13 - 13th conversion in regular - sequence - 0 - 5 - - - - - SQR2 - SQR2 - regular sequence register 2 - 0x30 - 0x20 - read-write - 0x00000000 - - - SQ12 - 12th conversion in regular - sequence - 25 - 5 - - - SQ11 - 11th conversion in regular - sequence - 20 - 5 - - - SQ10 - 10th conversion in regular - sequence - 15 - 5 - - - SQ9 - 9th conversion in regular - sequence - 10 - 5 - - - SQ8 - 8th conversion in regular - sequence - 5 - 5 - - - SQ7 - 7th conversion in regular - sequence - 0 - 5 - - - - - SQR3 - SQR3 - regular sequence register 3 - 0x34 - 0x20 - read-write - 0x00000000 - - - SQ6 - 6th conversion in regular - sequence - 25 - 5 - - - SQ5 - 5th conversion in regular - sequence - 20 - 5 - - - SQ4 - 4th conversion in regular - sequence - 15 - 5 - - - SQ3 - 3rd conversion in regular - sequence - 10 - 5 - - - SQ2 - 2nd conversion in regular - sequence - 5 - 5 - - - SQ1 - 1st conversion in regular - sequence - 0 - 5 - - - - - JSQR - JSQR - injected sequence register - 0x38 - 0x20 - read-write - 0x00000000 - - - JL - Injected sequence length - 20 - 2 - - - JSQ4 - 4th conversion in injected - sequence - 15 - 5 - - - JSQ3 - 3rd conversion in injected - sequence - 10 - 5 - - - JSQ2 - 2nd conversion in injected - sequence - 5 - 5 - - - JSQ1 - 1st conversion in injected - sequence - 0 - 5 - - - - - JDR1 - JDR1 - injected data register x - 0x3C - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR2 - JDR2 - injected data register x - 0x40 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR3 - JDR3 - injected data register x - 0x44 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR4 - JDR4 - injected data register x - 0x48 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - DR - DR - regular data register - 0x4C - 0x20 - read-only - 0x00000000 - - - DATA - Regular data - 0 - 16 - - - - - - - ADC3 - 0x40013C00 - - ADC3 - ADC3 global interrupt - 47 - - - - CAN1 - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - CAN_RX1 - CAN RX1 interrupt - 21 - - - CAN_SCE - CAN SCE interrupt - 22 - - - CAN_SCE - CAN SCE interrupt - 22 - - - - CAN_MCR - CAN_MCR - CAN_MCR - 0x0 - 0x20 - read-write - 0x00000000 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - CAN_MSR - CAN_MSR - CAN_MSR - 0x4 - 0x20 - 0x00000000 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - CAN_TSR - CAN_TSR - CAN_TSR - 0x8 - 0x20 - 0x00000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - CAN_RF0R - CAN_RF0R - CAN_RF0R - 0xC - 0x20 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - CAN_RF1R - CAN_RF1R - CAN_RF1R - 0x10 - 0x20 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - CAN_IER - CAN_IER - CAN_IER - 0x14 - 0x20 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - CAN_ESR - CAN_ESR - CAN_ESR - 0x18 - 0x20 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - CAN_BTR - CAN_BTR - CAN_BTR - 0x1C - 0x20 - read-write - 0x00000000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - CAN_TI0R - CAN_TI0R - CAN_TI0R - 0x180 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT0R - CAN_TDT0R - CAN_TDT0R - 0x184 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL0R - CAN_TDL0R - CAN_TDL0R - 0x188 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH0R - CAN_TDH0R - CAN_TDH0R - 0x18C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI1R - CAN_TI1R - CAN_TI1R - 0x190 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT1R - CAN_TDT1R - CAN_TDT1R - 0x194 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL1R - CAN_TDL1R - CAN_TDL1R - 0x198 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH1R - CAN_TDH1R - CAN_TDH1R - 0x19C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI2R - CAN_TI2R - CAN_TI2R - 0x1A0 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT2R - CAN_TDT2R - CAN_TDT2R - 0x1A4 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL2R - CAN_TDL2R - CAN_TDL2R - 0x1A8 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH2R - CAN_TDH2R - CAN_TDH2R - 0x1AC - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI0R - CAN_RI0R - CAN_RI0R - 0x1B0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT0R - CAN_RDT0R - CAN_RDT0R - 0x1B4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL0R - CAN_RDL0R - CAN_RDL0R - 0x1B8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH0R - CAN_RDH0R - CAN_RDH0R - 0x1BC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI1R - CAN_RI1R - CAN_RI1R - 0x1C0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT1R - CAN_RDT1R - CAN_RDT1R - 0x1C4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL1R - CAN_RDL1R - CAN_RDL1R - 0x1C8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH1R - CAN_RDH1R - CAN_RDH1R - 0x1CC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_FMR - CAN_FMR - CAN_FMR - 0x200 - 0x20 - read-write - 0x00000000 - - - FINIT - FINIT - 0 - 1 - - - - - CAN_FM1R - CAN_FM1R - CAN_FM1R - 0x204 - 0x20 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - - - CAN_FS1R - CAN_FS1R - CAN_FS1R - 0x20C - 0x20 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - - - CAN_FFA1R - CAN_FFA1R - CAN_FFA1R - 0x214 - 0x20 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - - - CAN_FA1R - CAN_FA1R - CAN_FA1R - 0x21C - 0x20 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - - - F0R1 - F0R1 - Filter bank 0 register 1 - 0x240 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - F0R2 - Filter bank 0 register 2 - 0x244 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - F1R1 - Filter bank 1 register 1 - 0x248 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - F1R2 - Filter bank 1 register 2 - 0x24C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - F2R1 - Filter bank 2 register 1 - 0x250 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - F2R2 - Filter bank 2 register 2 - 0x254 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - F3R1 - Filter bank 3 register 1 - 0x258 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - F3R2 - Filter bank 3 register 2 - 0x25C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - F4R1 - Filter bank 4 register 1 - 0x260 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - F4R2 - Filter bank 4 register 2 - 0x264 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - F5R1 - Filter bank 5 register 1 - 0x268 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - F5R2 - Filter bank 5 register 2 - 0x26C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - F6R1 - Filter bank 6 register 1 - 0x270 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - F6R2 - Filter bank 6 register 2 - 0x274 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - F7R1 - Filter bank 7 register 1 - 0x278 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - F7R2 - Filter bank 7 register 2 - 0x27C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - F8R1 - Filter bank 8 register 1 - 0x280 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - F8R2 - Filter bank 8 register 2 - 0x284 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - F9R1 - Filter bank 9 register 1 - 0x288 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - F9R2 - Filter bank 9 register 2 - 0x28C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - F10R1 - Filter bank 10 register 1 - 0x290 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - F10R2 - Filter bank 10 register 2 - 0x294 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - F11R1 - Filter bank 11 register 1 - 0x298 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - F11R2 - Filter bank 11 register 2 - 0x29C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - F12R1 - Filter bank 4 register 1 - 0x2A0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - F12R2 - Filter bank 12 register 2 - 0x2A4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - F13R1 - Filter bank 13 register 1 - 0x2A8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - F13R2 - Filter bank 13 register 2 - 0x2AC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - CAN2 - 0x40006800 - - - DAC - Digital to analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - - CR - CR - Control register (DAC_CR) - 0x0 - 0x20 - read-write - 0x00000000 - - - EN1 - DAC channel1 enable - 0 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - TSEL1 - DAC channel1 trigger - selection - 3 - 3 - - - WAVE1 - DAC channel1 noise/triangle wave - generation enable - 6 - 2 - - - MAMP1 - DAC channel1 mask/amplitude - selector - 8 - 4 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - EN2 - DAC channel2 enable - 16 - 1 - - - BOFF2 - DAC channel2 output buffer - disable - 17 - 1 - - - TEN2 - DAC channel2 trigger - enable - 18 - 1 - - - TSEL2 - DAC channel2 trigger - selection - 19 - 3 - - - WAVE2 - DAC channel2 noise/triangle wave - generation enable - 22 - 2 - - - MAMP2 - DAC channel2 mask/amplitude - selector - 24 - 4 - - - DMAEN2 - DAC channel2 DMA enable - 28 - 1 - - - - - SWTRIGR - SWTRIGR - DAC software trigger register - (DAC_SWTRIGR) - 0x4 - 0x20 - write-only - 0x00000000 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - SWTRIG2 - DAC channel2 software - trigger - 1 - 1 - - - - - DHR12R1 - DHR12R1 - DAC channel1 12-bit right-aligned data - holding register(DAC_DHR12R1) - 0x8 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - DHR12L1 - DAC channel1 12-bit left aligned data - holding register (DAC_DHR12L1) - 0xC - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - DHR8R1 - DAC channel1 8-bit right aligned data - holding register (DAC_DHR8R1) - 0x10 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DHR12R2 - DHR12R2 - DAC channel2 12-bit right aligned data - holding register (DAC_DHR12R2) - 0x14 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L2 - DHR12L2 - DAC channel2 12-bit left aligned data - holding register (DAC_DHR12L2) - 0x18 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R2 - DHR8R2 - DAC channel2 8-bit right-aligned data - holding register (DAC_DHR8R2) - 0x1C - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 0 - 8 - - - - - DHR12RD - DHR12RD - Dual DAC 12-bit right-aligned data holding - register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 - Reserved - 0x20 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 16 - 12 - - - - - DHR12LD - DHR12LD - DUAL DAC 12-bit left aligned data holding - register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 - Reserved - 0x24 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 20 - 12 - - - - - DHR8RD - DHR8RD - DUAL DAC 8-bit right aligned data holding - register (DAC_DHR8RD), Bits 31:16 Reserved - 0x28 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 8 - 8 - - - - - DOR1 - DOR1 - DAC channel1 data output register - (DAC_DOR1) - 0x2C - 0x20 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - DOR2 - DOR2 - DAC channel2 data output register - (DAC_DOR2) - 0x30 - 0x20 - read-only - 0x00000000 - - - DACC2DOR - DAC channel2 data output - 0 - 12 - - - - - - - DBG - Debug support - DBG - 0xE0042000 - - 0x0 - 0x400 - registers - - - - IDCODE - IDCODE - DBGMCU_IDCODE - 0x0 - 0x20 - read-only - 0x0 - - - DEV_ID - DEV_ID - 0 - 12 - - - REV_ID - REV_ID - 16 - 16 - - - - - CR - CR - DBGMCU_CR - 0x4 - 0x20 - read-write - 0x0 - - - DBG_SLEEP - DBG_SLEEP - 0 - 1 - - - DBG_STOP - DBG_STOP - 1 - 1 - - - DBG_STANDBY - DBG_STANDBY - 2 - 1 - - - TRACE_IOEN - TRACE_IOEN - 5 - 1 - - - TRACE_MODE - TRACE_MODE - 6 - 2 - - - DBG_IWDG_STOP - DBG_IWDG_STOP - 8 - 1 - - - DBG_WWDG_STOP - DBG_WWDG_STOP - 9 - 1 - - - DBG_TIM1_STOP - DBG_TIM1_STOP - 10 - 1 - - - DBG_TIM2_STOP - DBG_TIM2_STOP - 11 - 1 - - - DBG_TIM3_STOP - DBG_TIM3_STOP - 12 - 1 - - - DBG_TIM4_STOP - DBG_TIM4_STOP - 13 - 1 - - - DBG_CAN1_STOP - DBG_CAN1_STOP - 14 - 1 - - - DBG_I2C1_SMBUS_TIMEOUT - DBG_I2C1_SMBUS_TIMEOUT - 15 - 1 - - - DBG_I2C2_SMBUS_TIMEOUT - DBG_I2C2_SMBUS_TIMEOUT - 16 - 1 - - - DBG_TIM8_STOP - DBG_TIM8_STOP - 17 - 1 - - - DBG_TIM5_STOP - DBG_TIM5_STOP - 18 - 1 - - - DBG_TIM6_STOP - DBG_TIM6_STOP - 19 - 1 - - - DBG_TIM7_STOP - DBG_TIM7_STOP - 20 - 1 - - - DBG_CAN2_STOP - DBG_CAN2_STOP - 21 - 1 - - - - - - - UART4 - Universal asynchronous receiver - transmitter - USART - 0x40004C00 - - 0x0 - 0x400 - registers - - - UART4 - UART4 global interrupt - 52 - - - - SR - SR - UART4_SR - 0x0 - 0x20 - 0x0 - - - PE - Parity error - 0 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - NE - Noise error flag - 2 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - TC - Transmission complete - 6 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - - - DR - DR - UART4_DR - 0x4 - 0x20 - read-write - 0x0 - - - DR - DR - 0 - 9 - - - - - BRR - BRR - UART4_BRR - 0x8 - 0x20 - read-write - 0x0 - - - DIV_Fraction - DIV_Fraction - 0 - 4 - - - DIV_Mantissa - DIV_Mantissa - 4 - 12 - - - - - CR1 - CR1 - UART4_CR1 - 0xC - 0x20 - read-write - 0x0 - - - SBK - Send break - 0 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - RE - Receiver enable - 2 - 1 - - - TE - Transmitter enable - 3 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - PS - Parity selection - 9 - 1 - - - PCE - Parity control enable - 10 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - M - Word length - 12 - 1 - - - UE - USART enable - 13 - 1 - - - - - CR2 - CR2 - UART4_CR2 - 0x10 - 0x20 - read-write - 0x0 - - - ADD - Address of the USART node - 0 - 4 - - - LBDL - lin break detection length - 5 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - STOP - STOP bits - 12 - 2 - - - LINEN - LIN mode enable - 14 - 1 - - - - - CR3 - CR3 - UART4_CR3 - 0x14 - 0x20 - read-write - 0x0 - - - EIE - Error interrupt enable - 0 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - - - - - UART5 - Universal asynchronous receiver - transmitter - USART - 0x40005000 - - 0x0 - 0x400 - registers - - - UART5 - UART5 global interrupt - 53 - - - - SR - SR - UART4_SR - 0x0 - 0x20 - 0x0 - - - PE - PE - 0 - 1 - read-only - - - FE - FE - 1 - 1 - read-only - - - NE - NE - 2 - 1 - read-only - - - ORE - ORE - 3 - 1 - read-only - - - IDLE - IDLE - 4 - 1 - read-only - - - RXNE - RXNE - 5 - 1 - read-write - - - TC - TC - 6 - 1 - read-write - - - TXE - TXE - 7 - 1 - read-only - - - LBD - LBD - 8 - 1 - read-write - - - - - DR - DR - UART4_DR - 0x4 - 0x20 - read-write - 0x0 - - - DR - DR - 0 - 9 - - - - - BRR - BRR - UART4_BRR - 0x8 - 0x20 - read-write - 0x0 - - - DIV_Fraction - DIV_Fraction - 0 - 4 - - - DIV_Mantissa - DIV_Mantissa - 4 - 12 - - - - - CR1 - CR1 - UART4_CR1 - 0xC - 0x20 - read-write - 0x0 - - - SBK - SBK - 0 - 1 - - - RWU - RWU - 1 - 1 - - - RE - RE - 2 - 1 - - - TE - TE - 3 - 1 - - - IDLEIE - IDLEIE - 4 - 1 - - - RXNEIE - RXNEIE - 5 - 1 - - - TCIE - TCIE - 6 - 1 - - - TXEIE - TXEIE - 7 - 1 - - - PEIE - PEIE - 8 - 1 - - - PS - PS - 9 - 1 - - - PCE - PCE - 10 - 1 - - - WAKE - WAKE - 11 - 1 - - - M - M - 12 - 1 - - - UE - UE - 13 - 1 - - - - - CR2 - CR2 - UART4_CR2 - 0x10 - 0x20 - read-write - 0x0 - - - ADD - ADD - 0 - 4 - - - LBDL - LBDL - 5 - 1 - - - LBDIE - LBDIE - 6 - 1 - - - STOP - STOP - 12 - 2 - - - LINEN - LINEN - 14 - 1 - - - - - CR3 - CR3 - UART4_CR3 - 0x14 - 0x20 - read-write - 0x0 - - - EIE - Error interrupt enable - 0 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - - - - - CRC - CRC calculation unit - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - DR - Data register - 0x0 - 0x20 - read-write - 0xFFFFFFFF - - - DR - Data Register - 0 - 32 - - - - - IDR - IDR - Independent Data register - 0x4 - 0x20 - read-write - 0x00000000 - - - IDR - Independent Data register - 0 - 8 - - - - - CR - CR - Control register - 0x8 - 0x20 - write-only - 0x00000000 - - - RESET - Reset bit - 0 - 1 - - - - - - - FLASH - FLASH - FLASH - 0x40022000 - - 0x0 - 0x400 - registers - - - FLASH - Flash global interrupt - 4 - - - - ACR - ACR - Flash access control register - 0x0 - 0x20 - 0x00000030 - - - LATENCY - Latency - 0 - 3 - read-write - - - HLFCYA - Flash half cycle access - enable - 3 - 1 - read-write - - - PRFTBE - Prefetch buffer enable - 4 - 1 - read-write - - - PRFTBS - Prefetch buffer status - 5 - 1 - read-only - - - - - KEYR - KEYR - Flash key register - 0x4 - 0x20 - write-only - 0x00000000 - - - KEY - FPEC key - 0 - 32 - - - - - OPTKEYR - OPTKEYR - Flash option key register - 0x8 - 0x20 - write-only - 0x00000000 - - - OPTKEY - Option byte key - 0 - 32 - - - - - SR - SR - Status register - 0xC - 0x20 - 0x00000000 - - - EOP - End of operation - 5 - 1 - read-write - - - WRPRTERR - Write protection error - 4 - 1 - read-write - - - PGERR - Programming error - 2 - 1 - read-write - - - BSY - Busy - 0 - 1 - read-only - - - - - CR - CR - Control register - 0x10 - 0x20 - read-write - 0x00000080 - - - PG - Programming - 0 - 1 - - - PER - Page Erase - 1 - 1 - - - MER - Mass Erase - 2 - 1 - - - OPTPG - Option byte programming - 4 - 1 - - - OPTER - Option byte erase - 5 - 1 - - - STRT - Start - 6 - 1 - - - LOCK - Lock - 7 - 1 - - - OPTWRE - Option bytes write enable - 9 - 1 - - - ERRIE - Error interrupt enable - 10 - 1 - - - EOPIE - End of operation interrupt - enable - 12 - 1 - - - - - AR - AR - Flash address register - 0x14 - 0x20 - write-only - 0x00000000 - - - FAR - Flash Address - 0 - 32 - - - - - OBR - OBR - Option byte register - 0x1C - 0x20 - read-only - 0x03FFFFFC - - - OPTERR - Option byte error - 0 - 1 - - - RDPRT - Read protection - 1 - 1 - - - WDG_SW - WDG_SW - 2 - 1 - - - nRST_STOP - nRST_STOP - 3 - 1 - - - nRST_STDBY - nRST_STDBY - 4 - 1 - - - Data0 - Data0 - 10 - 8 - - - Data1 - Data1 - 18 - 8 - - - - - WRPR - WRPR - Write protection register - 0x20 - 0x20 - read-only - 0xFFFFFFFF - - - WRP - Write protect - 0 - 32 - - - - - - - NVIC - Nested Vectored Interrupt - Controller - NVIC - 0xE000E000 - - 0x0 - 0x1001 - registers - - - - ICTR - ICTR - Interrupt Controller Type - Register - 0x4 - 0x20 - read-only - 0x00000000 - - - INTLINESNUM - Total number of interrupt lines in - groups - 0 - 4 - - - - - STIR - STIR - Software Triggered Interrupt - Register - 0xF00 - 0x20 - write-only - 0x00000000 - - - INTID - interrupt to be triggered - 0 - 9 - - - - - ISER0 - ISER0 - Interrupt Set-Enable Register - 0x100 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ISER1 - ISER1 - Interrupt Set-Enable Register - 0x104 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ICER0 - ICER0 - Interrupt Clear-Enable - Register - 0x180 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ICER1 - ICER1 - Interrupt Clear-Enable - Register - 0x184 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ISPR0 - ISPR0 - Interrupt Set-Pending Register - 0x200 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ISPR1 - ISPR1 - Interrupt Set-Pending Register - 0x204 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ICPR0 - ICPR0 - Interrupt Clear-Pending - Register - 0x280 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - ICPR1 - ICPR1 - Interrupt Clear-Pending - Register - 0x284 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - IABR0 - IABR0 - Interrupt Active Bit Register - 0x300 - 0x20 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IABR1 - IABR1 - Interrupt Active Bit Register - 0x304 - 0x20 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IPR0 - IPR0 - Interrupt Priority Register - 0x400 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR1 - IPR1 - Interrupt Priority Register - 0x404 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR2 - IPR2 - Interrupt Priority Register - 0x408 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR3 - IPR3 - Interrupt Priority Register - 0x40C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR4 - IPR4 - Interrupt Priority Register - 0x410 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR5 - IPR5 - Interrupt Priority Register - 0x414 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR6 - IPR6 - Interrupt Priority Register - 0x418 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR7 - IPR7 - Interrupt Priority Register - 0x41C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR8 - IPR8 - Interrupt Priority Register - 0x420 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR9 - IPR9 - Interrupt Priority Register - 0x424 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR10 - IPR10 - Interrupt Priority Register - 0x428 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR11 - IPR11 - Interrupt Priority Register - 0x42C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR12 - IPR12 - Interrupt Priority Register - 0x430 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR13 - IPR13 - Interrupt Priority Register - 0x434 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR14 - IPR14 - Interrupt Priority Register - 0x438 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - - - USB - Universal serial bus full-speed device - interface - USB - 0x40005C00 - - 0x0 - 0x400 - registers - - - USB_HP_CAN_TX - USB High Priority or CAN TX - interrupts - 19 - - - USB_LP_CAN_RX0 - USB Low Priority or CAN RX0 - interrupts - 20 - - - - EP0R - EP0R - endpoint 0 register - 0x0 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP1R - EP1R - endpoint 1 register - 0x4 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP2R - EP2R - endpoint 2 register - 0x8 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP3R - EP3R - endpoint 3 register - 0xC - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP4R - EP4R - endpoint 4 register - 0x10 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP5R - EP5R - endpoint 5 register - 0x14 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP6R - EP6R - endpoint 6 register - 0x18 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP7R - EP7R - endpoint 7 register - 0x1C - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - CNTR - CNTR - control register - 0x40 - 0x20 - read-write - 0x00000003 - - - FRES - Force USB Reset - 0 - 1 - - - PDWN - Power down - 1 - 1 - - - LPMODE - Low-power mode - 2 - 1 - - - FSUSP - Force suspend - 3 - 1 - - - RESUME - Resume request - 4 - 1 - - - ESOFM - Expected start of frame interrupt - mask - 8 - 1 - - - SOFM - Start of frame interrupt - mask - 9 - 1 - - - RESETM - USB reset interrupt mask - 10 - 1 - - - SUSPM - Suspend mode interrupt - mask - 11 - 1 - - - WKUPM - Wakeup interrupt mask - 12 - 1 - - - ERRM - Error interrupt mask - 13 - 1 - - - PMAOVRM - Packet memory area over / underrun - interrupt mask - 14 - 1 - - - CTRM - Correct transfer interrupt - mask - 15 - 1 - - - - - ISTR - ISTR - interrupt status register - 0x44 - 0x20 - read-write - 0x00000000 - - - EP_ID - Endpoint Identifier - 0 - 4 - - - DIR - Direction of transaction - 4 - 1 - - - ESOF - Expected start frame - 8 - 1 - - - SOF - start of frame - 9 - 1 - - - RESET - reset request - 10 - 1 - - - SUSP - Suspend mode request - 11 - 1 - - - WKUP - Wakeup - 12 - 1 - - - ERR - Error - 13 - 1 - - - PMAOVR - Packet memory area over / - underrun - 14 - 1 - - - CTR - Correct transfer - 15 - 1 - - - - - FNR - FNR - frame number register - 0x48 - 0x20 - read-only - 0x0000 - - - FN - Frame number - 0 - 11 - - - LSOF - Lost SOF - 11 - 2 - - - LCK - Locked - 13 - 1 - - - RXDM - Receive data - line status - 14 - 1 - - - RXDP - Receive data + line status - 15 - 1 - - - - - DADDR - DADDR - device address - 0x4C - 0x20 - read-write - 0x0000 - - - ADD - Device address - 0 - 7 - - - EF - Enable function - 7 - 1 - - - - - BTABLE - BTABLE - Buffer table address - 0x50 - 0x20 - read-write - 0x0000 - - - BTABLE - Buffer table - 3 - 13 - - - - - - - OTG_FS_DEVICE - USB on the go full speed - USB_OTG_FS - 0x50000800 - - 0x0 - 0x400 - registers - - - - FS_DCFG - FS_DCFG - OTG_FS device configuration register - (OTG_FS_DCFG) - 0x0 - 0x20 - read-write - 0x02200000 - - - DSPD - Device speed - 0 - 2 - - - NZLSOHSK - Non-zero-length status OUT - handshake - 2 - 1 - - - DAD - Device address - 4 - 7 - - - PFIVL - Periodic frame interval - 11 - 2 - - - - - FS_DCTL - FS_DCTL - OTG_FS device control register - (OTG_FS_DCTL) - 0x4 - 0x20 - 0x00000000 - - - RWUSIG - Remote wakeup signaling - 0 - 1 - read-write - - - SDIS - Soft disconnect - 1 - 1 - read-write - - - GINSTS - Global IN NAK status - 2 - 1 - read-only - - - GONSTS - Global OUT NAK status - 3 - 1 - read-only - - - TCTL - Test control - 4 - 3 - read-write - - - SGINAK - Set global IN NAK - 7 - 1 - read-write - - - CGINAK - Clear global IN NAK - 8 - 1 - read-write - - - SGONAK - Set global OUT NAK - 9 - 1 - read-write - - - CGONAK - Clear global OUT NAK - 10 - 1 - read-write - - - POPRGDNE - Power-on programming done - 11 - 1 - read-write - - - - - FS_DSTS - FS_DSTS - OTG_FS device status register - (OTG_FS_DSTS) - 0x8 - 0x20 - read-only - 0x00000010 - - - SUSPSTS - Suspend status - 0 - 1 - - - ENUMSPD - Enumerated speed - 1 - 2 - - - EERR - Erratic error - 3 - 1 - - - FNSOF - Frame number of the received - SOF - 8 - 14 - - - - - FS_DIEPMSK - FS_DIEPMSK - OTG_FS device IN endpoint common interrupt - mask register (OTG_FS_DIEPMSK) - 0x10 - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (Non-isochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - - - FS_DOEPMSK - FS_DOEPMSK - OTG_FS device OUT endpoint common interrupt - mask register (OTG_FS_DOEPMSK) - 0x14 - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - STUPM - SETUP phase done mask - 3 - 1 - - - OTEPDM - OUT token received when endpoint - disabled mask - 4 - 1 - - - - - FS_DAINT - FS_DAINT - OTG_FS device all endpoints interrupt - register (OTG_FS_DAINT) - 0x18 - 0x20 - read-only - 0x00000000 - - - IEPINT - IN endpoint interrupt bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - FS_DAINTMSK - FS_DAINTMSK - OTG_FS all endpoints interrupt mask register - (OTG_FS_DAINTMSK) - 0x1C - 0x20 - read-write - 0x00000000 - - - IEPM - IN EP interrupt mask bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - DVBUSDIS - DVBUSDIS - OTG_FS device VBUS discharge time - register - 0x28 - 0x20 - read-write - 0x000017D7 - - - VBUSDT - Device VBUS discharge time - 0 - 16 - - - - - DVBUSPULSE - DVBUSPULSE - OTG_FS device VBUS pulsing time - register - 0x2C - 0x20 - read-write - 0x000005B8 - - - DVBUSP - Device VBUS pulsing time - 0 - 12 - - - - - DIEPEMPMSK - DIEPEMPMSK - OTG_FS device IN endpoint FIFO empty - interrupt mask register - 0x34 - 0x20 - read-write - 0x00000000 - - - INEPTXFEM - IN EP Tx FIFO empty interrupt mask - bits - 0 - 16 - - - - - FS_DIEPCTL0 - FS_DIEPCTL0 - OTG_FS device control IN endpoint 0 control - register (OTG_FS_DIEPCTL0) - 0x100 - 0x20 - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 2 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-only - - - STALL - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-only - - - EPENA - Endpoint enable - 31 - 1 - read-only - - - - - DIEPCTL1 - DIEPCTL1 - OTG device endpoint-1 control - register - 0x120 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM_SD1PID - SODDFRM/SD1PID - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL2 - DIEPCTL2 - OTG device endpoint-2 control - register - 0x140 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL3 - DIEPCTL3 - OTG device endpoint-3 control - register - 0x160 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL0 - DOEPCTL0 - device endpoint-0 control - register - 0x300 - 0x20 - 0x00008000 - - - EPENA - EPENA - 31 - 1 - write-only - - - EPDIS - EPDIS - 30 - 1 - read-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-only - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-only - - - MPSIZ - MPSIZ - 0 - 2 - read-only - - - - - DOEPCTL1 - DOEPCTL1 - device endpoint-1 control - register - 0x320 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL2 - DOEPCTL2 - device endpoint-2 control - register - 0x340 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL3 - DOEPCTL3 - device endpoint-3 control - register - 0x360 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPINT0 - DIEPINT0 - device endpoint-x interrupt - register - 0x108 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT1 - DIEPINT1 - device endpoint-1 interrupt - register - 0x128 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT2 - DIEPINT2 - device endpoint-2 interrupt - register - 0x148 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT3 - DIEPINT3 - device endpoint-3 interrupt - register - 0x168 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DOEPINT0 - DOEPINT0 - device endpoint-0 interrupt - register - 0x308 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT1 - DOEPINT1 - device endpoint-1 interrupt - register - 0x328 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT2 - DOEPINT2 - device endpoint-2 interrupt - register - 0x348 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT3 - DOEPINT3 - device endpoint-3 interrupt - register - 0x368 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DIEPTSIZ0 - DIEPTSIZ0 - device endpoint-0 transfer size - register - 0x110 - 0x20 - read-write - 0x00000000 - - - PKTCNT - Packet count - 19 - 2 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DOEPTSIZ0 - DOEPTSIZ0 - device OUT endpoint-0 transfer size - register - 0x310 - 0x20 - read-write - 0x00000000 - - - STUPCNT - SETUP packet count - 29 - 2 - - - PKTCNT - Packet count - 19 - 1 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DIEPTSIZ1 - DIEPTSIZ1 - device endpoint-1 transfer size - register - 0x130 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ2 - DIEPTSIZ2 - device endpoint-2 transfer size - register - 0x150 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ3 - DIEPTSIZ3 - device endpoint-3 transfer size - register - 0x170 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DTXFSTS0 - DTXFSTS0 - OTG_FS device IN endpoint transmit FIFO - status register - 0x118 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS1 - DTXFSTS1 - OTG_FS device IN endpoint transmit FIFO - status register - 0x138 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS2 - DTXFSTS2 - OTG_FS device IN endpoint transmit FIFO - status register - 0x158 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS3 - DTXFSTS3 - OTG_FS device IN endpoint transmit FIFO - status register - 0x178 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DOEPTSIZ1 - DOEPTSIZ1 - device OUT endpoint-1 transfer size - register - 0x330 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ2 - DOEPTSIZ2 - device OUT endpoint-2 transfer size - register - 0x350 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ3 - DOEPTSIZ3 - device OUT endpoint-3 transfer size - register - 0x370 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - - - OTG_FS_GLOBAL - USB on the go full speed - USB_OTG_FS - 0x50000000 - - 0x0 - 0x400 - registers - - - - FS_GOTGCTL - FS_GOTGCTL - OTG_FS control and status register - (OTG_FS_GOTGCTL) - 0x0 - 0x20 - 0x00000800 - - - SRQSCS - Session request success - 0 - 1 - read-only - - - SRQ - Session request - 1 - 1 - read-write - - - HNGSCS - Host negotiation success - 8 - 1 - read-only - - - HNPRQ - HNP request - 9 - 1 - read-write - - - HSHNPEN - Host set HNP enable - 10 - 1 - read-write - - - DHNPEN - Device HNP enabled - 11 - 1 - read-write - - - CIDSTS - Connector ID status - 16 - 1 - read-only - - - DBCT - Long/short debounce time - 17 - 1 - read-only - - - ASVLD - A-session valid - 18 - 1 - read-only - - - BSVLD - B-session valid - 19 - 1 - read-only - - - - - FS_GOTGINT - FS_GOTGINT - OTG_FS interrupt register - (OTG_FS_GOTGINT) - 0x4 - 0x20 - read-write - 0x00000000 - - - SEDET - Session end detected - 2 - 1 - - - SRSSCHG - Session request success status - change - 8 - 1 - - - HNSSCHG - Host negotiation success status - change - 9 - 1 - - - HNGDET - Host negotiation detected - 17 - 1 - - - ADTOCHG - A-device timeout change - 18 - 1 - - - DBCDNE - Debounce done - 19 - 1 - - - - - FS_GAHBCFG - FS_GAHBCFG - OTG_FS AHB configuration register - (OTG_FS_GAHBCFG) - 0x8 - 0x20 - read-write - 0x00000000 - - - GINT - Global interrupt mask - 0 - 1 - - - TXFELVL - TxFIFO empty level - 7 - 1 - - - PTXFELVL - Periodic TxFIFO empty - level - 8 - 1 - - - - - FS_GUSBCFG - FS_GUSBCFG - OTG_FS USB configuration register - (OTG_FS_GUSBCFG) - 0xC - 0x20 - 0x00000A00 - - - TOCAL - FS timeout calibration - 0 - 3 - read-write - - - PHYSEL - Full Speed serial transceiver - select - 6 - 1 - write-only - - - SRPCAP - SRP-capable - 8 - 1 - read-write - - - HNPCAP - HNP-capable - 9 - 1 - read-write - - - TRDT - USB turnaround time - 10 - 4 - read-write - - - FHMOD - Force host mode - 29 - 1 - read-write - - - FDMOD - Force device mode - 30 - 1 - read-write - - - CTXPKT - Corrupt Tx packet - 31 - 1 - read-write - - - - - FS_GRSTCTL - FS_GRSTCTL - OTG_FS reset register - (OTG_FS_GRSTCTL) - 0x10 - 0x20 - 0x20000000 - - - CSRST - Core soft reset - 0 - 1 - read-write - - - HSRST - HCLK soft reset - 1 - 1 - read-write - - - FCRST - Host frame counter reset - 2 - 1 - read-write - - - RXFFLSH - RxFIFO flush - 4 - 1 - read-write - - - TXFFLSH - TxFIFO flush - 5 - 1 - read-write - - - TXFNUM - TxFIFO number - 6 - 5 - read-write - - - AHBIDL - AHB master idle - 31 - 1 - read-only - - - - - FS_GINTSTS - FS_GINTSTS - OTG_FS core interrupt register - (OTG_FS_GINTSTS) - 0x14 - 0x20 - 0x04000020 - - - CMOD - Current mode of operation - 0 - 1 - read-only - - - MMIS - Mode mismatch interrupt - 1 - 1 - read-write - - - OTGINT - OTG interrupt - 2 - 1 - read-only - - - SOF - Start of frame - 3 - 1 - read-write - - - RXFLVL - RxFIFO non-empty - 4 - 1 - read-only - - - NPTXFE - Non-periodic TxFIFO empty - 5 - 1 - read-only - - - GINAKEFF - Global IN non-periodic NAK - effective - 6 - 1 - read-only - - - GOUTNAKEFF - Global OUT NAK effective - 7 - 1 - read-only - - - ESUSP - Early suspend - 10 - 1 - read-write - - - USBSUSP - USB suspend - 11 - 1 - read-write - - - USBRST - USB reset - 12 - 1 - read-write - - - ENUMDNE - Enumeration done - 13 - 1 - read-write - - - ISOODRP - Isochronous OUT packet dropped - interrupt - 14 - 1 - read-write - - - EOPF - End of periodic frame - interrupt - 15 - 1 - read-write - - - IEPINT - IN endpoint interrupt - 18 - 1 - read-only - - - OEPINT - OUT endpoint interrupt - 19 - 1 - read-only - - - IISOIXFR - Incomplete isochronous IN - transfer - 20 - 1 - read-write - - - IPXFR_INCOMPISOOUT - Incomplete periodic transfer(Host - mode)/Incomplete isochronous OUT transfer(Device - mode) - 21 - 1 - read-write - - - HPRTINT - Host port interrupt - 24 - 1 - read-only - - - HCINT - Host channels interrupt - 25 - 1 - read-only - - - PTXFE - Periodic TxFIFO empty - 26 - 1 - read-only - - - CIDSCHG - Connector ID status change - 28 - 1 - read-write - - - DISCINT - Disconnect detected - interrupt - 29 - 1 - read-write - - - SRQINT - Session request/new session detected - interrupt - 30 - 1 - read-write - - - WKUPINT - Resume/remote wakeup detected - interrupt - 31 - 1 - read-write - - - - - FS_GINTMSK - FS_GINTMSK - OTG_FS interrupt mask register - (OTG_FS_GINTMSK) - 0x18 - 0x20 - 0x00000000 - - - MMISM - Mode mismatch interrupt - mask - 1 - 1 - read-write - - - OTGINT - OTG interrupt mask - 2 - 1 - read-write - - - SOFM - Start of frame mask - 3 - 1 - read-write - - - RXFLVLM - Receive FIFO non-empty - mask - 4 - 1 - read-write - - - NPTXFEM - Non-periodic TxFIFO empty - mask - 5 - 1 - read-write - - - GINAKEFFM - Global non-periodic IN NAK effective - mask - 6 - 1 - read-write - - - GONAKEFFM - Global OUT NAK effective - mask - 7 - 1 - read-write - - - ESUSPM - Early suspend mask - 10 - 1 - read-write - - - USBSUSPM - USB suspend mask - 11 - 1 - read-write - - - USBRST - USB reset mask - 12 - 1 - read-write - - - ENUMDNEM - Enumeration done mask - 13 - 1 - read-write - - - ISOODRPM - Isochronous OUT packet dropped interrupt - mask - 14 - 1 - read-write - - - EOPFM - End of periodic frame interrupt - mask - 15 - 1 - read-write - - - EPMISM - Endpoint mismatch interrupt - mask - 17 - 1 - read-write - - - IEPINT - IN endpoints interrupt - mask - 18 - 1 - read-write - - - OEPINT - OUT endpoints interrupt - mask - 19 - 1 - read-write - - - IISOIXFRM - Incomplete isochronous IN transfer - mask - 20 - 1 - read-write - - - IPXFRM_IISOOXFRM - Incomplete periodic transfer mask(Host - mode)/Incomplete isochronous OUT transfer mask(Device - mode) - 21 - 1 - read-write - - - PRTIM - Host port interrupt mask - 24 - 1 - read-only - - - HCIM - Host channels interrupt - mask - 25 - 1 - read-write - - - PTXFEM - Periodic TxFIFO empty mask - 26 - 1 - read-write - - - CIDSCHGM - Connector ID status change - mask - 28 - 1 - read-write - - - DISCINT - Disconnect detected interrupt - mask - 29 - 1 - read-write - - - SRQIM - Session request/new session detected - interrupt mask - 30 - 1 - read-write - - - WUIM - Resume/remote wakeup detected interrupt - mask - 31 - 1 - read-write - - - - - FS_GRXSTSR_Device - FS_GRXSTSR_Device - OTG_FS Receive status debug read(Device - mode) - 0x1C - 0x20 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXSTSR_Host - FS_GRXSTSR_Host - OTG_FS Receive status debug read(Host - mode) - FS_GRXSTSR_Device - 0x1C - 0x20 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXFSIZ - FS_GRXFSIZ - OTG_FS Receive FIFO size register - (OTG_FS_GRXFSIZ) - 0x24 - 0x20 - read-write - 0x00000200 - - - RXFD - RxFIFO depth - 0 - 16 - - - - - FS_GNPTXFSIZ_Device - FS_GNPTXFSIZ_Device - OTG_FS non-periodic transmit FIFO size - register (Device mode) - 0x28 - 0x20 - read-write - 0x00000200 - - - TX0FSA - Endpoint 0 transmit RAM start - address - 0 - 16 - - - TX0FD - Endpoint 0 TxFIFO depth - 16 - 16 - - - - - FS_GNPTXFSIZ_Host - FS_GNPTXFSIZ_Host - OTG_FS non-periodic transmit FIFO size - register (Host mode) - - FS_GNPTXFSIZ_Device - 0x28 - 0x20 - read-write - 0x00000200 - - - NPTXFSA - Non-periodic transmit RAM start - address - 0 - 16 - - - NPTXFD - Non-periodic TxFIFO depth - 16 - 16 - - - - - FS_GNPTXSTS - FS_GNPTXSTS - OTG_FS non-periodic transmit FIFO/queue - status register (OTG_FS_GNPTXSTS) - 0x2C - 0x20 - read-only - 0x00080200 - - - NPTXFSAV - Non-periodic TxFIFO space - available - 0 - 16 - - - NPTQXSAV - Non-periodic transmit request queue - space available - 16 - 8 - - - NPTXQTOP - Top of the non-periodic transmit request - queue - 24 - 7 - - - - - FS_GCCFG - FS_GCCFG - OTG_FS general core configuration register - (OTG_FS_GCCFG) - 0x38 - 0x20 - read-write - 0x00000000 - - - PWRDWN - Power down - 16 - 1 - - - VBUSASEN - Enable the VBUS sensing - device - 18 - 1 - - - VBUSBSEN - Enable the VBUS sensing - device - 19 - 1 - - - SOFOUTEN - SOF output enable - 20 - 1 - - - - - FS_CID - FS_CID - core ID register - 0x3C - 0x20 - read-write - 0x00001000 - - - PRODUCT_ID - Product ID field - 0 - 32 - - - - - FS_HPTXFSIZ - FS_HPTXFSIZ - OTG_FS Host periodic transmit FIFO size - register (OTG_FS_HPTXFSIZ) - 0x100 - 0x20 - read-write - 0x02000600 - - - PTXSA - Host periodic TxFIFO start - address - 0 - 16 - - - PTXFSIZ - Host periodic TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF1 - FS_DIEPTXF1 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF2) - 0x104 - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO2 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF2 - FS_DIEPTXF2 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF3) - 0x108 - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO3 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF3 - FS_DIEPTXF3 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF4) - 0x10C - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO4 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - - - OTG_FS_HOST - USB on the go full speed - USB_OTG_FS - 0x50000400 - - 0x0 - 0x400 - registers - - - - FS_HCFG - FS_HCFG - OTG_FS host configuration register - (OTG_FS_HCFG) - 0x0 - 0x20 - 0x00000000 - - - FSLSPCS - FS/LS PHY clock select - 0 - 2 - read-write - - - FSLSS - FS- and LS-only support - 2 - 1 - read-only - - - - - HFIR - HFIR - OTG_FS Host frame interval - register - 0x4 - 0x20 - read-write - 0x0000EA60 - - - FRIVL - Frame interval - 0 - 16 - - - - - FS_HFNUM - FS_HFNUM - OTG_FS host frame number/frame time - remaining register (OTG_FS_HFNUM) - 0x8 - 0x20 - read-only - 0x00003FFF - - - FRNUM - Frame number - 0 - 16 - - - FTREM - Frame time remaining - 16 - 16 - - - - - FS_HPTXSTS - FS_HPTXSTS - OTG_FS_Host periodic transmit FIFO/queue - status register (OTG_FS_HPTXSTS) - 0x10 - 0x20 - 0x00080100 - - - PTXFSAVL - Periodic transmit data FIFO space - available - 0 - 16 - read-write - - - PTXQSAV - Periodic transmit request queue space - available - 16 - 8 - read-only - - - PTXQTOP - Top of the periodic transmit request - queue - 24 - 8 - read-only - - - - - HAINT - HAINT - OTG_FS Host all channels interrupt - register - 0x14 - 0x20 - read-only - 0x00000000 - - - HAINT - Channel interrupts - 0 - 16 - - - - - HAINTMSK - HAINTMSK - OTG_FS host all channels interrupt mask - register - 0x18 - 0x20 - read-write - 0x00000000 - - - HAINTM - Channel interrupt mask - 0 - 16 - - - - - FS_HPRT - FS_HPRT - OTG_FS host port control and status register - (OTG_FS_HPRT) - 0x40 - 0x20 - 0x00000000 - - - PCSTS - Port connect status - 0 - 1 - read-only - - - PCDET - Port connect detected - 1 - 1 - read-write - - - PENA - Port enable - 2 - 1 - read-write - - - PENCHNG - Port enable/disable change - 3 - 1 - read-write - - - POCA - Port overcurrent active - 4 - 1 - read-only - - - POCCHNG - Port overcurrent change - 5 - 1 - read-write - - - PRES - Port resume - 6 - 1 - read-write - - - PSUSP - Port suspend - 7 - 1 - read-write - - - PRST - Port reset - 8 - 1 - read-write - - - PLSTS - Port line status - 10 - 2 - read-only - - - PPWR - Port power - 12 - 1 - read-write - - - PTCTL - Port test control - 13 - 4 - read-write - - - PSPD - Port speed - 17 - 2 - read-only - - - - - FS_HCCHAR0 - FS_HCCHAR0 - OTG_FS host channel-0 characteristics - register (OTG_FS_HCCHAR0) - 0x100 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR1 - FS_HCCHAR1 - OTG_FS host channel-1 characteristics - register (OTG_FS_HCCHAR1) - 0x120 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR2 - FS_HCCHAR2 - OTG_FS host channel-2 characteristics - register (OTG_FS_HCCHAR2) - 0x140 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR3 - FS_HCCHAR3 - OTG_FS host channel-3 characteristics - register (OTG_FS_HCCHAR3) - 0x160 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR4 - FS_HCCHAR4 - OTG_FS host channel-4 characteristics - register (OTG_FS_HCCHAR4) - 0x180 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR5 - FS_HCCHAR5 - OTG_FS host channel-5 characteristics - register (OTG_FS_HCCHAR5) - 0x1A0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR6 - FS_HCCHAR6 - OTG_FS host channel-6 characteristics - register (OTG_FS_HCCHAR6) - 0x1C0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR7 - FS_HCCHAR7 - OTG_FS host channel-7 characteristics - register (OTG_FS_HCCHAR7) - 0x1E0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCINT0 - FS_HCINT0 - OTG_FS host channel-0 interrupt register - (OTG_FS_HCINT0) - 0x108 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT1 - FS_HCINT1 - OTG_FS host channel-1 interrupt register - (OTG_FS_HCINT1) - 0x128 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT2 - FS_HCINT2 - OTG_FS host channel-2 interrupt register - (OTG_FS_HCINT2) - 0x148 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT3 - FS_HCINT3 - OTG_FS host channel-3 interrupt register - (OTG_FS_HCINT3) - 0x168 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT4 - FS_HCINT4 - OTG_FS host channel-4 interrupt register - (OTG_FS_HCINT4) - 0x188 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT5 - FS_HCINT5 - OTG_FS host channel-5 interrupt register - (OTG_FS_HCINT5) - 0x1A8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT6 - FS_HCINT6 - OTG_FS host channel-6 interrupt register - (OTG_FS_HCINT6) - 0x1C8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT7 - FS_HCINT7 - OTG_FS host channel-7 interrupt register - (OTG_FS_HCINT7) - 0x1E8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINTMSK0 - FS_HCINTMSK0 - OTG_FS host channel-0 mask register - (OTG_FS_HCINTMSK0) - 0x10C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK1 - FS_HCINTMSK1 - OTG_FS host channel-1 mask register - (OTG_FS_HCINTMSK1) - 0x12C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK2 - FS_HCINTMSK2 - OTG_FS host channel-2 mask register - (OTG_FS_HCINTMSK2) - 0x14C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK3 - FS_HCINTMSK3 - OTG_FS host channel-3 mask register - (OTG_FS_HCINTMSK3) - 0x16C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK4 - FS_HCINTMSK4 - OTG_FS host channel-4 mask register - (OTG_FS_HCINTMSK4) - 0x18C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK5 - FS_HCINTMSK5 - OTG_FS host channel-5 mask register - (OTG_FS_HCINTMSK5) - 0x1AC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK6 - FS_HCINTMSK6 - OTG_FS host channel-6 mask register - (OTG_FS_HCINTMSK6) - 0x1CC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK7 - FS_HCINTMSK7 - OTG_FS host channel-7 mask register - (OTG_FS_HCINTMSK7) - 0x1EC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCTSIZ0 - FS_HCTSIZ0 - OTG_FS host channel-0 transfer size - register - 0x110 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ1 - FS_HCTSIZ1 - OTG_FS host channel-1 transfer size - register - 0x130 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ2 - FS_HCTSIZ2 - OTG_FS host channel-2 transfer size - register - 0x150 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ3 - FS_HCTSIZ3 - OTG_FS host channel-3 transfer size - register - 0x170 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ4 - FS_HCTSIZ4 - OTG_FS host channel-x transfer size - register - 0x190 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ5 - FS_HCTSIZ5 - OTG_FS host channel-5 transfer size - register - 0x1B0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ6 - FS_HCTSIZ6 - OTG_FS host channel-6 transfer size - register - 0x1D0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ7 - FS_HCTSIZ7 - OTG_FS host channel-7 transfer size - register - 0x1F0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - - - OTG_FS_PWRCLK - USB on the go full speed - USB_OTG_FS - 0x50000E00 - - 0x0 - 0x400 - registers - - - - FS_PCGCCTL - FS_PCGCCTL - OTG_FS power and clock gating control - register - 0x0 - 0x20 - read-write - 0x00000000 - - - STPPCLK - Stop PHY clock - 0 - 1 - - - GATEHCLK - Gate HCLK - 1 - 1 - - - PHYSUSP - PHY Suspended - 4 - 1 - - - - - - - ETHERNET_MMC - Ethernet: MAC management counters - ETHERNET - 0x40028100 - - 0x0 - 0x400 - registers - - - - MMCCR - MMCCR - Ethernet MMC control register - (ETH_MMCCR) - 0x0 - 0x20 - read-write - 0x00000000 - - - CR - Counter reset - 0 - 1 - - - CSR - Counter stop rollover - 1 - 1 - - - ROR - Reset on read - 2 - 1 - - - MCF - MMC counter freeze - 31 - 1 - - - - - MMCRIR - MMCRIR - Ethernet MMC receive interrupt register - (ETH_MMCRIR) - 0x4 - 0x20 - read-write - 0x00000000 - - - RFCES - Received frames CRC error - status - 5 - 1 - - - RFAES - Received frames alignment error - status - 6 - 1 - - - RGUFS - Received Good Unicast Frames - Status - 17 - 1 - - - - - MMCTIR - MMCTIR - Ethernet MMC transmit interrupt register - (ETH_MMCTIR) - 0x8 - 0x20 - read-write - 0x00000000 - - - TGFSCS - Transmitted good frames single collision - status - 14 - 1 - - - TGFMSCS - Transmitted good frames more single - collision status - 15 - 1 - - - TGFS - Transmitted good frames - status - 21 - 1 - - - - - MMCRIMR - MMCRIMR - Ethernet MMC receive interrupt mask register - (ETH_MMCRIMR) - 0xC - 0x20 - read-write - 0x00000000 - - - RFCEM - Received frame CRC error - mask - 5 - 1 - - - RFAEM - Received frames alignment error - mask - 6 - 1 - - - RGUFM - Received good unicast frames - mask - 17 - 1 - - - - - MMCTIMR - MMCTIMR - Ethernet MMC transmit interrupt mask - register (ETH_MMCTIMR) - 0x10 - 0x20 - read-write - 0x00000000 - - - TGFSCM - Transmitted good frames single collision - mask - 14 - 1 - - - TGFMSCM - Transmitted good frames more single - collision mask - 15 - 1 - - - TGFM - Transmitted good frames - mask - 21 - 1 - - - - - MMCTGFSCCR - MMCTGFSCCR - Ethernet MMC transmitted good frames after a - single collision counter - 0x4C - 0x20 - read-only - 0x00000000 - - - TGFSCC - Transmitted good frames after a single - collision counter - 0 - 32 - - - - - MMCTGFMSCCR - MMCTGFMSCCR - Ethernet MMC transmitted good frames after - more than a single collision - 0x50 - 0x20 - read-only - 0x00000000 - - - TGFMSCC - Transmitted good frames after more than - a single collision counter - 0 - 32 - - - - - MMCTGFCR - MMCTGFCR - Ethernet MMC transmitted good frames counter - register - 0x68 - 0x20 - read-only - 0x00000000 - - - TGFC - Transmitted good frames - counter - 0 - 32 - - - - - MMCRFCECR - MMCRFCECR - Ethernet MMC received frames with CRC error - counter register - 0x94 - 0x20 - read-only - 0x00000000 - - - RFCFC - Received frames with CRC error - counter - 0 - 32 - - - - - MMCRFAECR - MMCRFAECR - Ethernet MMC received frames with alignment - error counter register - 0x98 - 0x20 - read-only - 0x00000000 - - - RFAEC - Received frames with alignment error - counter - 0 - 32 - - - - - MMCRGUFCR - MMCRGUFCR - MMC received good unicast frames counter - register - 0xC4 - 0x20 - read-only - 0x00000000 - - - RGUFC - Received good unicast frames - counter - 0 - 32 - - - - - - - ETHERNET_MAC - Ethernet: media access control - ETHERNET - 0x40028000 - - 0x0 - 0x61 - registers - - - - MACCR - MACCR - Ethernet MAC configuration register - (ETH_MACCR) - 0x0 - 0x20 - read-write - 0x00008000 - - - RE - Receiver enable - 2 - 1 - - - TE - Transmitter enable - 3 - 1 - - - DC - Deferral check - 4 - 1 - - - BL - Back-off limit - 5 - 2 - - - APCS - Automatic pad/CRC - stripping - 7 - 1 - - - RD - Retry disable - 9 - 1 - - - IPCO - IPv4 checksum offload - 10 - 1 - - - DM - Duplex mode - 11 - 1 - - - LM - Loopback mode - 12 - 1 - - - ROD - Receive own disable - 13 - 1 - - - FES - Fast Ethernet speed - 14 - 1 - - - CSD - Carrier sense disable - 16 - 1 - - - IFG - Interframe gap - 17 - 3 - - - JD - Jabber disable - 22 - 1 - - - WD - Watchdog disable - 23 - 1 - - - - - MACFFR - MACFFR - Ethernet MAC frame filter register - (ETH_MACCFFR) - 0x4 - 0x20 - read-write - 0x00000000 - - - PM - Promiscuous mode - 0 - 1 - - - HU - Hash unicast - 1 - 1 - - - HM - Hash multicast - 2 - 1 - - - DAIF - Destination address inverse - filtering - 3 - 1 - - - PAM - Pass all multicast - 4 - 1 - - - BFD - Broadcast frames disable - 5 - 1 - - - PCF - Pass control frames - 6 - 2 - - - SAIF - Source address inverse - filtering - 8 - 1 - - - SAF - Source address filter - 9 - 1 - - - HPF - Hash or perfect filter - 10 - 1 - - - RA - Receive all - 31 - 1 - - - - - MACHTHR - MACHTHR - Ethernet MAC hash table high - register - 0x8 - 0x20 - read-write - 0x00000000 - - - HTH - Hash table high - 0 - 32 - - - - - MACHTLR - MACHTLR - Ethernet MAC hash table low - register - 0xC - 0x20 - read-write - 0x00000000 - - - HTL - Hash table low - 0 - 32 - - - - - MACMIIAR - MACMIIAR - Ethernet MAC MII address register - (ETH_MACMIIAR) - 0x10 - 0x20 - read-write - 0x00000000 - - - MB - MII busy - 0 - 1 - - - MW - MII write - 1 - 1 - - - CR - Clock range - 2 - 3 - - - MR - MII register - 6 - 5 - - - PA - PHY address - 11 - 5 - - - - - MACMIIDR - MACMIIDR - Ethernet MAC MII data register - (ETH_MACMIIDR) - 0x14 - 0x20 - read-write - 0x00000000 - - - MD - MII data - 0 - 16 - - - - - MACFCR - MACFCR - Ethernet MAC flow control register - (ETH_MACFCR) - 0x18 - 0x20 - read-write - 0x00000000 - - - FCB_BPA - Flow control busy/back pressure - activate - 0 - 1 - - - TFCE - Transmit flow control - enable - 1 - 1 - - - RFCE - Receive flow control - enable - 2 - 1 - - - UPFD - Unicast pause frame detect - 3 - 1 - - - PLT - Pause low threshold - 4 - 2 - - - ZQPD - Zero-quanta pause disable - 7 - 1 - - - PT - Pass control frames - 16 - 16 - - - - - MACVLANTR - MACVLANTR - Ethernet MAC VLAN tag register - (ETH_MACVLANTR) - 0x1C - 0x20 - read-write - 0x00000000 - - - VLANTI - VLAN tag identifier (for receive - frames) - 0 - 16 - - - VLANTC - 12-bit VLAN tag comparison - 16 - 1 - - - - - MACRWUFFR - MACRWUFFR - Ethernet MAC remote wakeup frame filter - register (ETH_MACRWUFFR) - 0x28 - 0x20 - read-write - 0x00000000 - - - MACPMTCSR - MACPMTCSR - Ethernet MAC PMT control and status register - (ETH_MACPMTCSR) - 0x2C - 0x20 - read-write - 0x00000000 - - - PD - Power down - 0 - 1 - - - MPE - Magic Packet enable - 1 - 1 - - - WFE - Wakeup frame enable - 2 - 1 - - - MPR - Magic packet received - 5 - 1 - - - WFR - Wakeup frame received - 6 - 1 - - - GU - Global unicast - 9 - 1 - - - WFFRPR - Wakeup frame filter register pointer - reset - 31 - 1 - - - - - MACSR - MACSR - Ethernet MAC interrupt status register - (ETH_MACSR) - 0x38 - 0x20 - read-write - 0x00000000 - - - PMTS - PMT status - 3 - 1 - - - MMCS - MMC status - 4 - 1 - - - MMCRS - MMC receive status - 5 - 1 - - - MMCTS - MMC transmit status - 6 - 1 - - - TSTS - Time stamp trigger status - 9 - 1 - - - - - MACIMR - MACIMR - Ethernet MAC interrupt mask register - (ETH_MACIMR) - 0x3C - 0x20 - read-write - 0x00000000 - - - PMTIM - PMT interrupt mask - 3 - 1 - - - TSTIM - Time stamp trigger interrupt - mask - 9 - 1 - - - - - MACA0HR - MACA0HR - Ethernet MAC address 0 high register - (ETH_MACA0HR) - 0x40 - 0x20 - 0x0010FFFF - - - MACA0H - MAC address0 high - 0 - 16 - read-write - - - MO - Always 1 - 31 - 1 - read-only - - - - - MACA0LR - MACA0LR - Ethernet MAC address 0 low - register - 0x44 - 0x20 - read-write - 0xFFFFFFFF - - - MACA0L - MAC address0 low - 0 - 32 - - - - - MACA1HR - MACA1HR - Ethernet MAC address 1 high register - (ETH_MACA1HR) - 0x48 - 0x20 - read-write - 0x0000FFFF - - - MACA1H - MAC address1 high - 0 - 16 - - - MBC - Mask byte control - 24 - 6 - - - SA - Source address - 30 - 1 - - - AE - Address enable - 31 - 1 - - - - - MACA1LR - MACA1LR - Ethernet MAC address1 low - register - 0x4C - 0x20 - read-write - 0xFFFFFFFF - - - MACA1L - MAC address1 low - 0 - 32 - - - - - MACA2HR - MACA2HR - Ethernet MAC address 2 high register - (ETH_MACA2HR) - 0x50 - 0x20 - read-write - 0x0050 - - - ETH_MACA2HR - Ethernet MAC address 2 high - register - 0 - 16 - - - MBC - Mask byte control - 24 - 6 - - - SA - Source address - 30 - 1 - - - AE - Address enable - 31 - 1 - - - - - MACA2LR - MACA2LR - Ethernet MAC address 2 low - register - 0x54 - 0x20 - read-write - 0xFFFFFFFF - - - MACA2L - MAC address2 low - 0 - 31 - - - - - MACA3HR - MACA3HR - Ethernet MAC address 3 high register - (ETH_MACA3HR) - 0x58 - 0x20 - read-write - 0x0000FFFF - - - MACA3H - MAC address3 high - 0 - 16 - - - MBC - Mask byte control - 24 - 6 - - - SA - Source address - 30 - 1 - - - AE - Address enable - 31 - 1 - - - - - MACA3LR - MACA3LR - Ethernet MAC address 3 low - register - 0x5C - 0x20 - read-write - 0xFFFFFFFF - - - MBCA3L - MAC address3 low - 0 - 32 - - - - - - - ETHERNET_PTP - Ethernet: Precision time protocol - ETHERNET - 0x40028700 - - 0x0 - 0x400 - registers - - - - PTPTSCR - PTPTSCR - Ethernet PTP time stamp control register - (ETH_PTPTSCR) - 0x0 - 0x20 - read-write - 0x00000000 - - - TSE - Time stamp enable - 0 - 1 - - - TSFCU - Time stamp fine or coarse - update - 1 - 1 - - - TSSTI - Time stamp system time - initialize - 2 - 1 - - - TSSTU - Time stamp system time - update - 3 - 1 - - - TSITE - Time stamp interrupt trigger - enable - 4 - 1 - - - TSARU - Time stamp addend register - update - 5 - 1 - - - - - PTPSSIR - PTPSSIR - Ethernet PTP subsecond increment - register - 0x4 - 0x20 - read-write - 0x00000000 - - - STSSI - System time subsecond - increment - 0 - 8 - - - - - PTPTSHR - PTPTSHR - Ethernet PTP time stamp high - register - 0x8 - 0x20 - read-only - 0x00000000 - - - STS - System time second - 0 - 32 - - - - - PTPTSLR - PTPTSLR - Ethernet PTP time stamp low register - (ETH_PTPTSLR) - 0xC - 0x20 - read-only - 0x00000000 - - - STSS - System time subseconds - 0 - 31 - - - STPNS - System time positive or negative - sign - 31 - 1 - - - - - PTPTSHUR - PTPTSHUR - Ethernet PTP time stamp high update - register - 0x10 - 0x20 - read-write - 0x00000000 - - - TSUS - Time stamp update second - 0 - 32 - - - - - PTPTSLUR - PTPTSLUR - Ethernet PTP time stamp low update register - (ETH_PTPTSLUR) - 0x14 - 0x20 - read-write - 0x00000000 - - - TSUSS - Time stamp update - subseconds - 0 - 31 - - - TSUPNS - Time stamp update positive or negative - sign - 31 - 1 - - - - - PTPTSAR - PTPTSAR - Ethernet PTP time stamp addend - register - 0x18 - 0x20 - read-write - 0x00000000 - - - TSA - Time stamp addend - 0 - 32 - - - - - PTPTTHR - PTPTTHR - Ethernet PTP target time high - register - 0x1C - 0x20 - read-write - 0x00000000 - - - TTSH - Target time stamp high - 0 - 32 - - - - - PTPTTLR - PTPTTLR - Ethernet PTP target time low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - TTSL - Target time stamp low - 0 - 32 - - - - - - - ETHERNET_DMA - Ethernet: DMA controller operation - ETHERNET - 0x40029000 - - 0x0 - 0x400 - registers - - - - DMABMR - DMABMR - Ethernet DMA bus mode register - 0x0 - 0x20 - read-write - 0x20101 - - - SR - Software reset - 0 - 1 - - - DA - DMA Arbitration - 1 - 1 - - - DSL - Descriptor skip length - 2 - 5 - - - PBL - Programmable burst length - 8 - 6 - - - RTPR - Rx Tx priority ratio - 14 - 2 - - - FB - Fixed burst - 16 - 1 - - - RDP - Rx DMA PBL - 17 - 6 - - - USP - Use separate PBL - 23 - 1 - - - FPM - 4xPBL mode - 24 - 1 - - - AAB - Address-aligned beats - 25 - 1 - - - - - DMATPDR - DMATPDR - Ethernet DMA transmit poll demand - register - 0x4 - 0x20 - read-write - 0x00000000 - - - TPD - Transmit poll demand - 0 - 32 - - - - - DMARPDR - DMARPDR - EHERNET DMA receive poll demand - register - 0x8 - 0x20 - read-write - 0x00000000 - - - RPD - Receive poll demand - 0 - 32 - - - - - DMARDLAR - DMARDLAR - Ethernet DMA receive descriptor list address - register - 0xC - 0x20 - read-write - 0x00000000 - - - SRL - Start of receive list - 0 - 32 - - - - - DMATDLAR - DMATDLAR - Ethernet DMA transmit descriptor list - address register - 0x10 - 0x20 - read-write - 0x00000000 - - - STL - Start of transmit list - 0 - 32 - - - - - DMASR - DMASR - Ethernet DMA status register - 0x14 - 0x20 - 0x00000000 - - - TS - Transmit status - 0 - 1 - read-write - - - TPSS - Transmit process stopped - status - 1 - 1 - read-write - - - TBUS - Transmit buffer unavailable - status - 2 - 1 - read-write - - - TJTS - Transmit jabber timeout - status - 3 - 1 - read-write - - - ROS - Receive overflow status - 4 - 1 - read-write - - - TUS - Transmit underflow status - 5 - 1 - read-write - - - RS - Receive status - 6 - 1 - read-write - - - RBUS - Receive buffer unavailable - status - 7 - 1 - read-write - - - RPSS - Receive process stopped - status - 8 - 1 - read-write - - - PWTS - Receive watchdog timeout - status - 9 - 1 - read-write - - - ETS - Early transmit status - 10 - 1 - read-write - - - FBES - Fatal bus error status - 13 - 1 - read-write - - - ERS - Early receive status - 14 - 1 - read-write - - - AIS - Abnormal interrupt summary - 15 - 1 - read-write - - - NIS - Normal interrupt summary - 16 - 1 - read-write - - - RPS - Receive process state - 17 - 3 - read-only - - - TPS - Transmit process state - 20 - 3 - read-only - - - EBS - Error bits status - 23 - 3 - read-only - - - MMCS - MMC status - 27 - 1 - read-only - - - PMTS - PMT status - 28 - 1 - read-only - - - TSTS - Time stamp trigger status - 29 - 1 - read-only - - - - - DMAOMR - DMAOMR - Ethernet DMA operation mode - register - 0x18 - 0x20 - read-write - 0x00000000 - - - SR - SR - 1 - 1 - - - OSF - OSF - 2 - 1 - - - RTC - RTC - 3 - 2 - - - FUGF - FUGF - 6 - 1 - - - FEF - FEF - 7 - 1 - - - ST - ST - 13 - 1 - - - TTC - TTC - 14 - 3 - - - FTF - FTF - 20 - 1 - - - TSF - TSF - 21 - 1 - - - DFRF - DFRF - 24 - 1 - - - RSF - RSF - 25 - 1 - - - DTCEFD - DTCEFD - 26 - 1 - - - - - DMAIER - DMAIER - Ethernet DMA interrupt enable - register - 0x1C - 0x20 - read-write - 0x00000000 - - - TIE - Transmit interrupt enable - 0 - 1 - - - TPSIE - Transmit process stopped interrupt - enable - 1 - 1 - - - TBUIE - Transmit buffer unavailable interrupt - enable - 2 - 1 - - - TJTIE - Transmit jabber timeout interrupt - enable - 3 - 1 - - - ROIE - Overflow interrupt enable - 4 - 1 - - - TUIE - Underflow interrupt enable - 5 - 1 - - - RIE - Receive interrupt enable - 6 - 1 - - - RBUIE - Receive buffer unavailable interrupt - enable - 7 - 1 - - - RPSIE - Receive process stopped interrupt - enable - 8 - 1 - - - RWTIE - receive watchdog timeout interrupt - enable - 9 - 1 - - - ETIE - Early transmit interrupt - enable - 10 - 1 - - - FBEIE - Fatal bus error interrupt - enable - 13 - 1 - - - ERIE - Early receive interrupt - enable - 14 - 1 - - - AISE - Abnormal interrupt summary - enable - 15 - 1 - - - NISE - Normal interrupt summary - enable - 16 - 1 - - - - - DMAMFBOCR - DMAMFBOCR - Ethernet DMA missed frame and buffer - overflow counter register - 0x20 - 0x20 - read-only - 0x00000000 - - - MFC - Missed frames by the - controller - 0 - 16 - - - OMFC - Overflow bit for missed frame - counter - 16 - 1 - - - MFA - Missed frames by the - application - 17 - 11 - - - OFOC - Overflow bit for FIFO overflow - counter - 28 - 1 - - - - - DMACHTDR - DMACHTDR - Ethernet DMA current host transmit - descriptor register - 0x48 - 0x20 - read-only - 0x00000000 - - - HTDAP - Host transmit descriptor address - pointer - 0 - 32 - - - - - DMACHRDR - DMACHRDR - Ethernet DMA current host receive descriptor - register - 0x4C - 0x20 - read-only - 0x00000000 - - - HRDAP - Host receive descriptor address - pointer - 0 - 32 - - - - - DMACHTBAR - DMACHTBAR - Ethernet DMA current host transmit buffer - address register - 0x50 - 0x20 - read-only - 0x00000000 - - - HTBAP - Host transmit buffer address - pointer - 0 - 32 - - - - - DMACHRBAR - DMACHRBAR - Ethernet DMA current host receive buffer - address register - 0x54 - 0x20 - read-only - 0x00000000 - - - HRBAP - Host receive buffer address - pointer - 0 - 32 - - - - - - - diff --git a/STM32F407.svd b/STM32F407.svd deleted file mode 100644 index d528bcc51e..0000000000 --- a/STM32F407.svd +++ /dev/null @@ -1,61681 +0,0 @@ - - - STM32F407 - 1.3 - STM32F407 - - - CM4 - r0p1 - little - true - true - 4 - false - - - - 8 - - 32 - - 0x20 - 0x0 - 0xFFFFFFFF - - - RNG - Random number generator - RNG - 0x50060800 - - 0x0 - 0x400 - registers - - - FPU - FPU interrupt - 81 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - IE - Interrupt enable - 3 - 1 - - - RNGEN - Random number generator - enable - 2 - 1 - - - - - SR - SR - status register - 0x4 - 0x20 - 0x00000000 - - - SEIS - Seed error interrupt - status - 6 - 1 - read-write - - - CEIS - Clock error interrupt - status - 5 - 1 - read-write - - - SECS - Seed error current status - 2 - 1 - read-only - - - CECS - Clock error current status - 1 - 1 - read-only - - - DRDY - Data ready - 0 - 1 - read-only - - - - - DR - DR - data register - 0x8 - 0x20 - read-only - 0x00000000 - - - RNDATA - Random data - 0 - 32 - - - - - - - DCMI - Digital camera interface - DCMI - 0x50050000 - - 0x0 - 0x400 - registers - - - DCMI - DCMI global interrupt - 78 - - - - CR - CR - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - ENABLE - DCMI enable - 14 - 1 - - - EDM - Extended data mode - 10 - 2 - - - FCRC - Frame capture rate control - 8 - 2 - - - VSPOL - Vertical synchronization - polarity - 7 - 1 - - - HSPOL - Horizontal synchronization - polarity - 6 - 1 - - - PCKPOL - Pixel clock polarity - 5 - 1 - - - ESS - Embedded synchronization - select - 4 - 1 - - - JPEG - JPEG format - 3 - 1 - - - CROP - Crop feature - 2 - 1 - - - CM - Capture mode - 1 - 1 - - - CAPTURE - Capture enable - 0 - 1 - - - - - SR - SR - status register - 0x4 - 0x20 - read-only - 0x0000 - - - FNE - FIFO not empty - 2 - 1 - - - VSYNC - VSYNC - 1 - 1 - - - HSYNC - HSYNC - 0 - 1 - - - - - RIS - RIS - raw interrupt status register - 0x8 - 0x20 - read-only - 0x0000 - - - LINE_RIS - Line raw interrupt status - 4 - 1 - - - VSYNC_RIS - VSYNC raw interrupt status - 3 - 1 - - - ERR_RIS - Synchronization error raw interrupt - status - 2 - 1 - - - OVR_RIS - Overrun raw interrupt - status - 1 - 1 - - - FRAME_RIS - Capture complete raw interrupt - status - 0 - 1 - - - - - IER - IER - interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - LINE_IE - Line interrupt enable - 4 - 1 - - - VSYNC_IE - VSYNC interrupt enable - 3 - 1 - - - ERR_IE - Synchronization error interrupt - enable - 2 - 1 - - - OVR_IE - Overrun interrupt enable - 1 - 1 - - - FRAME_IE - Capture complete interrupt - enable - 0 - 1 - - - - - MIS - MIS - masked interrupt status - register - 0x10 - 0x20 - read-only - 0x0000 - - - LINE_MIS - Line masked interrupt - status - 4 - 1 - - - VSYNC_MIS - VSYNC masked interrupt - status - 3 - 1 - - - ERR_MIS - Synchronization error masked interrupt - status - 2 - 1 - - - OVR_MIS - Overrun masked interrupt - status - 1 - 1 - - - FRAME_MIS - Capture complete masked interrupt - status - 0 - 1 - - - - - ICR - ICR - interrupt clear register - 0x14 - 0x20 - write-only - 0x0000 - - - LINE_ISC - line interrupt status - clear - 4 - 1 - - - VSYNC_ISC - Vertical synch interrupt status - clear - 3 - 1 - - - ERR_ISC - Synchronization error interrupt status - clear - 2 - 1 - - - OVR_ISC - Overrun interrupt status - clear - 1 - 1 - - - FRAME_ISC - Capture complete interrupt status - clear - 0 - 1 - - - - - ESCR - ESCR - embedded synchronization code - register - 0x18 - 0x20 - read-write - 0x0000 - - - FEC - Frame end delimiter code - 24 - 8 - - - LEC - Line end delimiter code - 16 - 8 - - - LSC - Line start delimiter code - 8 - 8 - - - FSC - Frame start delimiter code - 0 - 8 - - - - - ESUR - ESUR - embedded synchronization unmask - register - 0x1C - 0x20 - read-write - 0x0000 - - - FEU - Frame end delimiter unmask - 24 - 8 - - - LEU - Line end delimiter unmask - 16 - 8 - - - LSU - Line start delimiter - unmask - 8 - 8 - - - FSU - Frame start delimiter - unmask - 0 - 8 - - - - - CWSTRT - CWSTRT - crop window start - 0x20 - 0x20 - read-write - 0x0000 - - - VST - Vertical start line count - 16 - 13 - - - HOFFCNT - Horizontal offset count - 0 - 14 - - - - - CWSIZE - CWSIZE - crop window size - 0x24 - 0x20 - read-write - 0x0000 - - - VLINE - Vertical line count - 16 - 14 - - - CAPCNT - Capture count - 0 - 14 - - - - - DR - DR - data register - 0x28 - 0x20 - read-only - 0x0000 - - - Byte3 - Data byte 3 - 24 - 8 - - - Byte2 - Data byte 2 - 16 - 8 - - - Byte1 - Data byte 1 - 8 - 8 - - - Byte0 - Data byte 0 - 0 - 8 - - - - - - - FSMC - Flexible static memory controller - FSMC - 0xA0000000 - - 0x0 - 0x400 - registers - - - FSMC - FSMC global interrupt - 48 - - - - BCR1 - BCR1 - SRAM/NOR-Flash chip-select control register - 1 - 0x0 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR1 - BTR1 - SRAM/NOR-Flash chip-select timing register - 1 - 0x4 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR2 - BCR2 - SRAM/NOR-Flash chip-select control register - 2 - 0x8 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR2 - BTR2 - SRAM/NOR-Flash chip-select timing register - 2 - 0xC - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR3 - BCR3 - SRAM/NOR-Flash chip-select control register - 3 - 0x10 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR3 - BTR3 - SRAM/NOR-Flash chip-select timing register - 3 - 0x14 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR4 - BCR4 - SRAM/NOR-Flash chip-select control register - 4 - 0x18 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR4 - BTR4 - SRAM/NOR-Flash chip-select timing register - 4 - 0x1C - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - PCR2 - PCR2 - PC Card/NAND Flash control register - 2 - 0x60 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR2 - SR2 - FIFO status and interrupt register - 2 - 0x64 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM2 - PMEM2 - Common memory space timing register - 2 - 0x68 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT2 - PATT2 - Attribute memory space timing register - 2 - 0x6C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR2 - ECCR2 - ECC result register 2 - 0x74 - 0x20 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR3 - PCR3 - PC Card/NAND Flash control register - 3 - 0x80 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR3 - SR3 - FIFO status and interrupt register - 3 - 0x84 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM3 - PMEM3 - Common memory space timing register - 3 - 0x88 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT3 - PATT3 - Attribute memory space timing register - 3 - 0x8C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR3 - ECCR3 - ECC result register 3 - 0x94 - 0x20 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR4 - PCR4 - PC Card/NAND Flash control register - 4 - 0xA0 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR4 - SR4 - FIFO status and interrupt register - 4 - 0xA4 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM4 - PMEM4 - Common memory space timing register - 4 - 0xA8 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT4 - PATT4 - Attribute memory space timing register - 4 - 0xAC - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - PIO4 - PIO4 - I/O space timing register 4 - 0xB0 - 0x20 - read-write - 0xFCFCFCFC - - - IOHIZx - IOHIZx - 24 - 8 - - - IOHOLDx - IOHOLDx - 16 - 8 - - - IOWAITx - IOWAITx - 8 - 8 - - - IOSETx - IOSETx - 0 - 8 - - - - - BWTR1 - BWTR1 - SRAM/NOR-Flash write timing registers - 1 - 0x104 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR2 - BWTR2 - SRAM/NOR-Flash write timing registers - 2 - 0x10C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR3 - BWTR3 - SRAM/NOR-Flash write timing registers - 3 - 0x114 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR4 - BWTR4 - SRAM/NOR-Flash write timing registers - 4 - 0x11C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - - - DBG - Debug support - DBG - 0xE0042000 - - 0x0 - 0x400 - registers - - - - DBGMCU_IDCODE - DBGMCU_IDCODE - IDCODE - 0x0 - 0x20 - read-only - 0x10006411 - - - DEV_ID - DEV_ID - 0 - 12 - - - REV_ID - REV_ID - 16 - 16 - - - - - DBGMCU_CR - DBGMCU_CR - Control Register - 0x4 - 0x20 - read-write - 0x00000000 - - - DBG_SLEEP - DBG_SLEEP - 0 - 1 - - - DBG_STOP - DBG_STOP - 1 - 1 - - - DBG_STANDBY - DBG_STANDBY - 2 - 1 - - - TRACE_IOEN - TRACE_IOEN - 5 - 1 - - - TRACE_MODE - TRACE_MODE - 6 - 2 - - - DBG_I2C2_SMBUS_TIMEOUT - DBG_I2C2_SMBUS_TIMEOUT - 16 - 1 - - - DBG_TIM8_STOP - DBG_TIM8_STOP - 17 - 1 - - - DBG_TIM5_STOP - DBG_TIM5_STOP - 18 - 1 - - - DBG_TIM6_STOP - DBG_TIM6_STOP - 19 - 1 - - - DBG_TIM7_STOP - DBG_TIM7_STOP - 20 - 1 - - - - - DBGMCU_APB1_FZ - DBGMCU_APB1_FZ - Debug MCU APB1 Freeze registe - 0x8 - 0x20 - read-write - 0x00000000 - - - DBG_TIM2_STOP - DBG_TIM2_STOP - 0 - 1 - - - DBG_TIM3_STOP - DBG_TIM3 _STOP - 1 - 1 - - - DBG_TIM4_STOP - DBG_TIM4_STOP - 2 - 1 - - - DBG_TIM5_STOP - DBG_TIM5_STOP - 3 - 1 - - - DBG_TIM6_STOP - DBG_TIM6_STOP - 4 - 1 - - - DBG_TIM7_STOP - DBG_TIM7_STOP - 5 - 1 - - - DBG_TIM12_STOP - DBG_TIM12_STOP - 6 - 1 - - - DBG_TIM13_STOP - DBG_TIM13_STOP - 7 - 1 - - - DBG_TIM14_STOP - DBG_TIM14_STOP - 8 - 1 - - - DBG_WWDG_STOP - DBG_WWDG_STOP - 11 - 1 - - - DBG_IWDEG_STOP - DBG_IWDEG_STOP - 12 - 1 - - - DBG_J2C1_SMBUS_TIMEOUT - DBG_J2C1_SMBUS_TIMEOUT - 21 - 1 - - - DBG_J2C2_SMBUS_TIMEOUT - DBG_J2C2_SMBUS_TIMEOUT - 22 - 1 - - - DBG_J2C3SMBUS_TIMEOUT - DBG_J2C3SMBUS_TIMEOUT - 23 - 1 - - - DBG_CAN1_STOP - DBG_CAN1_STOP - 25 - 1 - - - DBG_CAN2_STOP - DBG_CAN2_STOP - 26 - 1 - - - - - DBGMCU_APB2_FZ - DBGMCU_APB2_FZ - Debug MCU APB2 Freeze registe - 0xC - 0x20 - read-write - 0x00000000 - - - DBG_TIM1_STOP - TIM1 counter stopped when core is - halted - 0 - 1 - - - DBG_TIM8_STOP - TIM8 counter stopped when core is - halted - 1 - 1 - - - DBG_TIM9_STOP - TIM9 counter stopped when core is - halted - 16 - 1 - - - DBG_TIM10_STOP - TIM10 counter stopped when core is - halted - 17 - 1 - - - DBG_TIM11_STOP - TIM11 counter stopped when core is - halted - 18 - 1 - - - - - - - DMA2 - DMA controller - DMA - 0x40026400 - - 0x0 - 0x400 - registers - - - DMA2_Stream0 - DMA2 Stream0 global interrupt - 56 - - - DMA2_Stream1 - DMA2 Stream1 global interrupt - 57 - - - DMA2_Stream2 - DMA2 Stream2 global interrupt - 58 - - - DMA2_Stream3 - DMA2 Stream3 global interrupt - 59 - - - DMA2_Stream4 - DMA2 Stream4 global interrupt - 60 - - - DMA2_Stream5 - DMA2 Stream5 global interrupt - 68 - - - DMA2_Stream6 - DMA2 Stream6 global interrupt - 69 - - - DMA2_Stream7 - DMA2 Stream7 global interrupt - 70 - - - - LISR - LISR - low interrupt status register - 0x0 - 0x20 - read-only - 0x00000000 - - - TCIF3 - Stream x transfer complete interrupt - flag (x = 3..0) - 27 - 1 - - - HTIF3 - Stream x half transfer interrupt flag - (x=3..0) - 26 - 1 - - - TEIF3 - Stream x transfer error interrupt flag - (x=3..0) - 25 - 1 - - - DMEIF3 - Stream x direct mode error interrupt - flag (x=3..0) - 24 - 1 - - - FEIF3 - Stream x FIFO error interrupt flag - (x=3..0) - 22 - 1 - - - TCIF2 - Stream x transfer complete interrupt - flag (x = 3..0) - 21 - 1 - - - HTIF2 - Stream x half transfer interrupt flag - (x=3..0) - 20 - 1 - - - TEIF2 - Stream x transfer error interrupt flag - (x=3..0) - 19 - 1 - - - DMEIF2 - Stream x direct mode error interrupt - flag (x=3..0) - 18 - 1 - - - FEIF2 - Stream x FIFO error interrupt flag - (x=3..0) - 16 - 1 - - - TCIF1 - Stream x transfer complete interrupt - flag (x = 3..0) - 11 - 1 - - - HTIF1 - Stream x half transfer interrupt flag - (x=3..0) - 10 - 1 - - - TEIF1 - Stream x transfer error interrupt flag - (x=3..0) - 9 - 1 - - - DMEIF1 - Stream x direct mode error interrupt - flag (x=3..0) - 8 - 1 - - - FEIF1 - Stream x FIFO error interrupt flag - (x=3..0) - 6 - 1 - - - TCIF0 - Stream x transfer complete interrupt - flag (x = 3..0) - 5 - 1 - - - HTIF0 - Stream x half transfer interrupt flag - (x=3..0) - 4 - 1 - - - TEIF0 - Stream x transfer error interrupt flag - (x=3..0) - 3 - 1 - - - DMEIF0 - Stream x direct mode error interrupt - flag (x=3..0) - 2 - 1 - - - FEIF0 - Stream x FIFO error interrupt flag - (x=3..0) - 0 - 1 - - - - - HISR - HISR - high interrupt status register - 0x4 - 0x20 - read-only - 0x00000000 - - - TCIF7 - Stream x transfer complete interrupt - flag (x=7..4) - 27 - 1 - - - HTIF7 - Stream x half transfer interrupt flag - (x=7..4) - 26 - 1 - - - TEIF7 - Stream x transfer error interrupt flag - (x=7..4) - 25 - 1 - - - DMEIF7 - Stream x direct mode error interrupt - flag (x=7..4) - 24 - 1 - - - FEIF7 - Stream x FIFO error interrupt flag - (x=7..4) - 22 - 1 - - - TCIF6 - Stream x transfer complete interrupt - flag (x=7..4) - 21 - 1 - - - HTIF6 - Stream x half transfer interrupt flag - (x=7..4) - 20 - 1 - - - TEIF6 - Stream x transfer error interrupt flag - (x=7..4) - 19 - 1 - - - DMEIF6 - Stream x direct mode error interrupt - flag (x=7..4) - 18 - 1 - - - FEIF6 - Stream x FIFO error interrupt flag - (x=7..4) - 16 - 1 - - - TCIF5 - Stream x transfer complete interrupt - flag (x=7..4) - 11 - 1 - - - HTIF5 - Stream x half transfer interrupt flag - (x=7..4) - 10 - 1 - - - TEIF5 - Stream x transfer error interrupt flag - (x=7..4) - 9 - 1 - - - DMEIF5 - Stream x direct mode error interrupt - flag (x=7..4) - 8 - 1 - - - FEIF5 - Stream x FIFO error interrupt flag - (x=7..4) - 6 - 1 - - - TCIF4 - Stream x transfer complete interrupt - flag (x=7..4) - 5 - 1 - - - HTIF4 - Stream x half transfer interrupt flag - (x=7..4) - 4 - 1 - - - TEIF4 - Stream x transfer error interrupt flag - (x=7..4) - 3 - 1 - - - DMEIF4 - Stream x direct mode error interrupt - flag (x=7..4) - 2 - 1 - - - FEIF4 - Stream x FIFO error interrupt flag - (x=7..4) - 0 - 1 - - - - - LIFCR - LIFCR - low interrupt flag clear - register - 0x8 - 0x20 - read-write - 0x00000000 - - - CTCIF3 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 27 - 1 - - - CHTIF3 - Stream x clear half transfer interrupt - flag (x = 3..0) - 26 - 1 - - - CTEIF3 - Stream x clear transfer error interrupt - flag (x = 3..0) - 25 - 1 - - - CDMEIF3 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 24 - 1 - - - CFEIF3 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 22 - 1 - - - CTCIF2 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 21 - 1 - - - CHTIF2 - Stream x clear half transfer interrupt - flag (x = 3..0) - 20 - 1 - - - CTEIF2 - Stream x clear transfer error interrupt - flag (x = 3..0) - 19 - 1 - - - CDMEIF2 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 18 - 1 - - - CFEIF2 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 16 - 1 - - - CTCIF1 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 11 - 1 - - - CHTIF1 - Stream x clear half transfer interrupt - flag (x = 3..0) - 10 - 1 - - - CTEIF1 - Stream x clear transfer error interrupt - flag (x = 3..0) - 9 - 1 - - - CDMEIF1 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 8 - 1 - - - CFEIF1 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 6 - 1 - - - CTCIF0 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 5 - 1 - - - CHTIF0 - Stream x clear half transfer interrupt - flag (x = 3..0) - 4 - 1 - - - CTEIF0 - Stream x clear transfer error interrupt - flag (x = 3..0) - 3 - 1 - - - CDMEIF0 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 2 - 1 - - - CFEIF0 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 0 - 1 - - - - - HIFCR - HIFCR - high interrupt flag clear - register - 0xC - 0x20 - read-write - 0x00000000 - - - CTCIF7 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 27 - 1 - - - CHTIF7 - Stream x clear half transfer interrupt - flag (x = 7..4) - 26 - 1 - - - CTEIF7 - Stream x clear transfer error interrupt - flag (x = 7..4) - 25 - 1 - - - CDMEIF7 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 24 - 1 - - - CFEIF7 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 22 - 1 - - - CTCIF6 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 21 - 1 - - - CHTIF6 - Stream x clear half transfer interrupt - flag (x = 7..4) - 20 - 1 - - - CTEIF6 - Stream x clear transfer error interrupt - flag (x = 7..4) - 19 - 1 - - - CDMEIF6 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 18 - 1 - - - CFEIF6 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 16 - 1 - - - CTCIF5 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 11 - 1 - - - CHTIF5 - Stream x clear half transfer interrupt - flag (x = 7..4) - 10 - 1 - - - CTEIF5 - Stream x clear transfer error interrupt - flag (x = 7..4) - 9 - 1 - - - CDMEIF5 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 8 - 1 - - - CFEIF5 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 6 - 1 - - - CTCIF4 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 5 - 1 - - - CHTIF4 - Stream x clear half transfer interrupt - flag (x = 7..4) - 4 - 1 - - - CTEIF4 - Stream x clear transfer error interrupt - flag (x = 7..4) - 3 - 1 - - - CDMEIF4 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 2 - 1 - - - CFEIF4 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 0 - 1 - - - - - S0CR - S0CR - stream x configuration - register - 0x10 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S0NDTR - S0NDTR - stream x number of data - register - 0x14 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S0PAR - S0PAR - stream x peripheral address - register - 0x18 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S0M0AR - S0M0AR - stream x memory 0 address - register - 0x1C - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S0M1AR - S0M1AR - stream x memory 1 address - register - 0x20 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S0FCR - S0FCR - stream x FIFO control register - 0x24 - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S1CR - S1CR - stream x configuration - register - 0x28 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S1NDTR - S1NDTR - stream x number of data - register - 0x2C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S1PAR - S1PAR - stream x peripheral address - register - 0x30 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S1M0AR - S1M0AR - stream x memory 0 address - register - 0x34 - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S1M1AR - S1M1AR - stream x memory 1 address - register - 0x38 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S1FCR - S1FCR - stream x FIFO control register - 0x3C - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S2CR - S2CR - stream x configuration - register - 0x40 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S2NDTR - S2NDTR - stream x number of data - register - 0x44 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S2PAR - S2PAR - stream x peripheral address - register - 0x48 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S2M0AR - S2M0AR - stream x memory 0 address - register - 0x4C - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S2M1AR - S2M1AR - stream x memory 1 address - register - 0x50 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S2FCR - S2FCR - stream x FIFO control register - 0x54 - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S3CR - S3CR - stream x configuration - register - 0x58 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S3NDTR - S3NDTR - stream x number of data - register - 0x5C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S3PAR - S3PAR - stream x peripheral address - register - 0x60 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S3M0AR - S3M0AR - stream x memory 0 address - register - 0x64 - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S3M1AR - S3M1AR - stream x memory 1 address - register - 0x68 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S3FCR - S3FCR - stream x FIFO control register - 0x6C - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S4CR - S4CR - stream x configuration - register - 0x70 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S4NDTR - S4NDTR - stream x number of data - register - 0x74 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S4PAR - S4PAR - stream x peripheral address - register - 0x78 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S4M0AR - S4M0AR - stream x memory 0 address - register - 0x7C - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S4M1AR - S4M1AR - stream x memory 1 address - register - 0x80 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S4FCR - S4FCR - stream x FIFO control register - 0x84 - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S5CR - S5CR - stream x configuration - register - 0x88 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S5NDTR - S5NDTR - stream x number of data - register - 0x8C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S5PAR - S5PAR - stream x peripheral address - register - 0x90 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S5M0AR - S5M0AR - stream x memory 0 address - register - 0x94 - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S5M1AR - S5M1AR - stream x memory 1 address - register - 0x98 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S5FCR - S5FCR - stream x FIFO control register - 0x9C - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S6CR - S6CR - stream x configuration - register - 0xA0 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S6NDTR - S6NDTR - stream x number of data - register - 0xA4 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S6PAR - S6PAR - stream x peripheral address - register - 0xA8 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S6M0AR - S6M0AR - stream x memory 0 address - register - 0xAC - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S6M1AR - S6M1AR - stream x memory 1 address - register - 0xB0 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S6FCR - S6FCR - stream x FIFO control register - 0xB4 - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S7CR - S7CR - stream x configuration - register - 0xB8 - 0x20 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S7NDTR - S7NDTR - stream x number of data - register - 0xBC - 0x20 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S7PAR - S7PAR - stream x peripheral address - register - 0xC0 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S7M0AR - S7M0AR - stream x memory 0 address - register - 0xC4 - 0x20 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S7M1AR - S7M1AR - stream x memory 1 address - register - 0xC8 - 0x20 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S7FCR - S7FCR - stream x FIFO control register - 0xCC - 0x20 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - - - DMA1 - 0x40026000 - - DMA1_Stream0 - DMA1 Stream0 global interrupt - 11 - - - DMA1_Stream1 - DMA1 Stream1 global interrupt - 12 - - - DMA1_Stream2 - DMA1 Stream2 global interrupt - 13 - - - DMA1_Stream3 - DMA1 Stream3 global interrupt - 14 - - - DMA1_Stream4 - DMA1 Stream4 global interrupt - 15 - - - DMA1_Stream5 - DMA1 Stream5 global interrupt - 16 - - - DMA1_Stream6 - DMA1 Stream6 global interrupt - 17 - - - DMA1_Stream7 - DMA1 Stream7 global interrupt - 47 - - - - RCC - Reset and clock control - RCC - 0x40023800 - - 0x0 - 0x400 - registers - - - RCC - RCC global interrupt - 5 - - - - CR - CR - clock control register - 0x0 - 0x20 - 0x00000083 - - - PLLI2SRDY - PLLI2S clock ready flag - 27 - 1 - read-only - - - PLLI2SON - PLLI2S enable - 26 - 1 - read-write - - - PLLRDY - Main PLL (PLL) clock ready - flag - 25 - 1 - read-only - - - PLLON - Main PLL (PLL) enable - 24 - 1 - read-write - - - CSSON - Clock security system - enable - 19 - 1 - read-write - - - HSEBYP - HSE clock bypass - 18 - 1 - read-write - - - HSERDY - HSE clock ready flag - 17 - 1 - read-only - - - HSEON - HSE clock enable - 16 - 1 - read-write - - - HSICAL - Internal high-speed clock - calibration - 8 - 8 - read-only - - - HSITRIM - Internal high-speed clock - trimming - 3 - 5 - read-write - - - HSIRDY - Internal high-speed clock ready - flag - 1 - 1 - read-only - - - HSION - Internal high-speed clock - enable - 0 - 1 - read-write - - - - - PLLCFGR - PLLCFGR - PLL configuration register - 0x4 - 0x20 - read-write - 0x24003010 - - - PLLQ3 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 27 - 1 - - - PLLQ2 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 26 - 1 - - - PLLQ1 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 25 - 1 - - - PLLQ0 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 24 - 1 - - - PLLSRC - Main PLL(PLL) and audio PLL (PLLI2S) - entry clock source - 22 - 1 - - - PLLP1 - Main PLL (PLL) division factor for main - system clock - 17 - 1 - - - PLLP0 - Main PLL (PLL) division factor for main - system clock - 16 - 1 - - - PLLN8 - Main PLL (PLL) multiplication factor for - VCO - 14 - 1 - - - PLLN7 - Main PLL (PLL) multiplication factor for - VCO - 13 - 1 - - - PLLN6 - Main PLL (PLL) multiplication factor for - VCO - 12 - 1 - - - PLLN5 - Main PLL (PLL) multiplication factor for - VCO - 11 - 1 - - - PLLN4 - Main PLL (PLL) multiplication factor for - VCO - 10 - 1 - - - PLLN3 - Main PLL (PLL) multiplication factor for - VCO - 9 - 1 - - - PLLN2 - Main PLL (PLL) multiplication factor for - VCO - 8 - 1 - - - PLLN1 - Main PLL (PLL) multiplication factor for - VCO - 7 - 1 - - - PLLN0 - Main PLL (PLL) multiplication factor for - VCO - 6 - 1 - - - PLLM5 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 5 - 1 - - - PLLM4 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 4 - 1 - - - PLLM3 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 3 - 1 - - - PLLM2 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 2 - 1 - - - PLLM1 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 1 - 1 - - - PLLM0 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 0 - 1 - - - - - CFGR - CFGR - clock configuration register - 0x8 - 0x20 - 0x00000000 - - - MCO2 - Microcontroller clock output - 2 - 30 - 2 - read-write - - - MCO2PRE - MCO2 prescaler - 27 - 3 - read-write - - - MCO1PRE - MCO1 prescaler - 24 - 3 - read-write - - - I2SSRC - I2S clock selection - 23 - 1 - read-write - - - MCO1 - Microcontroller clock output - 1 - 21 - 2 - read-write - - - RTCPRE - HSE division factor for RTC - clock - 16 - 5 - read-write - - - PPRE2 - APB high-speed prescaler - (APB2) - 13 - 3 - read-write - - - PPRE1 - APB Low speed prescaler - (APB1) - 10 - 3 - read-write - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - SWS1 - System clock switch status - 3 - 1 - read-only - - - SWS0 - System clock switch status - 2 - 1 - read-only - - - SW1 - System clock switch - 1 - 1 - read-write - - - SW0 - System clock switch - 0 - 1 - read-write - - - - - CIR - CIR - clock interrupt register - 0xC - 0x20 - 0x00000000 - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - PLLI2SRDYC - PLLI2S ready interrupt - clear - 21 - 1 - write-only - - - PLLRDYC - Main PLL(PLL) ready interrupt - clear - 20 - 1 - write-only - - - HSERDYC - HSE ready interrupt clear - 19 - 1 - write-only - - - HSIRDYC - HSI ready interrupt clear - 18 - 1 - write-only - - - LSERDYC - LSE ready interrupt clear - 17 - 1 - write-only - - - LSIRDYC - LSI ready interrupt clear - 16 - 1 - write-only - - - PLLI2SRDYIE - PLLI2S ready interrupt - enable - 13 - 1 - read-write - - - PLLRDYIE - Main PLL (PLL) ready interrupt - enable - 12 - 1 - read-write - - - HSERDYIE - HSE ready interrupt enable - 11 - 1 - read-write - - - HSIRDYIE - HSI ready interrupt enable - 10 - 1 - read-write - - - LSERDYIE - LSE ready interrupt enable - 9 - 1 - read-write - - - LSIRDYIE - LSI ready interrupt enable - 8 - 1 - read-write - - - CSSF - Clock security system interrupt - flag - 7 - 1 - read-only - - - PLLI2SRDYF - PLLI2S ready interrupt - flag - 5 - 1 - read-only - - - PLLRDYF - Main PLL (PLL) ready interrupt - flag - 4 - 1 - read-only - - - HSERDYF - HSE ready interrupt flag - 3 - 1 - read-only - - - HSIRDYF - HSI ready interrupt flag - 2 - 1 - read-only - - - LSERDYF - LSE ready interrupt flag - 1 - 1 - read-only - - - LSIRDYF - LSI ready interrupt flag - 0 - 1 - read-only - - - - - AHB1RSTR - AHB1RSTR - AHB1 peripheral reset register - 0x10 - 0x20 - read-write - 0x00000000 - - - OTGHSRST - USB OTG HS module reset - 29 - 1 - - - ETHMACRST - Ethernet MAC reset - 25 - 1 - - - DMA2RST - DMA2 reset - 22 - 1 - - - DMA1RST - DMA2 reset - 21 - 1 - - - CRCRST - CRC reset - 12 - 1 - - - GPIOIRST - IO port I reset - 8 - 1 - - - GPIOHRST - IO port H reset - 7 - 1 - - - GPIOGRST - IO port G reset - 6 - 1 - - - GPIOFRST - IO port F reset - 5 - 1 - - - GPIOERST - IO port E reset - 4 - 1 - - - GPIODRST - IO port D reset - 3 - 1 - - - GPIOCRST - IO port C reset - 2 - 1 - - - GPIOBRST - IO port B reset - 1 - 1 - - - GPIOARST - IO port A reset - 0 - 1 - - - - - AHB2RSTR - AHB2RSTR - AHB2 peripheral reset register - 0x14 - 0x20 - read-write - 0x00000000 - - - OTGFSRST - USB OTG FS module reset - 7 - 1 - - - RNGRST - Random number generator module - reset - 6 - 1 - - - DCMIRST - Camera interface reset - 0 - 1 - - - - - AHB3RSTR - AHB3RSTR - AHB3 peripheral reset register - 0x18 - 0x20 - read-write - 0x00000000 - - - FSMCRST - Flexible static memory controller module - reset - 0 - 1 - - - - - APB1RSTR - APB1RSTR - APB1 peripheral reset register - 0x20 - 0x20 - read-write - 0x00000000 - - - DACRST - DAC reset - 29 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - CAN2RST - CAN2 reset - 26 - 1 - - - CAN1RST - CAN1 reset - 25 - 1 - - - I2C3RST - I2C3 reset - 23 - 1 - - - I2C2RST - I2C 2 reset - 22 - 1 - - - I2C1RST - I2C 1 reset - 21 - 1 - - - UART5RST - USART 5 reset - 20 - 1 - - - UART4RST - USART 4 reset - 19 - 1 - - - UART3RST - USART 3 reset - 18 - 1 - - - UART2RST - USART 2 reset - 17 - 1 - - - SPI3RST - SPI 3 reset - 15 - 1 - - - SPI2RST - SPI 2 reset - 14 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - TIM14RST - TIM14 reset - 8 - 1 - - - TIM13RST - TIM13 reset - 7 - 1 - - - TIM12RST - TIM12 reset - 6 - 1 - - - TIM7RST - TIM7 reset - 5 - 1 - - - TIM6RST - TIM6 reset - 4 - 1 - - - TIM5RST - TIM5 reset - 3 - 1 - - - TIM4RST - TIM4 reset - 2 - 1 - - - TIM3RST - TIM3 reset - 1 - 1 - - - TIM2RST - TIM2 reset - 0 - 1 - - - - - APB2RSTR - APB2RSTR - APB2 peripheral reset register - 0x24 - 0x20 - read-write - 0x00000000 - - - TIM11RST - TIM11 reset - 18 - 1 - - - TIM10RST - TIM10 reset - 17 - 1 - - - TIM9RST - TIM9 reset - 16 - 1 - - - SYSCFGRST - System configuration controller - reset - 14 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - SDIORST - SDIO reset - 11 - 1 - - - ADCRST - ADC interface reset (common to all - ADCs) - 8 - 1 - - - USART6RST - USART6 reset - 5 - 1 - - - USART1RST - USART1 reset - 4 - 1 - - - TIM8RST - TIM8 reset - 1 - 1 - - - TIM1RST - TIM1 reset - 0 - 1 - - - - - AHB1ENR - AHB1ENR - AHB1 peripheral clock register - 0x30 - 0x20 - read-write - 0x00100000 - - - OTGHSULPIEN - USB OTG HSULPI clock - enable - 30 - 1 - - - OTGHSEN - USB OTG HS clock enable - 29 - 1 - - - ETHMACPTPEN - Ethernet PTP clock enable - 28 - 1 - - - ETHMACRXEN - Ethernet Reception clock - enable - 27 - 1 - - - ETHMACTXEN - Ethernet Transmission clock - enable - 26 - 1 - - - ETHMACEN - Ethernet MAC clock enable - 25 - 1 - - - DMA2EN - DMA2 clock enable - 22 - 1 - - - DMA1EN - DMA1 clock enable - 21 - 1 - - - BKPSRAMEN - Backup SRAM interface clock - enable - 18 - 1 - - - CRCEN - CRC clock enable - 12 - 1 - - - GPIOIEN - IO port I clock enable - 8 - 1 - - - GPIOHEN - IO port H clock enable - 7 - 1 - - - GPIOGEN - IO port G clock enable - 6 - 1 - - - GPIOFEN - IO port F clock enable - 5 - 1 - - - GPIOEEN - IO port E clock enable - 4 - 1 - - - GPIODEN - IO port D clock enable - 3 - 1 - - - GPIOCEN - IO port C clock enable - 2 - 1 - - - GPIOBEN - IO port B clock enable - 1 - 1 - - - GPIOAEN - IO port A clock enable - 0 - 1 - - - - - AHB2ENR - AHB2ENR - AHB2 peripheral clock enable - register - 0x34 - 0x20 - read-write - 0x00000000 - - - OTGFSEN - USB OTG FS clock enable - 7 - 1 - - - RNGEN - Random number generator clock - enable - 6 - 1 - - - DCMIEN - Camera interface enable - 0 - 1 - - - - - AHB3ENR - AHB3ENR - AHB3 peripheral clock enable - register - 0x38 - 0x20 - read-write - 0x00000000 - - - FSMCEN - Flexible static memory controller module - clock enable - 0 - 1 - - - - - APB1ENR - APB1ENR - APB1 peripheral clock enable - register - 0x40 - 0x20 - read-write - 0x00000000 - - - DACEN - DAC interface clock enable - 29 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - CAN2EN - CAN 2 clock enable - 26 - 1 - - - CAN1EN - CAN 1 clock enable - 25 - 1 - - - I2C3EN - I2C3 clock enable - 23 - 1 - - - I2C2EN - I2C2 clock enable - 22 - 1 - - - I2C1EN - I2C1 clock enable - 21 - 1 - - - UART5EN - UART5 clock enable - 20 - 1 - - - UART4EN - UART4 clock enable - 19 - 1 - - - USART3EN - USART3 clock enable - 18 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - SPI3EN - SPI3 clock enable - 15 - 1 - - - SPI2EN - SPI2 clock enable - 14 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - TIM14EN - TIM14 clock enable - 8 - 1 - - - TIM13EN - TIM13 clock enable - 7 - 1 - - - TIM12EN - TIM12 clock enable - 6 - 1 - - - TIM7EN - TIM7 clock enable - 5 - 1 - - - TIM6EN - TIM6 clock enable - 4 - 1 - - - TIM5EN - TIM5 clock enable - 3 - 1 - - - TIM4EN - TIM4 clock enable - 2 - 1 - - - TIM3EN - TIM3 clock enable - 1 - 1 - - - TIM2EN - TIM2 clock enable - 0 - 1 - - - - - APB2ENR - APB2ENR - APB2 peripheral clock enable - register - 0x44 - 0x20 - read-write - 0x00000000 - - - TIM11EN - TIM11 clock enable - 18 - 1 - - - TIM10EN - TIM10 clock enable - 17 - 1 - - - TIM9EN - TIM9 clock enable - 16 - 1 - - - SYSCFGEN - System configuration controller clock - enable - 14 - 1 - - - SPI1EN - SPI1 clock enable - 12 - 1 - - - SDIOEN - SDIO clock enable - 11 - 1 - - - ADC3EN - ADC3 clock enable - 10 - 1 - - - ADC2EN - ADC2 clock enable - 9 - 1 - - - ADC1EN - ADC1 clock enable - 8 - 1 - - - USART6EN - USART6 clock enable - 5 - 1 - - - USART1EN - USART1 clock enable - 4 - 1 - - - TIM8EN - TIM8 clock enable - 1 - 1 - - - TIM1EN - TIM1 clock enable - 0 - 1 - - - - - AHB1LPENR - AHB1LPENR - AHB1 peripheral clock enable in low power - mode register - 0x50 - 0x20 - read-write - 0x7E6791FF - - - OTGHSULPILPEN - USB OTG HS ULPI clock enable during - Sleep mode - 30 - 1 - - - OTGHSLPEN - USB OTG HS clock enable during Sleep - mode - 29 - 1 - - - ETHMACPTPLPEN - Ethernet PTP clock enable during Sleep - mode - 28 - 1 - - - ETHMACRXLPEN - Ethernet reception clock enable during - Sleep mode - 27 - 1 - - - ETHMACTXLPEN - Ethernet transmission clock enable - during Sleep mode - 26 - 1 - - - ETHMACLPEN - Ethernet MAC clock enable during Sleep - mode - 25 - 1 - - - DMA2LPEN - DMA2 clock enable during Sleep - mode - 22 - 1 - - - DMA1LPEN - DMA1 clock enable during Sleep - mode - 21 - 1 - - - BKPSRAMLPEN - Backup SRAM interface clock enable - during Sleep mode - 18 - 1 - - - SRAM2LPEN - SRAM 2 interface clock enable during - Sleep mode - 17 - 1 - - - SRAM1LPEN - SRAM 1interface clock enable during - Sleep mode - 16 - 1 - - - FLITFLPEN - Flash interface clock enable during - Sleep mode - 15 - 1 - - - CRCLPEN - CRC clock enable during Sleep - mode - 12 - 1 - - - GPIOILPEN - IO port I clock enable during Sleep - mode - 8 - 1 - - - GPIOHLPEN - IO port H clock enable during Sleep - mode - 7 - 1 - - - GPIOGLPEN - IO port G clock enable during Sleep - mode - 6 - 1 - - - GPIOFLPEN - IO port F clock enable during Sleep - mode - 5 - 1 - - - GPIOELPEN - IO port E clock enable during Sleep - mode - 4 - 1 - - - GPIODLPEN - IO port D clock enable during Sleep - mode - 3 - 1 - - - GPIOCLPEN - IO port C clock enable during Sleep - mode - 2 - 1 - - - GPIOBLPEN - IO port B clock enable during Sleep - mode - 1 - 1 - - - GPIOALPEN - IO port A clock enable during sleep - mode - 0 - 1 - - - - - AHB2LPENR - AHB2LPENR - AHB2 peripheral clock enable in low power - mode register - 0x54 - 0x20 - read-write - 0x000000F1 - - - OTGFSLPEN - USB OTG FS clock enable during Sleep - mode - 7 - 1 - - - RNGLPEN - Random number generator clock enable - during Sleep mode - 6 - 1 - - - DCMILPEN - Camera interface enable during Sleep - mode - 0 - 1 - - - - - AHB3LPENR - AHB3LPENR - AHB3 peripheral clock enable in low power - mode register - 0x58 - 0x20 - read-write - 0x00000001 - - - FSMCLPEN - Flexible static memory controller module - clock enable during Sleep mode - 0 - 1 - - - - - APB1LPENR - APB1LPENR - APB1 peripheral clock enable in low power - mode register - 0x60 - 0x20 - read-write - 0x36FEC9FF - - - DACLPEN - DAC interface clock enable during Sleep - mode - 29 - 1 - - - PWRLPEN - Power interface clock enable during - Sleep mode - 28 - 1 - - - CAN2LPEN - CAN 2 clock enable during Sleep - mode - 26 - 1 - - - CAN1LPEN - CAN 1 clock enable during Sleep - mode - 25 - 1 - - - I2C3LPEN - I2C3 clock enable during Sleep - mode - 23 - 1 - - - I2C2LPEN - I2C2 clock enable during Sleep - mode - 22 - 1 - - - I2C1LPEN - I2C1 clock enable during Sleep - mode - 21 - 1 - - - UART5LPEN - UART5 clock enable during Sleep - mode - 20 - 1 - - - UART4LPEN - UART4 clock enable during Sleep - mode - 19 - 1 - - - USART3LPEN - USART3 clock enable during Sleep - mode - 18 - 1 - - - USART2LPEN - USART2 clock enable during Sleep - mode - 17 - 1 - - - SPI3LPEN - SPI3 clock enable during Sleep - mode - 15 - 1 - - - SPI2LPEN - SPI2 clock enable during Sleep - mode - 14 - 1 - - - WWDGLPEN - Window watchdog clock enable during - Sleep mode - 11 - 1 - - - TIM14LPEN - TIM14 clock enable during Sleep - mode - 8 - 1 - - - TIM13LPEN - TIM13 clock enable during Sleep - mode - 7 - 1 - - - TIM12LPEN - TIM12 clock enable during Sleep - mode - 6 - 1 - - - TIM7LPEN - TIM7 clock enable during Sleep - mode - 5 - 1 - - - TIM6LPEN - TIM6 clock enable during Sleep - mode - 4 - 1 - - - TIM5LPEN - TIM5 clock enable during Sleep - mode - 3 - 1 - - - TIM4LPEN - TIM4 clock enable during Sleep - mode - 2 - 1 - - - TIM3LPEN - TIM3 clock enable during Sleep - mode - 1 - 1 - - - TIM2LPEN - TIM2 clock enable during Sleep - mode - 0 - 1 - - - - - APB2LPENR - APB2LPENR - APB2 peripheral clock enabled in low power - mode register - 0x64 - 0x20 - read-write - 0x00075F33 - - - TIM11LPEN - TIM11 clock enable during Sleep - mode - 18 - 1 - - - TIM10LPEN - TIM10 clock enable during Sleep - mode - 17 - 1 - - - TIM9LPEN - TIM9 clock enable during sleep - mode - 16 - 1 - - - SYSCFGLPEN - System configuration controller clock - enable during Sleep mode - 14 - 1 - - - SPI1LPEN - SPI 1 clock enable during Sleep - mode - 12 - 1 - - - SDIOLPEN - SDIO clock enable during Sleep - mode - 11 - 1 - - - ADC3LPEN - ADC 3 clock enable during Sleep - mode - 10 - 1 - - - ADC2LPEN - ADC2 clock enable during Sleep - mode - 9 - 1 - - - ADC1LPEN - ADC1 clock enable during Sleep - mode - 8 - 1 - - - USART6LPEN - USART6 clock enable during Sleep - mode - 5 - 1 - - - USART1LPEN - USART1 clock enable during Sleep - mode - 4 - 1 - - - TIM8LPEN - TIM8 clock enable during Sleep - mode - 1 - 1 - - - TIM1LPEN - TIM1 clock enable during Sleep - mode - 0 - 1 - - - - - BDCR - BDCR - Backup domain control register - 0x70 - 0x20 - 0x00000000 - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - RTCSEL1 - RTC clock source selection - 9 - 1 - read-write - - - RTCSEL0 - RTC clock source selection - 8 - 1 - read-write - - - LSEBYP - External low-speed oscillator - bypass - 2 - 1 - read-write - - - LSERDY - External low-speed oscillator - ready - 1 - 1 - read-only - - - LSEON - External low-speed oscillator - enable - 0 - 1 - read-write - - - - - CSR - CSR - clock control & status - register - 0x74 - 0x20 - 0x0E000000 - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - WDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - PADRSTF - PIN reset flag - 26 - 1 - read-write - - - BORRSTF - BOR reset flag - 25 - 1 - read-write - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - LSIRDY - Internal low-speed oscillator - ready - 1 - 1 - read-only - - - LSION - Internal low-speed oscillator - enable - 0 - 1 - read-write - - - - - SSCGR - SSCGR - spread spectrum clock generation - register - 0x80 - 0x20 - read-write - 0x00000000 - - - SSCGEN - Spread spectrum modulation - enable - 31 - 1 - - - SPREADSEL - Spread Select - 30 - 1 - - - INCSTEP - Incrementation step - 13 - 15 - - - MODPER - Modulation period - 0 - 13 - - - - - PLLI2SCFGR - PLLI2SCFGR - PLLI2S configuration register - 0x84 - 0x20 - read-write - 0x20003000 - - - PLLI2SRx - PLLI2S division factor for I2S - clocks - 28 - 3 - - - PLLI2SNx - PLLI2S multiplication factor for - VCO - 6 - 9 - - - - - - - GPIOI - General-purpose I/Os - GPIO - 0x40022000 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x00000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x00000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - GPIOH - 0x40021C00 - - - GPIOG - 0x40021800 - - - GPIOF - 0x40021400 - - - GPIOE - 0x40021000 - - - GPIOD - 0X40020C00 - - - GPIOC - 0x40020800 - - - GPIOJ - 0x40022400 - - - GPIOK - 0x40022800 - - - GPIOB - General-purpose I/Os - GPIO - 0x40020400 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x00000280 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x000000C0 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x00000100 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - GPIOA - General-purpose I/Os - GPIO - 0x40020000 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0xA8000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x64000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - SYSCFG - System configuration controller - SYSCFG - 0x40013800 - - 0x0 - 0x400 - registers - - - - MEMRM - MEMRM - memory remap register - 0x0 - 0x20 - read-write - 0x00000000 - - - MEM_MODE - MEM_MODE - 0 - 2 - - - - - PMC - PMC - peripheral mode configuration - register - 0x4 - 0x20 - read-write - 0x00000000 - - - MII_RMII_SEL - Ethernet PHY interface - selection - 23 - 1 - - - - - EXTICR1 - EXTICR1 - external interrupt configuration register - 1 - 0x8 - 0x20 - read-write - 0x0000 - - - EXTI3 - EXTI x configuration (x = 0 to - 3) - 12 - 4 - - - EXTI2 - EXTI x configuration (x = 0 to - 3) - 8 - 4 - - - EXTI1 - EXTI x configuration (x = 0 to - 3) - 4 - 4 - - - EXTI0 - EXTI x configuration (x = 0 to - 3) - 0 - 4 - - - - - EXTICR2 - EXTICR2 - external interrupt configuration register - 2 - 0xC - 0x20 - read-write - 0x0000 - - - EXTI7 - EXTI x configuration (x = 4 to - 7) - 12 - 4 - - - EXTI6 - EXTI x configuration (x = 4 to - 7) - 8 - 4 - - - EXTI5 - EXTI x configuration (x = 4 to - 7) - 4 - 4 - - - EXTI4 - EXTI x configuration (x = 4 to - 7) - 0 - 4 - - - - - EXTICR3 - EXTICR3 - external interrupt configuration register - 3 - 0x10 - 0x20 - read-write - 0x0000 - - - EXTI11 - EXTI x configuration (x = 8 to - 11) - 12 - 4 - - - EXTI10 - EXTI10 - 8 - 4 - - - EXTI9 - EXTI x configuration (x = 8 to - 11) - 4 - 4 - - - EXTI8 - EXTI x configuration (x = 8 to - 11) - 0 - 4 - - - - - EXTICR4 - EXTICR4 - external interrupt configuration register - 4 - 0x14 - 0x20 - read-write - 0x0000 - - - EXTI15 - EXTI x configuration (x = 12 to - 15) - 12 - 4 - - - EXTI14 - EXTI x configuration (x = 12 to - 15) - 8 - 4 - - - EXTI13 - EXTI x configuration (x = 12 to - 15) - 4 - 4 - - - EXTI12 - EXTI x configuration (x = 12 to - 15) - 0 - 4 - - - - - CMPCR - CMPCR - Compensation cell control - register - 0x20 - 0x20 - read-only - 0x00000000 - - - READY - READY - 8 - 1 - - - CMP_PD - Compensation cell - power-down - 0 - 1 - - - - - - - SPI1 - Serial peripheral interface - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1 global interrupt - 35 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - DFF - Data frame format - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - FRF - Frame format - 4 - 1 - - - SSOE - SS output enable - 2 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x0002 - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - MODF - Mode fault - 5 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - UDR - Underrun flag - 3 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x0000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x0007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x0000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x0000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x0000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 36 - - - - SPI3 - 0x40003C00 - - SPI3 - SPI3 global interrupt - 51 - - - - I2S2ext - 0x40003400 - - - I2S3ext - 0x40004000 - - - SPI4 - 0x40013400 - - SPI1 - SPI1 global interrupt - 35 - - - - SPI5 - 0x40015000 - - SPI1 - SPI1 global interrupt - 35 - - - - SPI6 - 0x40015400 - - SPI3 - SPI3 global interrupt - 51 - - - - SDIO - Secure digital input/output - interface - SDIO - 0x40012C00 - - 0x0 - 0x400 - registers - - - SDIO - SDIO global interrupt - 49 - - - - POWER - POWER - power control register - 0x0 - 0x20 - read-write - 0x00000000 - - - PWRCTRL - PWRCTRL - 0 - 2 - - - - - CLKCR - CLKCR - SDI clock control register - 0x4 - 0x20 - read-write - 0x00000000 - - - HWFC_EN - HW Flow Control enable - 14 - 1 - - - NEGEDGE - SDIO_CK dephasing selection - bit - 13 - 1 - - - WIDBUS - Wide bus mode enable bit - 11 - 2 - - - BYPASS - Clock divider bypass enable - bit - 10 - 1 - - - PWRSAV - Power saving configuration - bit - 9 - 1 - - - CLKEN - Clock enable bit - 8 - 1 - - - CLKDIV - Clock divide factor - 0 - 8 - - - - - ARG - ARG - argument register - 0x8 - 0x20 - read-write - 0x00000000 - - - CMDARG - Command argument - 0 - 32 - - - - - CMD - CMD - command register - 0xC - 0x20 - read-write - 0x00000000 - - - CE_ATACMD - CE-ATA command - 14 - 1 - - - nIEN - not Interrupt Enable - 13 - 1 - - - ENCMDcompl - Enable CMD completion - 12 - 1 - - - SDIOSuspend - SD I/O suspend command - 11 - 1 - - - CPSMEN - Command path state machine (CPSM) Enable - bit - 10 - 1 - - - WAITPEND - CPSM Waits for ends of data transfer - (CmdPend internal signal). - 9 - 1 - - - WAITINT - CPSM waits for interrupt - request - 8 - 1 - - - WAITRESP - Wait for response bits - 6 - 2 - - - CMDINDEX - Command index - 0 - 6 - - - - - RESPCMD - RESPCMD - command response register - 0x10 - 0x20 - read-only - 0x00000000 - - - RESPCMD - Response command index - 0 - 6 - - - - - RESP1 - RESP1 - response 1..4 register - 0x14 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS1 - see Table 132. - 0 - 32 - - - - - RESP2 - RESP2 - response 1..4 register - 0x18 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS2 - see Table 132. - 0 - 32 - - - - - RESP3 - RESP3 - response 1..4 register - 0x1C - 0x20 - read-only - 0x00000000 - - - CARDSTATUS3 - see Table 132. - 0 - 32 - - - - - RESP4 - RESP4 - response 1..4 register - 0x20 - 0x20 - read-only - 0x00000000 - - - CARDSTATUS4 - see Table 132. - 0 - 32 - - - - - DTIMER - DTIMER - data timer register - 0x24 - 0x20 - read-write - 0x00000000 - - - DATATIME - Data timeout period - 0 - 32 - - - - - DLEN - DLEN - data length register - 0x28 - 0x20 - read-write - 0x00000000 - - - DATALENGTH - Data length value - 0 - 25 - - - - - DCTRL - DCTRL - data control register - 0x2C - 0x20 - read-write - 0x00000000 - - - SDIOEN - SD I/O enable functions - 11 - 1 - - - RWMOD - Read wait mode - 10 - 1 - - - RWSTOP - Read wait stop - 9 - 1 - - - RWSTART - Read wait start - 8 - 1 - - - DBLOCKSIZE - Data block size - 4 - 4 - - - DMAEN - DMA enable bit - 3 - 1 - - - DTMODE - Data transfer mode selection 1: Stream - or SDIO multibyte data transfer. - 2 - 1 - - - DTDIR - Data transfer direction - selection - 1 - 1 - - - DTEN - DTEN - 0 - 1 - - - - - DCOUNT - DCOUNT - data counter register - 0x30 - 0x20 - read-only - 0x00000000 - - - DATACOUNT - Data count value - 0 - 25 - - - - - STA - STA - status register - 0x34 - 0x20 - read-only - 0x00000000 - - - CEATAEND - CE-ATA command completion signal - received for CMD61 - 23 - 1 - - - SDIOIT - SDIO interrupt received - 22 - 1 - - - RXDAVL - Data available in receive - FIFO - 21 - 1 - - - TXDAVL - Data available in transmit - FIFO - 20 - 1 - - - RXFIFOE - Receive FIFO empty - 19 - 1 - - - TXFIFOE - Transmit FIFO empty - 18 - 1 - - - RXFIFOF - Receive FIFO full - 17 - 1 - - - TXFIFOF - Transmit FIFO full - 16 - 1 - - - RXFIFOHF - Receive FIFO half full: there are at - least 8 words in the FIFO - 15 - 1 - - - TXFIFOHE - Transmit FIFO half empty: at least 8 - words can be written into the FIFO - 14 - 1 - - - RXACT - Data receive in progress - 13 - 1 - - - TXACT - Data transmit in progress - 12 - 1 - - - CMDACT - Command transfer in - progress - 11 - 1 - - - DBCKEND - Data block sent/received (CRC check - passed) - 10 - 1 - - - STBITERR - Start bit not detected on all data - signals in wide bus mode - 9 - 1 - - - DATAEND - Data end (data counter, SDIDCOUNT, is - zero) - 8 - 1 - - - CMDSENT - Command sent (no response - required) - 7 - 1 - - - CMDREND - Command response received (CRC check - passed) - 6 - 1 - - - RXOVERR - Received FIFO overrun - error - 5 - 1 - - - TXUNDERR - Transmit FIFO underrun - error - 4 - 1 - - - DTIMEOUT - Data timeout - 3 - 1 - - - CTIMEOUT - Command response timeout - 2 - 1 - - - DCRCFAIL - Data block sent/received (CRC check - failed) - 1 - 1 - - - CCRCFAIL - Command response received (CRC check - failed) - 0 - 1 - - - - - ICR - ICR - interrupt clear register - 0x38 - 0x20 - read-write - 0x00000000 - - - CEATAENDC - CEATAEND flag clear bit - 23 - 1 - - - SDIOITC - SDIOIT flag clear bit - 22 - 1 - - - DBCKENDC - DBCKEND flag clear bit - 10 - 1 - - - STBITERRC - STBITERR flag clear bit - 9 - 1 - - - DATAENDC - DATAEND flag clear bit - 8 - 1 - - - CMDSENTC - CMDSENT flag clear bit - 7 - 1 - - - CMDRENDC - CMDREND flag clear bit - 6 - 1 - - - RXOVERRC - RXOVERR flag clear bit - 5 - 1 - - - TXUNDERRC - TXUNDERR flag clear bit - 4 - 1 - - - DTIMEOUTC - DTIMEOUT flag clear bit - 3 - 1 - - - CTIMEOUTC - CTIMEOUT flag clear bit - 2 - 1 - - - DCRCFAILC - DCRCFAIL flag clear bit - 1 - 1 - - - CCRCFAILC - CCRCFAIL flag clear bit - 0 - 1 - - - - - MASK - MASK - mask register - 0x3C - 0x20 - read-write - 0x00000000 - - - CEATAENDIE - CE-ATA command completion signal - received interrupt enable - 23 - 1 - - - SDIOITIE - SDIO mode interrupt received interrupt - enable - 22 - 1 - - - RXDAVLIE - Data available in Rx FIFO interrupt - enable - 21 - 1 - - - TXDAVLIE - Data available in Tx FIFO interrupt - enable - 20 - 1 - - - RXFIFOEIE - Rx FIFO empty interrupt - enable - 19 - 1 - - - TXFIFOEIE - Tx FIFO empty interrupt - enable - 18 - 1 - - - RXFIFOFIE - Rx FIFO full interrupt - enable - 17 - 1 - - - TXFIFOFIE - Tx FIFO full interrupt - enable - 16 - 1 - - - RXFIFOHFIE - Rx FIFO half full interrupt - enable - 15 - 1 - - - TXFIFOHEIE - Tx FIFO half empty interrupt - enable - 14 - 1 - - - RXACTIE - Data receive acting interrupt - enable - 13 - 1 - - - TXACTIE - Data transmit acting interrupt - enable - 12 - 1 - - - CMDACTIE - Command acting interrupt - enable - 11 - 1 - - - DBCKENDIE - Data block end interrupt - enable - 10 - 1 - - - STBITERRIE - Start bit error interrupt - enable - 9 - 1 - - - DATAENDIE - Data end interrupt enable - 8 - 1 - - - CMDSENTIE - Command sent interrupt - enable - 7 - 1 - - - CMDRENDIE - Command response received interrupt - enable - 6 - 1 - - - RXOVERRIE - Rx FIFO overrun error interrupt - enable - 5 - 1 - - - TXUNDERRIE - Tx FIFO underrun error interrupt - enable - 4 - 1 - - - DTIMEOUTIE - Data timeout interrupt - enable - 3 - 1 - - - CTIMEOUTIE - Command timeout interrupt - enable - 2 - 1 - - - DCRCFAILIE - Data CRC fail interrupt - enable - 1 - 1 - - - CCRCFAILIE - Command CRC fail interrupt - enable - 0 - 1 - - - - - FIFOCNT - FIFOCNT - FIFO counter register - 0x48 - 0x20 - read-only - 0x00000000 - - - FIFOCOUNT - Remaining number of words to be written - to or read from the FIFO. - 0 - 24 - - - - - FIFO - FIFO - data FIFO register - 0x80 - 0x20 - read-write - 0x00000000 - - - FIFOData - Receive and transmit FIFO - data - 0 - 32 - - - - - - - ADC1 - Analog-to-digital converter - ADC - 0x40012000 - - 0x0 - 0x51 - registers - - - ADC - ADC1 global interrupt - 18 - - - - SR - SR - status register - 0x0 - 0x20 - read-write - 0x00000000 - - - OVR - Overrun - 5 - 1 - - - STRT - Regular channel start flag - 4 - 1 - - - JSTRT - Injected channel start - flag - 3 - 1 - - - JEOC - Injected channel end of - conversion - 2 - 1 - - - EOC - Regular channel end of - conversion - 1 - 1 - - - AWD - Analog watchdog flag - 0 - 1 - - - - - CR1 - CR1 - control register 1 - 0x4 - 0x20 - read-write - 0x00000000 - - - OVRIE - Overrun interrupt enable - 26 - 1 - - - RES - Resolution - 24 - 2 - - - AWDEN - Analog watchdog enable on regular - channels - 23 - 1 - - - JAWDEN - Analog watchdog enable on injected - channels - 22 - 1 - - - DISCNUM - Discontinuous mode channel - count - 13 - 3 - - - JDISCEN - Discontinuous mode on injected - channels - 12 - 1 - - - DISCEN - Discontinuous mode on regular - channels - 11 - 1 - - - JAUTO - Automatic injected group - conversion - 10 - 1 - - - AWDSGL - Enable the watchdog on a single channel - in scan mode - 9 - 1 - - - SCAN - Scan mode - 8 - 1 - - - JEOCIE - Interrupt enable for injected - channels - 7 - 1 - - - AWDIE - Analog watchdog interrupt - enable - 6 - 1 - - - EOCIE - Interrupt enable for EOC - 5 - 1 - - - AWDCH - Analog watchdog channel select - bits - 0 - 5 - - - - - CR2 - CR2 - control register 2 - 0x8 - 0x20 - read-write - 0x00000000 - - - SWSTART - Start conversion of regular - channels - 30 - 1 - - - EXTEN - External trigger enable for regular - channels - 28 - 2 - - - EXTSEL - External event select for regular - group - 24 - 4 - - - JSWSTART - Start conversion of injected - channels - 22 - 1 - - - JEXTEN - External trigger enable for injected - channels - 20 - 2 - - - JEXTSEL - External event select for injected - group - 16 - 4 - - - ALIGN - Data alignment - 11 - 1 - - - EOCS - End of conversion - selection - 10 - 1 - - - DDS - DMA disable selection (for single ADC - mode) - 9 - 1 - - - DMA - Direct memory access mode (for single - ADC mode) - 8 - 1 - - - CONT - Continuous conversion - 1 - 1 - - - ADON - A/D Converter ON / OFF - 0 - 1 - - - - - SMPR1 - SMPR1 - sample time register 1 - 0xC - 0x20 - read-write - 0x00000000 - - - SMPx_x - Sample time bits - 0 - 32 - - - - - SMPR2 - SMPR2 - sample time register 2 - 0x10 - 0x20 - read-write - 0x00000000 - - - SMPx_x - Sample time bits - 0 - 32 - - - - - JOFR1 - JOFR1 - injected channel data offset register - x - 0x14 - 0x20 - read-write - 0x00000000 - - - JOFFSET1 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR2 - JOFR2 - injected channel data offset register - x - 0x18 - 0x20 - read-write - 0x00000000 - - - JOFFSET2 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR3 - JOFR3 - injected channel data offset register - x - 0x1C - 0x20 - read-write - 0x00000000 - - - JOFFSET3 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR4 - JOFR4 - injected channel data offset register - x - 0x20 - 0x20 - read-write - 0x00000000 - - - JOFFSET4 - Data offset for injected channel - x - 0 - 12 - - - - - HTR - HTR - watchdog higher threshold - register - 0x24 - 0x20 - read-write - 0x00000FFF - - - HT - Analog watchdog higher - threshold - 0 - 12 - - - - - LTR - LTR - watchdog lower threshold - register - 0x28 - 0x20 - read-write - 0x00000000 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - SQR1 - SQR1 - regular sequence register 1 - 0x2C - 0x20 - read-write - 0x00000000 - - - L - Regular channel sequence - length - 20 - 4 - - - SQ16 - 16th conversion in regular - sequence - 15 - 5 - - - SQ15 - 15th conversion in regular - sequence - 10 - 5 - - - SQ14 - 14th conversion in regular - sequence - 5 - 5 - - - SQ13 - 13th conversion in regular - sequence - 0 - 5 - - - - - SQR2 - SQR2 - regular sequence register 2 - 0x30 - 0x20 - read-write - 0x00000000 - - - SQ12 - 12th conversion in regular - sequence - 25 - 5 - - - SQ11 - 11th conversion in regular - sequence - 20 - 5 - - - SQ10 - 10th conversion in regular - sequence - 15 - 5 - - - SQ9 - 9th conversion in regular - sequence - 10 - 5 - - - SQ8 - 8th conversion in regular - sequence - 5 - 5 - - - SQ7 - 7th conversion in regular - sequence - 0 - 5 - - - - - SQR3 - SQR3 - regular sequence register 3 - 0x34 - 0x20 - read-write - 0x00000000 - - - SQ6 - 6th conversion in regular - sequence - 25 - 5 - - - SQ5 - 5th conversion in regular - sequence - 20 - 5 - - - SQ4 - 4th conversion in regular - sequence - 15 - 5 - - - SQ3 - 3rd conversion in regular - sequence - 10 - 5 - - - SQ2 - 2nd conversion in regular - sequence - 5 - 5 - - - SQ1 - 1st conversion in regular - sequence - 0 - 5 - - - - - JSQR - JSQR - injected sequence register - 0x38 - 0x20 - read-write - 0x00000000 - - - JL - Injected sequence length - 20 - 2 - - - JSQ4 - 4th conversion in injected - sequence - 15 - 5 - - - JSQ3 - 3rd conversion in injected - sequence - 10 - 5 - - - JSQ2 - 2nd conversion in injected - sequence - 5 - 5 - - - JSQ1 - 1st conversion in injected - sequence - 0 - 5 - - - - - JDR1 - JDR1 - injected data register x - 0x3C - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR2 - JDR2 - injected data register x - 0x40 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR3 - JDR3 - injected data register x - 0x44 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR4 - JDR4 - injected data register x - 0x48 - 0x20 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - DR - DR - regular data register - 0x4C - 0x20 - read-only - 0x00000000 - - - DATA - Regular data - 0 - 16 - - - - - - - ADC2 - 0x40012100 - - ADC - ADC2 global interrupts - 18 - - - - ADC3 - 0x40012200 - - ADC - ADC3 global interrupts - 18 - - - - USART6 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40011400 - - 0x0 - 0x400 - registers - - - USART6 - USART6 global interrupt - 71 - - - - SR - SR - Status register - 0x0 - 0x20 - 0x00C00000 - - - CTS - CTS flag - 9 - 1 - read-write - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - TC - Transmission complete - 6 - 1 - read-write - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - NF - Noise detected flag - 2 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - PE - Parity error - 0 - 1 - read-only - - - - - DR - DR - Data register - 0x4 - 0x20 - read-write - 0x00000000 - - - DR - Data value - 0 - 9 - - - - - BRR - BRR - Baud rate register - 0x8 - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - CR1 - CR1 - Control register 1 - 0xC - 0x20 - read-write - 0x0000 - - - OVER8 - Oversampling mode - 15 - 1 - - - UE - USART enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - SBK - Send break - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x10 - 0x20 - read-write - 0x0000 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - lin break detection length - 5 - 1 - - - ADD - Address of the USART node - 0 - 4 - - - - - CR3 - CR3 - Control register 3 - 0x14 - 0x20 - read-write - 0x0000 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - GTPR - GTPR - Guard time and prescaler - register - 0x18 - 0x20 - read-write - 0x0000 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - - - USART1 - 0x40011000 - - USART1 - USART1 global interrupt - 37 - - - - USART2 - 0x40004400 - - USART2 - USART2 global interrupt - 38 - - - - USART3 - 0x40004800 - - USART3 - USART3 global interrupt - 39 - - - - DAC - Digital-to-analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt, DAC1 and DAC2 underrun - error interrupt - 54 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - DMAUDRIE2 - DAC channel2 DMA underrun interrupt - enable - 29 - 1 - - - DMAEN2 - DAC channel2 DMA enable - 28 - 1 - - - MAMP2 - DAC channel2 mask/amplitude - selector - 24 - 4 - - - WAVE2 - DAC channel2 noise/triangle wave - generation enable - 22 - 2 - - - TSEL2 - DAC channel2 trigger - selection - 19 - 3 - - - TEN2 - DAC channel2 trigger - enable - 18 - 1 - - - BOFF2 - DAC channel2 output buffer - disable - 17 - 1 - - - EN2 - DAC channel2 enable - 16 - 1 - - - DMAUDRIE1 - DAC channel1 DMA Underrun Interrupt - enable - 13 - 1 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - MAMP1 - DAC channel1 mask/amplitude - selector - 8 - 4 - - - WAVE1 - DAC channel1 noise/triangle wave - generation enable - 6 - 2 - - - TSEL1 - DAC channel1 trigger - selection - 3 - 3 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - EN1 - DAC channel1 enable - 0 - 1 - - - - - SWTRIGR - SWTRIGR - software trigger register - 0x4 - 0x20 - write-only - 0x00000000 - - - SWTRIG2 - DAC channel2 software - trigger - 1 - 1 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - - - DHR12R1 - DHR12R1 - channel1 12-bit right-aligned data holding - register - 0x8 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - DHR12L1 - channel1 12-bit left aligned data holding - register - 0xC - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - DHR8R1 - channel1 8-bit right aligned data holding - register - 0x10 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DHR12R2 - DHR12R2 - channel2 12-bit right aligned data holding - register - 0x14 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L2 - DHR12L2 - channel2 12-bit left aligned data holding - register - 0x18 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R2 - DHR8R2 - channel2 8-bit right-aligned data holding - register - 0x1C - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 0 - 8 - - - - - DHR12RD - DHR12RD - Dual DAC 12-bit right-aligned data holding - register - 0x20 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 16 - 12 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12LD - DHR12LD - DUAL DAC 12-bit left aligned data holding - register - 0x24 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 20 - 12 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8RD - DHR8RD - DUAL DAC 8-bit right aligned data holding - register - 0x28 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 8 - 8 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DOR1 - DOR1 - channel1 data output register - 0x2C - 0x20 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - DOR2 - DOR2 - channel2 data output register - 0x30 - 0x20 - read-only - 0x00000000 - - - DACC2DOR - DAC channel2 data output - 0 - 12 - - - - - SR - SR - status register - 0x34 - 0x20 - read-write - 0x00000000 - - - DMAUDR2 - DAC channel2 DMA underrun - flag - 29 - 1 - - - DMAUDR1 - DAC channel1 DMA underrun - flag - 13 - 1 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - PVD - PVD through EXTI line detection - interrupt - 1 - - - - CR - CR - power control register - 0x0 - 0x20 - read-write - 0x00000000 - - - FPDS - Flash power down in Stop - mode - 9 - 1 - - - DBP - Disable backup domain write - protection - 8 - 1 - - - PLS - PVD level selection - 5 - 3 - - - PVDE - Power voltage detector - enable - 4 - 1 - - - CSBF - Clear standby flag - 3 - 1 - - - CWUF - Clear wakeup flag - 2 - 1 - - - PDDS - Power down deepsleep - 1 - 1 - - - LPDS - Low-power deep sleep - 0 - 1 - - - - - CSR - CSR - power control/status register - 0x4 - 0x20 - 0x00000000 - - - WUF - Wakeup flag - 0 - 1 - read-only - - - SBF - Standby flag - 1 - 1 - read-only - - - PVDO - PVD output - 2 - 1 - read-only - - - BRR - Backup regulator ready - 3 - 1 - read-only - - - EWUP - Enable WKUP pin - 8 - 1 - read-write - - - BRE - Backup regulator enable - 9 - 1 - read-write - - - VOSRDY - Regulator voltage scaling output - selection ready bit - 14 - 1 - read-write - - - - - - - I2C3 - Inter-integrated circuit - I2C - 0x40005C00 - - 0x0 - 0x400 - registers - - - I2C3_EV - I2C3 event interrupt - 72 - - - I2C3_ER - I2C3 error interrupt - 73 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - SWRST - Software reset - 15 - 1 - - - ALERT - SMBus alert - 13 - 1 - - - PEC - Packet error checking - 12 - 1 - - - POS - Acknowledge/PEC Position (for data - reception) - 11 - 1 - - - ACK - Acknowledge enable - 10 - 1 - - - STOP - Stop generation - 9 - 1 - - - START - Start generation - 8 - 1 - - - NOSTRETCH - Clock stretching disable (Slave - mode) - 7 - 1 - - - ENGC - General call enable - 6 - 1 - - - ENPEC - PEC enable - 5 - 1 - - - ENARP - ARP enable - 4 - 1 - - - SMBTYPE - SMBus type - 3 - 1 - - - SMBUS - SMBus mode - 1 - 1 - - - PE - Peripheral enable - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - LAST - DMA last transfer - 12 - 1 - - - DMAEN - DMA requests enable - 11 - 1 - - - ITBUFEN - Buffer interrupt enable - 10 - 1 - - - ITEVTEN - Event interrupt enable - 9 - 1 - - - ITERREN - Error interrupt enable - 8 - 1 - - - FREQ - Peripheral clock frequency - 0 - 6 - - - - - OAR1 - OAR1 - Own address register 1 - 0x8 - 0x20 - read-write - 0x0000 - - - ADDMODE - Addressing mode (slave - mode) - 15 - 1 - - - ADD10 - Interface address - 8 - 2 - - - ADD7 - Interface address - 1 - 7 - - - ADD0 - Interface address - 0 - 1 - - - - - OAR2 - OAR2 - Own address register 2 - 0xC - 0x20 - read-write - 0x0000 - - - ADD2 - Interface address - 1 - 7 - - - ENDUAL - Dual addressing mode - enable - 0 - 1 - - - - - DR - DR - Data register - 0x10 - 0x20 - read-write - 0x0000 - - - DR - 8-bit data register - 0 - 8 - - - - - SR1 - SR1 - Status register 1 - 0x14 - 0x20 - 0x0000 - - - SMBALERT - SMBus alert - 15 - 1 - read-write - - - TIMEOUT - Timeout or Tlow error - 14 - 1 - read-write - - - PECERR - PEC Error in reception - 12 - 1 - read-write - - - OVR - Overrun/Underrun - 11 - 1 - read-write - - - AF - Acknowledge failure - 10 - 1 - read-write - - - ARLO - Arbitration lost (master - mode) - 9 - 1 - read-write - - - BERR - Bus error - 8 - 1 - read-write - - - TxE - Data register empty - (transmitters) - 7 - 1 - read-only - - - RxNE - Data register not empty - (receivers) - 6 - 1 - read-only - - - STOPF - Stop detection (slave - mode) - 4 - 1 - read-only - - - ADD10 - 10-bit header sent (Master - mode) - 3 - 1 - read-only - - - BTF - Byte transfer finished - 2 - 1 - read-only - - - ADDR - Address sent (master mode)/matched - (slave mode) - 1 - 1 - read-only - - - SB - Start bit (Master mode) - 0 - 1 - read-only - - - - - SR2 - SR2 - Status register 2 - 0x18 - 0x20 - read-only - 0x0000 - - - PEC - acket error checking - register - 8 - 8 - - - DUALF - Dual flag (Slave mode) - 7 - 1 - - - SMBHOST - SMBus host header (Slave - mode) - 6 - 1 - - - SMBDEFAULT - SMBus device default address (Slave - mode) - 5 - 1 - - - GENCALL - General call address (Slave - mode) - 4 - 1 - - - TRA - Transmitter/receiver - 2 - 1 - - - BUSY - Bus busy - 1 - 1 - - - MSL - Master/slave - 0 - 1 - - - - - CCR - CCR - Clock control register - 0x1C - 0x20 - read-write - 0x0000 - - - F_S - I2C master mode selection - 15 - 1 - - - DUTY - Fast mode duty cycle - 14 - 1 - - - CCR - Clock control register in Fast/Standard - mode (Master mode) - 0 - 12 - - - - - TRISE - TRISE - TRISE register - 0x20 - 0x20 - read-write - 0x0002 - - - TRISE - Maximum rise time in Fast/Standard mode - (Master mode) - 0 - 6 - - - - - - - I2C2 - 0x40005800 - - I2C2_EV - I2C2 event interrupt - 33 - - - I2C2_ER - I2C2 error interrupt - 34 - - - - I2C1 - 0x40005400 - - I2C1_EV - I2C1 event interrupt - 31 - - - I2C1_ER - I2C1 error interrupt - 32 - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - KR - Key register - 0x0 - 0x20 - write-only - 0x00000000 - - - KEY - Key value (write only, read - 0000h) - 0 - 16 - - - - - PR - PR - Prescaler register - 0x4 - 0x20 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - RLR - Reload register - 0x8 - 0x20 - read-write - 0x00000FFF - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - SR - Status register - 0xC - 0x20 - read-only - 0x00000000 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002C00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - CR - Control register - 0x0 - 0x20 - read-write - 0x7F - - - WDGA - Activation bit - 7 - 1 - - - T - 7-bit counter (MSB to LSB) - 0 - 7 - - - - - CFR - CFR - Configuration register - 0x4 - 0x20 - read-write - 0x7F - - - EWI - Early wakeup interrupt - 9 - 1 - - - WDGTB1 - Timer base - 8 - 1 - - - WDGTB0 - Timer base - 7 - 1 - - - W - 7-bit window value - 0 - 7 - - - - - SR - SR - Status register - 0x8 - 0x20 - read-write - 0x00 - - - EWIF - Early wakeup interrupt - flag - 0 - 1 - - - - - - - RTC - Real-time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC_WKUP - RTC Wakeup interrupt through the EXTI - line - 3 - - - RTC_Alarm - RTC Alarms (A and B) through EXTI line - interrupt - 41 - - - - TR - TR - time register - 0x0 - 0x20 - read-write - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - DR - DR - date register - 0x4 - 0x20 - read-write - 0x00002101 - - - YT - Year tens in BCD format - 20 - 4 - - - YU - Year units in BCD format - 16 - 4 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - CR - CR - control register - 0x8 - 0x20 - read-write - 0x00000000 - - - COE - Calibration output enable - 23 - 1 - - - OSEL - Output selection - 21 - 2 - - - POL - Output polarity - 20 - 1 - - - BKP - Backup - 18 - 1 - - - SUB1H - Subtract 1 hour (winter time - change) - 17 - 1 - - - ADD1H - Add 1 hour (summer time - change) - 16 - 1 - - - TSIE - Time-stamp interrupt - enable - 15 - 1 - - - WUTIE - Wakeup timer interrupt - enable - 14 - 1 - - - ALRBIE - Alarm B interrupt enable - 13 - 1 - - - ALRAIE - Alarm A interrupt enable - 12 - 1 - - - TSE - Time stamp enable - 11 - 1 - - - WUTE - Wakeup timer enable - 10 - 1 - - - ALRBE - Alarm B enable - 9 - 1 - - - ALRAE - Alarm A enable - 8 - 1 - - - DCE - Coarse digital calibration - enable - 7 - 1 - - - FMT - Hour format - 6 - 1 - - - REFCKON - Reference clock detection enable (50 or - 60 Hz) - 4 - 1 - - - TSEDGE - Time-stamp event active - edge - 3 - 1 - - - WCKSEL - Wakeup clock selection - 0 - 3 - - - - - ISR - ISR - initialization and status - register - 0xC - 0x20 - 0x00000007 - - - ALRAWF - Alarm A write flag - 0 - 1 - read-only - - - ALRBWF - Alarm B write flag - 1 - 1 - read-only - - - WUTWF - Wakeup timer write flag - 2 - 1 - read-only - - - SHPF - Shift operation pending - 3 - 1 - read-write - - - INITS - Initialization status flag - 4 - 1 - read-only - - - RSF - Registers synchronization - flag - 5 - 1 - read-write - - - INITF - Initialization flag - 6 - 1 - read-only - - - INIT - Initialization mode - 7 - 1 - read-write - - - ALRAF - Alarm A flag - 8 - 1 - read-write - - - ALRBF - Alarm B flag - 9 - 1 - read-write - - - WUTF - Wakeup timer flag - 10 - 1 - read-write - - - TSF - Time-stamp flag - 11 - 1 - read-write - - - TSOVF - Time-stamp overflow flag - 12 - 1 - read-write - - - TAMP1F - Tamper detection flag - 13 - 1 - read-write - - - TAMP2F - TAMPER2 detection flag - 14 - 1 - read-write - - - RECALPF - Recalibration pending Flag - 16 - 1 - read-only - - - - - PRER - PRER - prescaler register - 0x10 - 0x20 - read-write - 0x007F00FF - - - PREDIV_A - Asynchronous prescaler - factor - 16 - 7 - - - PREDIV_S - Synchronous prescaler - factor - 0 - 15 - - - - - WUTR - WUTR - wakeup timer register - 0x14 - 0x20 - read-write - 0x0000FFFF - - - WUT - Wakeup auto-reload value - bits - 0 - 16 - - - - - CALIBR - CALIBR - calibration register - 0x18 - 0x20 - read-write - 0x00000000 - - - DCS - Digital calibration sign - 7 - 1 - - - DC - Digital calibration - 0 - 5 - - - - - ALRMAR - ALRMAR - alarm A register - 0x1C - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm A date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm A hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm A minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm A seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - ALRMBR - ALRMBR - alarm B register - 0x20 - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm B date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm B hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm B minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm B seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - WPR - WPR - write protection register - 0x24 - 0x20 - write-only - 0x00000000 - - - KEY - Write protection key - 0 - 8 - - - - - SSR - SSR - sub second register - 0x28 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - SHIFTR - SHIFTR - shift control register - 0x2C - 0x20 - write-only - 0x00000000 - - - ADD1S - Add one second - 31 - 1 - - - SUBFS - Subtract a fraction of a - second - 0 - 15 - - - - - TSTR - TSTR - time stamp time register - 0x30 - 0x20 - read-only - 0x00000000 - - - ALARMOUTTYPE - AFO_ALARM output type - 18 - 1 - - - TSINSEL - TIMESTAMP mapping - 17 - 1 - - - TAMP1INSEL - TAMPER1 mapping - 16 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for tamper 1 - 1 - 1 - - - TAMP1E - Tamper 1 detection enable - 0 - 1 - - - - - TSDR - TSDR - time stamp date register - 0x34 - 0x20 - read-only - 0x00000000 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - TSSSR - TSSSR - timestamp sub second register - 0x38 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - CALR - CALR - calibration register - 0x3C - 0x20 - read-write - 0x00000000 - - - CALP - Increase frequency of RTC by 488.5 - ppm - 15 - 1 - - - CALW8 - Use an 8-second calibration cycle - period - 14 - 1 - - - CALW16 - Use a 16-second calibration cycle - period - 13 - 1 - - - CALM - Calibration minus - 0 - 9 - - - - - TAFCR - TAFCR - tamper and alternate function configuration - register - 0x40 - 0x20 - read-write - 0x00000000 - - - ALARMOUTTYPE - AFO_ALARM output type - 18 - 1 - - - TSINSEL - TIMESTAMP mapping - 17 - 1 - - - TAMP1INSEL - TAMPER1 mapping - 16 - 1 - - - TAMPPUDIS - TAMPER pull-up disable - 15 - 1 - - - TAMPPRCH - Tamper precharge duration - 13 - 2 - - - TAMPFLT - Tamper filter count - 11 - 2 - - - TAMPFREQ - Tamper sampling frequency - 8 - 3 - - - TAMPTS - Activate timestamp on tamper detection - event - 7 - 1 - - - TAMP2TRG - Active level for tamper 2 - 4 - 1 - - - TAMP2E - Tamper 2 detection enable - 3 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for tamper 1 - 1 - 1 - - - TAMP1E - Tamper 1 detection enable - 0 - 1 - - - - - ALRMASSR - ALRMASSR - alarm A sub second register - 0x44 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - ALRMBSSR - ALRMBSSR - alarm B sub second register - 0x48 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - BKP0R - BKP0R - backup register - 0x50 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP1R - BKP1R - backup register - 0x54 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP2R - BKP2R - backup register - 0x58 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP3R - BKP3R - backup register - 0x5C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP4R - BKP4R - backup register - 0x60 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP5R - BKP5R - backup register - 0x64 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP6R - BKP6R - backup register - 0x68 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP7R - BKP7R - backup register - 0x6C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP8R - BKP8R - backup register - 0x70 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP9R - BKP9R - backup register - 0x74 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP10R - BKP10R - backup register - 0x78 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP11R - BKP11R - backup register - 0x7C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP12R - BKP12R - backup register - 0x80 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP13R - BKP13R - backup register - 0x84 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP14R - BKP14R - backup register - 0x88 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP15R - BKP15R - backup register - 0x8C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP16R - BKP16R - backup register - 0x90 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP17R - BKP17R - backup register - 0x94 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP18R - BKP18R - backup register - 0x98 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP19R - BKP19R - backup register - 0x9C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - - - UART4 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40004C00 - - 0x0 - 0x400 - registers - - - UART4 - UART4 global interrupt - 52 - - - - SR - SR - Status register - 0x0 - 0x20 - 0x00C00000 - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - TC - Transmission complete - 6 - 1 - read-write - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - NF - Noise detected flag - 2 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - PE - Parity error - 0 - 1 - read-only - - - - - DR - DR - Data register - 0x4 - 0x20 - read-write - 0x00000000 - - - DR - Data value - 0 - 9 - - - - - BRR - BRR - Baud rate register - 0x8 - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - CR1 - CR1 - Control register 1 - 0xC - 0x20 - read-write - 0x0000 - - - OVER8 - Oversampling mode - 15 - 1 - - - UE - USART enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - SBK - Send break - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x10 - 0x20 - read-write - 0x0000 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - lin break detection length - 5 - 1 - - - ADD - Address of the USART node - 0 - 4 - - - - - CR3 - CR3 - Control register 3 - 0x14 - 0x20 - read-write - 0x0000 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - - - UART5 - 0x40005000 - - UART5 - UART5 global interrupt - 53 - - - - UART7 - 0x40007800 - - UART4 - UART4 global interrupt - 52 - - - - UART8 - 0x40007C00 - - UART5 - UART5 global interrupt - 53 - - - - C_ADC - Common ADC registers - ADC - 0x40012300 - - 0x0 - 0x400 - registers - - - - CSR - CSR - ADC Common status register - 0x0 - 0x20 - read-only - 0x00000000 - - - OVR3 - Overrun flag of ADC3 - 21 - 1 - - - STRT3 - Regular channel Start flag of ADC - 3 - 20 - 1 - - - JSTRT3 - Injected channel Start flag of ADC - 3 - 19 - 1 - - - JEOC3 - Injected channel end of conversion of - ADC 3 - 18 - 1 - - - EOC3 - End of conversion of ADC 3 - 17 - 1 - - - AWD3 - Analog watchdog flag of ADC - 3 - 16 - 1 - - - OVR2 - Overrun flag of ADC 2 - 13 - 1 - - - STRT2 - Regular channel Start flag of ADC - 2 - 12 - 1 - - - JSTRT2 - Injected channel Start flag of ADC - 2 - 11 - 1 - - - JEOC2 - Injected channel end of conversion of - ADC 2 - 10 - 1 - - - EOC2 - End of conversion of ADC 2 - 9 - 1 - - - AWD2 - Analog watchdog flag of ADC - 2 - 8 - 1 - - - OVR1 - Overrun flag of ADC 1 - 5 - 1 - - - STRT1 - Regular channel Start flag of ADC - 1 - 4 - 1 - - - JSTRT1 - Injected channel Start flag of ADC - 1 - 3 - 1 - - - JEOC1 - Injected channel end of conversion of - ADC 1 - 2 - 1 - - - EOC1 - End of conversion of ADC 1 - 1 - 1 - - - AWD1 - Analog watchdog flag of ADC - 1 - 0 - 1 - - - - - CCR - CCR - ADC common control register - 0x4 - 0x20 - read-write - 0x00000000 - - - TSVREFE - Temperature sensor and VREFINT - enable - 23 - 1 - - - VBATE - VBAT enable - 22 - 1 - - - ADCPRE - ADC prescaler - 16 - 2 - - - DMA - Direct memory access mode for multi ADC - mode - 14 - 2 - - - DDS - DMA disable selection for multi-ADC - mode - 13 - 1 - - - DELAY - Delay between 2 sampling - phases - 8 - 4 - - - MULT - Multi ADC mode selection - 0 - 5 - - - - - CDR - CDR - ADC common regular data register for dual - and triple modes - 0x8 - 0x20 - read-only - 0x00000000 - - - DATA2 - 2nd data item of a pair of regular - conversions - 16 - 16 - - - DATA1 - 1st data item of a pair of regular - conversions - 0 - 16 - - - - - - - TIM1 - Advanced-timers - TIM - 0x40010000 - - 0x0 - 0x400 - registers - - - TIM1_BRK_TIM9 - TIM1 Break interrupt and TIM9 global - interrupt - 24 - - - TIM1_UP_TIM10 - TIM1 Update interrupt and TIM10 global - interrupt - 25 - - - TIM1_TRG_COM_TIM11 - TIM1 Trigger and Commutation interrupts and - TIM11 global interrupt - 26 - - - TIM1_CC - TIM1 Capture Compare interrupt - 27 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - - - TIM8 - 0x40010400 - - TIM8_BRK_TIM12 - TIM8 Break interrupt and TIM12 global - interrupt - 43 - - - TIM8_UP_TIM13 - TIM8 Update interrupt and TIM13 global - interrupt - 44 - - - TIM8_TRG_COM_TIM14 - TIM8 Trigger and Commutation interrupts and - TIM14 global interrupt - 45 - - - TIM8_CC - TIM8 Capture Compare interrupt - 46 - - - - TIM2 - General purpose timers - TIM - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 28 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - OR - OR - TIM5 option register - 0x50 - 0x20 - read-write - 0x0000 - - - ITR1_RMP - Timer Input 4 remap - 10 - 2 - - - - - - - TIM3 - General purpose timers - TIM - 0x40000400 - - 0x0 - 0x400 - registers - - - TIM3 - TIM3 global interrupt - 29 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM4 - 0x40000800 - - TIM4 - TIM4 global interrupt - 30 - - - - TIM5 - General-purpose-timers - TIM - 0x40000C00 - - 0x0 - 0x400 - registers - - - TIM5 - TIM5 global interrupt - 50 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - OR - OR - TIM5 option register - 0x50 - 0x20 - read-write - 0x0000 - - - IT4_RMP - Timer Input 4 remap - 6 - 2 - - - - - - - TIM9 - General purpose timers - TIM - 0x40014000 - - 0x0 - 0x400 - registers - - - TIM1_BRK_TIM9 - TIM1 Break interrupt and TIM9 global - interrupt - 24 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 3 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 3 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - - - TIM12 - 0x40001800 - - TIM8_BRK_TIM12 - TIM8 Break interrupt and TIM12 global - interrupt - 43 - - - - TIM10 - General-purpose-timers - TIM - 0x40014400 - - 0x0 - 0x400 - registers - - - TIM1_UP_TIM10 - TIM1 Update interrupt and TIM10 global - interrupt - 25 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - - - TIM13 - 0x40001C00 - - TIM8_UP_TIM13 - TIM8 Update interrupt and TIM13 global - interrupt - 44 - - - - TIM14 - 0x40002000 - - TIM8_TRG_COM_TIM14 - TIM8 Trigger and Commutation interrupts and - TIM14 global interrupt - 45 - - - - TIM11 - General-purpose-timers - TIM - 0x40014800 - - 0x0 - 0x400 - registers - - - TIM1_TRG_COM_TIM11 - TIM1 Trigger and Commutation interrupts and - TIM11 global interrupt - 26 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - OR - OR - option register - 0x50 - 0x20 - read-write - 0x00000000 - - - RMP - Input 1 remapping - capability - 0 - 2 - - - - - - - TIM6 - Basic timers - TIM - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt, DAC1 and DAC2 underrun - error interrupt - 54 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 55 - - - - Ethernet_MAC - Ethernet: media access control - (MAC) - Ethernet - 0x40028000 - - 0x0 - 0x61 - registers - - - ETH - Ethernet global interrupt - 61 - - - ETH_WKUP - Ethernet Wakeup through EXTI line - interrupt - 62 - - - - MACCR - MACCR - Ethernet MAC configuration - register - 0x0 - 0x20 - read-write - 0x0008000 - - - RE - RE - 2 - 1 - - - TE - TE - 3 - 1 - - - DC - DC - 4 - 1 - - - BL - BL - 5 - 2 - - - APCS - APCS - 7 - 1 - - - RD - RD - 9 - 1 - - - IPCO - IPCO - 10 - 1 - - - DM - DM - 11 - 1 - - - LM - LM - 12 - 1 - - - ROD - ROD - 13 - 1 - - - FES - FES - 14 - 1 - - - CSD - CSD - 16 - 1 - - - IFG - IFG - 17 - 3 - - - JD - JD - 22 - 1 - - - WD - WD - 23 - 1 - - - CSTF - CSTF - 25 - 1 - - - - - MACFFR - MACFFR - Ethernet MAC frame filter - register - 0x4 - 0x20 - read-write - 0x00000000 - - - PM - PM - 0 - 1 - - - HU - HU - 1 - 1 - - - HM - HM - 2 - 1 - - - DAIF - DAIF - 3 - 1 - - - RAM - RAM - 4 - 1 - - - BFD - BFD - 5 - 1 - - - PCF - PCF - 6 - 1 - - - SAIF - SAIF - 7 - 1 - - - SAF - SAF - 8 - 1 - - - HPF - HPF - 9 - 1 - - - RA - RA - 31 - 1 - - - - - MACHTHR - MACHTHR - Ethernet MAC hash table high - register - 0x8 - 0x20 - read-write - 0x00000000 - - - HTH - HTH - 0 - 32 - - - - - MACHTLR - MACHTLR - Ethernet MAC hash table low - register - 0xC - 0x20 - read-write - 0x00000000 - - - HTL - HTL - 0 - 32 - - - - - MACMIIAR - MACMIIAR - Ethernet MAC MII address - register - 0x10 - 0x20 - read-write - 0x00000000 - - - MB - MB - 0 - 1 - - - MW - MW - 1 - 1 - - - CR - CR - 2 - 3 - - - MR - MR - 6 - 5 - - - PA - PA - 11 - 5 - - - - - MACMIIDR - MACMIIDR - Ethernet MAC MII data register - 0x14 - 0x20 - read-write - 0x00000000 - - - TD - TD - 0 - 16 - - - - - MACFCR - MACFCR - Ethernet MAC flow control - register - 0x18 - 0x20 - read-write - 0x00000000 - - - FCB - FCB - 0 - 1 - - - TFCE - TFCE - 1 - 1 - - - RFCE - RFCE - 2 - 1 - - - UPFD - UPFD - 3 - 1 - - - PLT - PLT - 4 - 2 - - - ZQPD - ZQPD - 7 - 1 - - - PT - PT - 16 - 16 - - - - - MACVLANTR - MACVLANTR - Ethernet MAC VLAN tag register - 0x1C - 0x20 - read-write - 0x00000000 - - - VLANTI - VLANTI - 0 - 16 - - - VLANTC - VLANTC - 16 - 1 - - - - - MACPMTCSR - MACPMTCSR - Ethernet MAC PMT control and status - register - 0x2C - 0x20 - read-write - 0x00000000 - - - PD - PD - 0 - 1 - - - MPE - MPE - 1 - 1 - - - WFE - WFE - 2 - 1 - - - MPR - MPR - 5 - 1 - - - WFR - WFR - 6 - 1 - - - GU - GU - 9 - 1 - - - WFFRPR - WFFRPR - 31 - 1 - - - - - MACDBGR - MACDBGR - Ethernet MAC debug register - 0x34 - 0x20 - read-only - 0x00000000 - - - CR - CR - 0 - 1 - - - CSR - CSR - 1 - 1 - - - ROR - ROR - 2 - 1 - - - MCF - MCF - 3 - 1 - - - MCP - MCP - 4 - 1 - - - MCFHP - MCFHP - 5 - 1 - - - - - MACSR - MACSR - Ethernet MAC interrupt status - register - 0x38 - 0x20 - 0x00000000 - - - PMTS - PMTS - 3 - 1 - read-only - - - MMCS - MMCS - 4 - 1 - read-only - - - MMCRS - MMCRS - 5 - 1 - read-only - - - MMCTS - MMCTS - 6 - 1 - read-only - - - TSTS - TSTS - 9 - 1 - read-write - - - - - MACIMR - MACIMR - Ethernet MAC interrupt mask - register - 0x3C - 0x20 - read-write - 0x00000000 - - - PMTIM - PMTIM - 3 - 1 - - - TSTIM - TSTIM - 9 - 1 - - - - - MACA0HR - MACA0HR - Ethernet MAC address 0 high - register - 0x40 - 0x20 - 0x0010FFFF - - - MACA0H - MAC address0 high - 0 - 16 - read-write - - - MO - Always 1 - 31 - 1 - read-only - - - - - MACA0LR - MACA0LR - Ethernet MAC address 0 low - register - 0x44 - 0x20 - read-write - 0xFFFFFFFF - - - MACA0L - 0 - 0 - 32 - - - - - MACA1HR - MACA1HR - Ethernet MAC address 1 high - register - 0x48 - 0x20 - read-write - 0x0000FFFF - - - MACA1H - MACA1H - 0 - 16 - - - MBC - MBC - 24 - 6 - - - SA - SA - 30 - 1 - - - AE - AE - 31 - 1 - - - - - MACA1LR - MACA1LR - Ethernet MAC address1 low - register - 0x4C - 0x20 - read-write - 0xFFFFFFFF - - - MACA1LR - MACA1LR - 0 - 32 - - - - - MACA2HR - MACA2HR - Ethernet MAC address 2 high - register - 0x50 - 0x20 - read-write - 0x0000FFFF - - - MAC2AH - MAC2AH - 0 - 16 - - - MBC - MBC - 24 - 6 - - - SA - SA - 30 - 1 - - - AE - AE - 31 - 1 - - - - - MACA2LR - MACA2LR - Ethernet MAC address 2 low - register - 0x54 - 0x20 - read-write - 0xFFFFFFFF - - - MACA2L - MACA2L - 0 - 31 - - - - - MACA3HR - MACA3HR - Ethernet MAC address 3 high - register - 0x58 - 0x20 - read-write - 0x0000FFFF - - - MACA3H - MACA3H - 0 - 16 - - - MBC - MBC - 24 - 6 - - - SA - SA - 30 - 1 - - - AE - AE - 31 - 1 - - - - - MACA3LR - MACA3LR - Ethernet MAC address 3 low - register - 0x5C - 0x20 - read-write - 0xFFFFFFFF - - - MBCA3L - MBCA3L - 0 - 32 - - - - - - - Ethernet_MMC - Ethernet: MAC management counters - Ethernet - 0x40028100 - - 0x0 - 0x400 - registers - - - - MMCCR - MMCCR - Ethernet MMC control register - 0x0 - 0x20 - read-write - 0x00000000 - - - CR - CR - 0 - 1 - - - CSR - CSR - 1 - 1 - - - ROR - ROR - 2 - 1 - - - MCF - MCF - 3 - 1 - - - MCP - MCP - 4 - 1 - - - MCFHP - MCFHP - 5 - 1 - - - - - MMCRIR - MMCRIR - Ethernet MMC receive interrupt - register - 0x4 - 0x20 - read-write - 0x00000000 - - - RFCES - RFCES - 5 - 1 - - - RFAES - RFAES - 6 - 1 - - - RGUFS - RGUFS - 17 - 1 - - - - - MMCTIR - MMCTIR - Ethernet MMC transmit interrupt - register - 0x8 - 0x20 - read-only - 0x00000000 - - - TGFSCS - TGFSCS - 14 - 1 - - - TGFMSCS - TGFMSCS - 15 - 1 - - - TGFS - TGFS - 21 - 1 - - - - - MMCRIMR - MMCRIMR - Ethernet MMC receive interrupt mask - register - 0xC - 0x20 - read-write - 0x00000000 - - - RFCEM - RFCEM - 5 - 1 - - - RFAEM - RFAEM - 6 - 1 - - - RGUFM - RGUFM - 17 - 1 - - - - - MMCTIMR - MMCTIMR - Ethernet MMC transmit interrupt mask - register - 0x10 - 0x20 - read-write - 0x00000000 - - - TGFSCM - TGFSCM - 14 - 1 - - - TGFMSCM - TGFMSCM - 15 - 1 - - - TGFM - TGFM - 16 - 1 - - - - - MMCTGFSCCR - MMCTGFSCCR - Ethernet MMC transmitted good frames after a - single collision counter - 0x4C - 0x20 - read-only - 0x00000000 - - - TGFSCC - TGFSCC - 0 - 32 - - - - - MMCTGFMSCCR - MMCTGFMSCCR - Ethernet MMC transmitted good frames after - more than a single collision - 0x50 - 0x20 - read-only - 0x00000000 - - - TGFMSCC - TGFMSCC - 0 - 32 - - - - - MMCTGFCR - MMCTGFCR - Ethernet MMC transmitted good frames counter - register - 0x68 - 0x20 - read-only - 0x00000000 - - - TGFC - HTL - 0 - 32 - - - - - MMCRFCECR - MMCRFCECR - Ethernet MMC received frames with CRC error - counter register - 0x94 - 0x20 - read-only - 0x00000000 - - - RFCFC - RFCFC - 0 - 32 - - - - - MMCRFAECR - MMCRFAECR - Ethernet MMC received frames with alignment - error counter register - 0x98 - 0x20 - read-only - 0x00000000 - - - RFAEC - RFAEC - 0 - 32 - - - - - MMCRGUFCR - MMCRGUFCR - MMC received good unicast frames counter - register - 0xC4 - 0x20 - read-only - 0x00000000 - - - RGUFC - RGUFC - 0 - 32 - - - - - - - Ethernet_PTP - Ethernet: Precision time protocol - Ethernet - 0x40028700 - - 0x0 - 0x400 - registers - - - - PTPTSCR - PTPTSCR - Ethernet PTP time stamp control - register - 0x0 - 0x20 - read-write - 0x00002000 - - - TSE - TSE - 0 - 1 - - - TSFCU - TSFCU - 1 - 1 - - - TSPTPPSV2E - TSPTPPSV2E - 10 - 1 - - - TSSPTPOEFE - TSSPTPOEFE - 11 - 1 - - - TSSIPV6FE - TSSIPV6FE - 12 - 1 - - - TSSIPV4FE - TSSIPV4FE - 13 - 1 - - - TSSEME - TSSEME - 14 - 1 - - - TSSMRME - TSSMRME - 15 - 1 - - - TSCNT - TSCNT - 16 - 2 - - - TSPFFMAE - TSPFFMAE - 18 - 1 - - - TSSTI - TSSTI - 2 - 1 - - - TSSTU - TSSTU - 3 - 1 - - - TSITE - TSITE - 4 - 1 - - - TTSARU - TTSARU - 5 - 1 - - - TSSARFE - TSSARFE - 8 - 1 - - - TSSSR - TSSSR - 9 - 1 - - - - - PTPSSIR - PTPSSIR - Ethernet PTP subsecond increment - register - 0x4 - 0x20 - read-write - 0x00000000 - - - STSSI - STSSI - 0 - 8 - - - - - PTPTSHR - PTPTSHR - Ethernet PTP time stamp high - register - 0x8 - 0x20 - read-only - 0x00000000 - - - STS - STS - 0 - 32 - - - - - PTPTSLR - PTPTSLR - Ethernet PTP time stamp low - register - 0xC - 0x20 - read-only - 0x00000000 - - - STSS - STSS - 0 - 31 - - - STPNS - STPNS - 31 - 1 - - - - - PTPTSHUR - PTPTSHUR - Ethernet PTP time stamp high update - register - 0x10 - 0x20 - read-write - 0x00000000 - - - TSUS - TSUS - 0 - 32 - - - - - PTPTSLUR - PTPTSLUR - Ethernet PTP time stamp low update - register - 0x14 - 0x20 - read-write - 0x00000000 - - - TSUSS - TSUSS - 0 - 31 - - - TSUPNS - TSUPNS - 31 - 1 - - - - - PTPTSAR - PTPTSAR - Ethernet PTP time stamp addend - register - 0x18 - 0x20 - read-write - 0x00000000 - - - TSA - TSA - 0 - 32 - - - - - PTPTTHR - PTPTTHR - Ethernet PTP target time high - register - 0x1C - 0x20 - read-write - 0x00000000 - - - TTSH - 0 - 0 - 32 - - - - - PTPTTLR - PTPTTLR - Ethernet PTP target time low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - TTSL - TTSL - 0 - 32 - - - - - PTPTSSR - PTPTSSR - Ethernet PTP time stamp status - register - 0x28 - 0x20 - read-only - 0x00000000 - - - TSSO - TSSO - 0 - 1 - - - TSTTR - TSTTR - 1 - 1 - - - - - PTPPPSCR - PTPPPSCR - Ethernet PTP PPS control - register - 0x2C - 0x20 - read-only - 0x00000000 - - - TSSO - TSSO - 0 - 1 - - - TSTTR - TSTTR - 1 - 1 - - - - - - - Ethernet_DMA - Ethernet: DMA controller operation - Ethernet - 0x40029000 - - 0x0 - 0x400 - registers - - - - DMABMR - DMABMR - Ethernet DMA bus mode register - 0x0 - 0x20 - read-write - 0x00002101 - - - SR - SR - 0 - 1 - - - DA - DA - 1 - 1 - - - DSL - DSL - 2 - 5 - - - EDFE - EDFE - 7 - 1 - - - PBL - PBL - 8 - 6 - - - RTPR - RTPR - 14 - 2 - - - FB - FB - 16 - 1 - - - RDP - RDP - 17 - 6 - - - USP - USP - 23 - 1 - - - FPM - FPM - 24 - 1 - - - AAB - AAB - 25 - 1 - - - MB - MB - 26 - 1 - - - - - DMATPDR - DMATPDR - Ethernet DMA transmit poll demand - register - 0x4 - 0x20 - read-write - 0x00000000 - - - TPD - TPD - 0 - 32 - - - - - DMARPDR - DMARPDR - EHERNET DMA receive poll demand - register - 0x8 - 0x20 - read-write - 0x00000000 - - - RPD - RPD - 0 - 32 - - - - - DMARDLAR - DMARDLAR - Ethernet DMA receive descriptor list address - register - 0xC - 0x20 - read-write - 0x00000000 - - - SRL - SRL - 0 - 32 - - - - - DMATDLAR - DMATDLAR - Ethernet DMA transmit descriptor list - address register - 0x10 - 0x20 - read-write - 0x00000000 - - - STL - STL - 0 - 32 - - - - - DMASR - DMASR - Ethernet DMA status register - 0x14 - 0x20 - 0x00000000 - - - TS - TS - 0 - 1 - read-write - - - TPSS - TPSS - 1 - 1 - read-write - - - TBUS - TBUS - 2 - 1 - read-write - - - TJTS - TJTS - 3 - 1 - read-write - - - ROS - ROS - 4 - 1 - read-write - - - TUS - TUS - 5 - 1 - read-write - - - RS - RS - 6 - 1 - read-write - - - RBUS - RBUS - 7 - 1 - read-write - - - RPSS - RPSS - 8 - 1 - read-write - - - PWTS - PWTS - 9 - 1 - read-write - - - ETS - ETS - 10 - 1 - read-write - - - FBES - FBES - 13 - 1 - read-write - - - ERS - ERS - 14 - 1 - read-write - - - AIS - AIS - 15 - 1 - read-write - - - NIS - NIS - 16 - 1 - read-write - - - RPS - RPS - 17 - 3 - read-only - - - TPS - TPS - 20 - 3 - read-only - - - EBS - EBS - 23 - 3 - read-only - - - MMCS - MMCS - 27 - 1 - read-only - - - PMTS - PMTS - 28 - 1 - read-only - - - TSTS - TSTS - 29 - 1 - read-only - - - - - DMAOMR - DMAOMR - Ethernet DMA operation mode - register - 0x18 - 0x20 - read-write - 0x00000000 - - - SR - SR - 1 - 1 - - - OSF - OSF - 2 - 1 - - - RTC - RTC - 3 - 2 - - - FUGF - FUGF - 6 - 1 - - - FEF - FEF - 7 - 1 - - - ST - ST - 13 - 1 - - - TTC - TTC - 14 - 3 - - - FTF - FTF - 20 - 1 - - - TSF - TSF - 21 - 1 - - - DFRF - DFRF - 24 - 1 - - - RSF - RSF - 25 - 1 - - - DTCEFD - DTCEFD - 26 - 1 - - - - - DMAIER - DMAIER - Ethernet DMA interrupt enable - register - 0x1C - 0x20 - read-write - 0x00000000 - - - TIE - TIE - 0 - 1 - - - TPSIE - TPSIE - 1 - 1 - - - TBUIE - TBUIE - 2 - 1 - - - TJTIE - TJTIE - 3 - 1 - - - ROIE - ROIE - 4 - 1 - - - TUIE - TUIE - 5 - 1 - - - RIE - RIE - 6 - 1 - - - RBUIE - RBUIE - 7 - 1 - - - RPSIE - RPSIE - 8 - 1 - - - RWTIE - RWTIE - 9 - 1 - - - ETIE - ETIE - 10 - 1 - - - FBEIE - FBEIE - 13 - 1 - - - ERIE - ERIE - 14 - 1 - - - AISE - AISE - 15 - 1 - - - NISE - NISE - 16 - 1 - - - - - DMAMFBOCR - DMAMFBOCR - Ethernet DMA missed frame and buffer - overflow counter register - 0x20 - 0x20 - read-write - 0x00000000 - - - MFC - MFC - 0 - 16 - - - OMFC - OMFC - 16 - 1 - - - MFA - MFA - 17 - 11 - - - OFOC - OFOC - 28 - 1 - - - - - DMARSWTR - DMARSWTR - Ethernet DMA receive status watchdog timer - register - 0x24 - 0x20 - read-write - 0x00000000 - - - RSWTC - RSWTC - 0 - 8 - - - - - DMACHTDR - DMACHTDR - Ethernet DMA current host transmit - descriptor register - 0x48 - 0x20 - read-only - 0x00000000 - - - HTDAP - HTDAP - 0 - 32 - - - - - DMACHRDR - DMACHRDR - Ethernet DMA current host receive descriptor - register - 0x4C - 0x20 - read-only - 0x00000000 - - - HRDAP - HRDAP - 0 - 32 - - - - - DMACHTBAR - DMACHTBAR - Ethernet DMA current host transmit buffer - address register - 0x50 - 0x20 - read-only - 0x00000000 - - - HTBAP - HTBAP - 0 - 32 - - - - - DMACHRBAR - DMACHRBAR - Ethernet DMA current host receive buffer - address register - 0x54 - 0x20 - read-only - 0x00000000 - - - HRBAP - HRBAP - 0 - 32 - - - - - - - CRC - Cryptographic processor - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - DR - Data register - 0x0 - 0x20 - read-write - 0xFFFFFFFF - - - DR - Data Register - 0 - 32 - - - - - IDR - IDR - Independent Data register - 0x4 - 0x20 - read-write - 0x00000000 - - - IDR - Independent Data register - 0 - 8 - - - - - CR - CR - Control register - 0x8 - 0x20 - write-only - 0x00000000 - - - CR - Control regidter - 0 - 1 - - - - - - - OTG_FS_GLOBAL - USB on the go full speed - USB_OTG_FS - 0x50000000 - - 0x0 - 0x400 - registers - - - OTG_FS_WKUP - USB On-The-Go FS Wakeup through EXTI line - interrupt - 42 - - - OTG_FS - USB On The Go FS global - interrupt - 67 - - - - FS_GOTGCTL - FS_GOTGCTL - OTG_FS control and status register - (OTG_FS_GOTGCTL) - 0x0 - 0x20 - 0x00000800 - - - SRQSCS - Session request success - 0 - 1 - read-only - - - SRQ - Session request - 1 - 1 - read-write - - - HNGSCS - Host negotiation success - 8 - 1 - read-only - - - HNPRQ - HNP request - 9 - 1 - read-write - - - HSHNPEN - Host set HNP enable - 10 - 1 - read-write - - - DHNPEN - Device HNP enabled - 11 - 1 - read-write - - - CIDSTS - Connector ID status - 16 - 1 - read-only - - - DBCT - Long/short debounce time - 17 - 1 - read-only - - - ASVLD - A-session valid - 18 - 1 - read-only - - - BSVLD - B-session valid - 19 - 1 - read-only - - - - - FS_GOTGINT - FS_GOTGINT - OTG_FS interrupt register - (OTG_FS_GOTGINT) - 0x4 - 0x20 - read-write - 0x00000000 - - - SEDET - Session end detected - 2 - 1 - - - SRSSCHG - Session request success status - change - 8 - 1 - - - HNSSCHG - Host negotiation success status - change - 9 - 1 - - - HNGDET - Host negotiation detected - 17 - 1 - - - ADTOCHG - A-device timeout change - 18 - 1 - - - DBCDNE - Debounce done - 19 - 1 - - - - - FS_GAHBCFG - FS_GAHBCFG - OTG_FS AHB configuration register - (OTG_FS_GAHBCFG) - 0x8 - 0x20 - read-write - 0x00000000 - - - GINT - Global interrupt mask - 0 - 1 - - - TXFELVL - TxFIFO empty level - 7 - 1 - - - PTXFELVL - Periodic TxFIFO empty - level - 8 - 1 - - - - - FS_GUSBCFG - FS_GUSBCFG - OTG_FS USB configuration register - (OTG_FS_GUSBCFG) - 0xC - 0x20 - 0x00000A00 - - - TOCAL - FS timeout calibration - 0 - 3 - read-write - - - PHYSEL - Full Speed serial transceiver - select - 6 - 1 - write-only - - - SRPCAP - SRP-capable - 8 - 1 - read-write - - - HNPCAP - HNP-capable - 9 - 1 - read-write - - - TRDT - USB turnaround time - 10 - 4 - read-write - - - FHMOD - Force host mode - 29 - 1 - read-write - - - FDMOD - Force device mode - 30 - 1 - read-write - - - CTXPKT - Corrupt Tx packet - 31 - 1 - read-write - - - - - FS_GRSTCTL - FS_GRSTCTL - OTG_FS reset register - (OTG_FS_GRSTCTL) - 0x10 - 0x20 - 0x20000000 - - - CSRST - Core soft reset - 0 - 1 - read-write - - - HSRST - HCLK soft reset - 1 - 1 - read-write - - - FCRST - Host frame counter reset - 2 - 1 - read-write - - - RXFFLSH - RxFIFO flush - 4 - 1 - read-write - - - TXFFLSH - TxFIFO flush - 5 - 1 - read-write - - - TXFNUM - TxFIFO number - 6 - 5 - read-write - - - AHBIDL - AHB master idle - 31 - 1 - read-only - - - - - FS_GINTSTS - FS_GINTSTS - OTG_FS core interrupt register - (OTG_FS_GINTSTS) - 0x14 - 0x20 - 0x04000020 - - - CMOD - Current mode of operation - 0 - 1 - read-only - - - MMIS - Mode mismatch interrupt - 1 - 1 - read-write - - - OTGINT - OTG interrupt - 2 - 1 - read-only - - - SOF - Start of frame - 3 - 1 - read-write - - - RXFLVL - RxFIFO non-empty - 4 - 1 - read-only - - - NPTXFE - Non-periodic TxFIFO empty - 5 - 1 - read-only - - - GINAKEFF - Global IN non-periodic NAK - effective - 6 - 1 - read-only - - - GOUTNAKEFF - Global OUT NAK effective - 7 - 1 - read-only - - - ESUSP - Early suspend - 10 - 1 - read-write - - - USBSUSP - USB suspend - 11 - 1 - read-write - - - USBRST - USB reset - 12 - 1 - read-write - - - ENUMDNE - Enumeration done - 13 - 1 - read-write - - - ISOODRP - Isochronous OUT packet dropped - interrupt - 14 - 1 - read-write - - - EOPF - End of periodic frame - interrupt - 15 - 1 - read-write - - - IEPINT - IN endpoint interrupt - 18 - 1 - read-only - - - OEPINT - OUT endpoint interrupt - 19 - 1 - read-only - - - IISOIXFR - Incomplete isochronous IN - transfer - 20 - 1 - read-write - - - IPXFR_INCOMPISOOUT - Incomplete periodic transfer(Host - mode)/Incomplete isochronous OUT transfer(Device - mode) - 21 - 1 - read-write - - - HPRTINT - Host port interrupt - 24 - 1 - read-only - - - HCINT - Host channels interrupt - 25 - 1 - read-only - - - PTXFE - Periodic TxFIFO empty - 26 - 1 - read-only - - - CIDSCHG - Connector ID status change - 28 - 1 - read-write - - - DISCINT - Disconnect detected - interrupt - 29 - 1 - read-write - - - SRQINT - Session request/new session detected - interrupt - 30 - 1 - read-write - - - WKUPINT - Resume/remote wakeup detected - interrupt - 31 - 1 - read-write - - - - - FS_GINTMSK - FS_GINTMSK - OTG_FS interrupt mask register - (OTG_FS_GINTMSK) - 0x18 - 0x20 - 0x00000000 - - - MMISM - Mode mismatch interrupt - mask - 1 - 1 - read-write - - - OTGINT - OTG interrupt mask - 2 - 1 - read-write - - - SOFM - Start of frame mask - 3 - 1 - read-write - - - RXFLVLM - Receive FIFO non-empty - mask - 4 - 1 - read-write - - - NPTXFEM - Non-periodic TxFIFO empty - mask - 5 - 1 - read-write - - - GINAKEFFM - Global non-periodic IN NAK effective - mask - 6 - 1 - read-write - - - GONAKEFFM - Global OUT NAK effective - mask - 7 - 1 - read-write - - - ESUSPM - Early suspend mask - 10 - 1 - read-write - - - USBSUSPM - USB suspend mask - 11 - 1 - read-write - - - USBRST - USB reset mask - 12 - 1 - read-write - - - ENUMDNEM - Enumeration done mask - 13 - 1 - read-write - - - ISOODRPM - Isochronous OUT packet dropped interrupt - mask - 14 - 1 - read-write - - - EOPFM - End of periodic frame interrupt - mask - 15 - 1 - read-write - - - EPMISM - Endpoint mismatch interrupt - mask - 17 - 1 - read-write - - - IEPINT - IN endpoints interrupt - mask - 18 - 1 - read-write - - - OEPINT - OUT endpoints interrupt - mask - 19 - 1 - read-write - - - IISOIXFRM - Incomplete isochronous IN transfer - mask - 20 - 1 - read-write - - - IPXFRM_IISOOXFRM - Incomplete periodic transfer mask(Host - mode)/Incomplete isochronous OUT transfer mask(Device - mode) - 21 - 1 - read-write - - - PRTIM - Host port interrupt mask - 24 - 1 - read-only - - - HCIM - Host channels interrupt - mask - 25 - 1 - read-write - - - PTXFEM - Periodic TxFIFO empty mask - 26 - 1 - read-write - - - CIDSCHGM - Connector ID status change - mask - 28 - 1 - read-write - - - DISCINT - Disconnect detected interrupt - mask - 29 - 1 - read-write - - - SRQIM - Session request/new session detected - interrupt mask - 30 - 1 - read-write - - - WUIM - Resume/remote wakeup detected interrupt - mask - 31 - 1 - read-write - - - - - FS_GRXSTSR_Device - FS_GRXSTSR_Device - OTG_FS Receive status debug read(Device - mode) - 0x1C - 0x20 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXSTSR_Host - FS_GRXSTSR_Host - OTG_FS Receive status debug read(Host - mode) - FS_GRXSTSR_Device - 0x1C - 0x20 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXFSIZ - FS_GRXFSIZ - OTG_FS Receive FIFO size register - (OTG_FS_GRXFSIZ) - 0x24 - 0x20 - read-write - 0x00000200 - - - RXFD - RxFIFO depth - 0 - 16 - - - - - FS_GNPTXFSIZ_Device - FS_GNPTXFSIZ_Device - OTG_FS non-periodic transmit FIFO size - register (Device mode) - 0x28 - 0x20 - read-write - 0x00000200 - - - TX0FSA - Endpoint 0 transmit RAM start - address - 0 - 16 - - - TX0FD - Endpoint 0 TxFIFO depth - 16 - 16 - - - - - FS_GNPTXFSIZ_Host - FS_GNPTXFSIZ_Host - OTG_FS non-periodic transmit FIFO size - register (Host mode) - FS_GNPTXFSIZ_Device - 0x28 - 0x20 - read-write - 0x00000200 - - - NPTXFSA - Non-periodic transmit RAM start - address - 0 - 16 - - - NPTXFD - Non-periodic TxFIFO depth - 16 - 16 - - - - - FS_GNPTXSTS - FS_GNPTXSTS - OTG_FS non-periodic transmit FIFO/queue - status register (OTG_FS_GNPTXSTS) - 0x2C - 0x20 - read-only - 0x00080200 - - - NPTXFSAV - Non-periodic TxFIFO space - available - 0 - 16 - - - NPTQXSAV - Non-periodic transmit request queue - space available - 16 - 8 - - - NPTXQTOP - Top of the non-periodic transmit request - queue - 24 - 7 - - - - - FS_GCCFG - FS_GCCFG - OTG_FS general core configuration register - (OTG_FS_GCCFG) - 0x38 - 0x20 - read-write - 0x00000000 - - - PWRDWN - Power down - 16 - 1 - - - VBUSASEN - Enable the VBUS sensing - device - 18 - 1 - - - VBUSBSEN - Enable the VBUS sensing - device - 19 - 1 - - - SOFOUTEN - SOF output enable - 20 - 1 - - - - - FS_CID - FS_CID - core ID register - 0x3C - 0x20 - read-write - 0x00001000 - - - PRODUCT_ID - Product ID field - 0 - 32 - - - - - FS_HPTXFSIZ - FS_HPTXFSIZ - OTG_FS Host periodic transmit FIFO size - register (OTG_FS_HPTXFSIZ) - 0x100 - 0x20 - read-write - 0x02000600 - - - PTXSA - Host periodic TxFIFO start - address - 0 - 16 - - - PTXFSIZ - Host periodic TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF1 - FS_DIEPTXF1 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF2) - 0x104 - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO2 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF2 - FS_DIEPTXF2 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF3) - 0x108 - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO3 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF3 - FS_DIEPTXF3 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF4) - 0x10C - 0x20 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO4 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - - - OTG_FS_HOST - USB on the go full speed - USB_OTG_FS - 0x50000400 - - 0x0 - 0x400 - registers - - - - FS_HCFG - FS_HCFG - OTG_FS host configuration register - (OTG_FS_HCFG) - 0x0 - 0x20 - 0x00000000 - - - FSLSPCS - FS/LS PHY clock select - 0 - 2 - read-write - - - FSLSS - FS- and LS-only support - 2 - 1 - read-only - - - - - HFIR - HFIR - OTG_FS Host frame interval - register - 0x4 - 0x20 - read-write - 0x0000EA60 - - - FRIVL - Frame interval - 0 - 16 - - - - - FS_HFNUM - FS_HFNUM - OTG_FS host frame number/frame time - remaining register (OTG_FS_HFNUM) - 0x8 - 0x20 - read-only - 0x00003FFF - - - FRNUM - Frame number - 0 - 16 - - - FTREM - Frame time remaining - 16 - 16 - - - - - FS_HPTXSTS - FS_HPTXSTS - OTG_FS_Host periodic transmit FIFO/queue - status register (OTG_FS_HPTXSTS) - 0x10 - 0x20 - 0x00080100 - - - PTXFSAVL - Periodic transmit data FIFO space - available - 0 - 16 - read-write - - - PTXQSAV - Periodic transmit request queue space - available - 16 - 8 - read-only - - - PTXQTOP - Top of the periodic transmit request - queue - 24 - 8 - read-only - - - - - HAINT - HAINT - OTG_FS Host all channels interrupt - register - 0x14 - 0x20 - read-only - 0x00000000 - - - HAINT - Channel interrupts - 0 - 16 - - - - - HAINTMSK - HAINTMSK - OTG_FS host all channels interrupt mask - register - 0x18 - 0x20 - read-write - 0x00000000 - - - HAINTM - Channel interrupt mask - 0 - 16 - - - - - FS_HPRT - FS_HPRT - OTG_FS host port control and status register - (OTG_FS_HPRT) - 0x40 - 0x20 - 0x00000000 - - - PCSTS - Port connect status - 0 - 1 - read-only - - - PCDET - Port connect detected - 1 - 1 - read-write - - - PENA - Port enable - 2 - 1 - read-write - - - PENCHNG - Port enable/disable change - 3 - 1 - read-write - - - POCA - Port overcurrent active - 4 - 1 - read-only - - - POCCHNG - Port overcurrent change - 5 - 1 - read-write - - - PRES - Port resume - 6 - 1 - read-write - - - PSUSP - Port suspend - 7 - 1 - read-write - - - PRST - Port reset - 8 - 1 - read-write - - - PLSTS - Port line status - 10 - 2 - read-only - - - PPWR - Port power - 12 - 1 - read-write - - - PTCTL - Port test control - 13 - 4 - read-write - - - PSPD - Port speed - 17 - 2 - read-only - - - - - FS_HCCHAR0 - FS_HCCHAR0 - OTG_FS host channel-0 characteristics - register (OTG_FS_HCCHAR0) - 0x100 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR1 - FS_HCCHAR1 - OTG_FS host channel-1 characteristics - register (OTG_FS_HCCHAR1) - 0x120 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR2 - FS_HCCHAR2 - OTG_FS host channel-2 characteristics - register (OTG_FS_HCCHAR2) - 0x140 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR3 - FS_HCCHAR3 - OTG_FS host channel-3 characteristics - register (OTG_FS_HCCHAR3) - 0x160 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR4 - FS_HCCHAR4 - OTG_FS host channel-4 characteristics - register (OTG_FS_HCCHAR4) - 0x180 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR5 - FS_HCCHAR5 - OTG_FS host channel-5 characteristics - register (OTG_FS_HCCHAR5) - 0x1A0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR6 - FS_HCCHAR6 - OTG_FS host channel-6 characteristics - register (OTG_FS_HCCHAR6) - 0x1C0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR7 - FS_HCCHAR7 - OTG_FS host channel-7 characteristics - register (OTG_FS_HCCHAR7) - 0x1E0 - 0x20 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCINT0 - FS_HCINT0 - OTG_FS host channel-0 interrupt register - (OTG_FS_HCINT0) - 0x108 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT1 - FS_HCINT1 - OTG_FS host channel-1 interrupt register - (OTG_FS_HCINT1) - 0x128 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT2 - FS_HCINT2 - OTG_FS host channel-2 interrupt register - (OTG_FS_HCINT2) - 0x148 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT3 - FS_HCINT3 - OTG_FS host channel-3 interrupt register - (OTG_FS_HCINT3) - 0x168 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT4 - FS_HCINT4 - OTG_FS host channel-4 interrupt register - (OTG_FS_HCINT4) - 0x188 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT5 - FS_HCINT5 - OTG_FS host channel-5 interrupt register - (OTG_FS_HCINT5) - 0x1A8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT6 - FS_HCINT6 - OTG_FS host channel-6 interrupt register - (OTG_FS_HCINT6) - 0x1C8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT7 - FS_HCINT7 - OTG_FS host channel-7 interrupt register - (OTG_FS_HCINT7) - 0x1E8 - 0x20 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINTMSK0 - FS_HCINTMSK0 - OTG_FS host channel-0 mask register - (OTG_FS_HCINTMSK0) - 0x10C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK1 - FS_HCINTMSK1 - OTG_FS host channel-1 mask register - (OTG_FS_HCINTMSK1) - 0x12C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK2 - FS_HCINTMSK2 - OTG_FS host channel-2 mask register - (OTG_FS_HCINTMSK2) - 0x14C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK3 - FS_HCINTMSK3 - OTG_FS host channel-3 mask register - (OTG_FS_HCINTMSK3) - 0x16C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK4 - FS_HCINTMSK4 - OTG_FS host channel-4 mask register - (OTG_FS_HCINTMSK4) - 0x18C - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK5 - FS_HCINTMSK5 - OTG_FS host channel-5 mask register - (OTG_FS_HCINTMSK5) - 0x1AC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK6 - FS_HCINTMSK6 - OTG_FS host channel-6 mask register - (OTG_FS_HCINTMSK6) - 0x1CC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK7 - FS_HCINTMSK7 - OTG_FS host channel-7 mask register - (OTG_FS_HCINTMSK7) - 0x1EC - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCTSIZ0 - FS_HCTSIZ0 - OTG_FS host channel-0 transfer size - register - 0x110 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ1 - FS_HCTSIZ1 - OTG_FS host channel-1 transfer size - register - 0x130 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ2 - FS_HCTSIZ2 - OTG_FS host channel-2 transfer size - register - 0x150 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ3 - FS_HCTSIZ3 - OTG_FS host channel-3 transfer size - register - 0x170 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ4 - FS_HCTSIZ4 - OTG_FS host channel-x transfer size - register - 0x190 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ5 - FS_HCTSIZ5 - OTG_FS host channel-5 transfer size - register - 0x1B0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ6 - FS_HCTSIZ6 - OTG_FS host channel-6 transfer size - register - 0x1D0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ7 - FS_HCTSIZ7 - OTG_FS host channel-7 transfer size - register - 0x1F0 - 0x20 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - - - OTG_FS_DEVICE - USB on the go full speed - USB_OTG_FS - 0x50000800 - - 0x0 - 0x400 - registers - - - - FS_DCFG - FS_DCFG - OTG_FS device configuration register - (OTG_FS_DCFG) - 0x0 - 0x20 - read-write - 0x02200000 - - - DSPD - Device speed - 0 - 2 - - - NZLSOHSK - Non-zero-length status OUT - handshake - 2 - 1 - - - DAD - Device address - 4 - 7 - - - PFIVL - Periodic frame interval - 11 - 2 - - - - - FS_DCTL - FS_DCTL - OTG_FS device control register - (OTG_FS_DCTL) - 0x4 - 0x20 - 0x00000000 - - - RWUSIG - Remote wakeup signaling - 0 - 1 - read-write - - - SDIS - Soft disconnect - 1 - 1 - read-write - - - GINSTS - Global IN NAK status - 2 - 1 - read-only - - - GONSTS - Global OUT NAK status - 3 - 1 - read-only - - - TCTL - Test control - 4 - 3 - read-write - - - SGINAK - Set global IN NAK - 7 - 1 - read-write - - - CGINAK - Clear global IN NAK - 8 - 1 - read-write - - - SGONAK - Set global OUT NAK - 9 - 1 - read-write - - - CGONAK - Clear global OUT NAK - 10 - 1 - read-write - - - POPRGDNE - Power-on programming done - 11 - 1 - read-write - - - - - FS_DSTS - FS_DSTS - OTG_FS device status register - (OTG_FS_DSTS) - 0x8 - 0x20 - read-only - 0x00000010 - - - SUSPSTS - Suspend status - 0 - 1 - - - ENUMSPD - Enumerated speed - 1 - 2 - - - EERR - Erratic error - 3 - 1 - - - FNSOF - Frame number of the received - SOF - 8 - 14 - - - - - FS_DIEPMSK - FS_DIEPMSK - OTG_FS device IN endpoint common interrupt - mask register (OTG_FS_DIEPMSK) - 0x10 - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (Non-isochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - - - FS_DOEPMSK - FS_DOEPMSK - OTG_FS device OUT endpoint common interrupt - mask register (OTG_FS_DOEPMSK) - 0x14 - 0x20 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - STUPM - SETUP phase done mask - 3 - 1 - - - OTEPDM - OUT token received when endpoint - disabled mask - 4 - 1 - - - - - FS_DAINT - FS_DAINT - OTG_FS device all endpoints interrupt - register (OTG_FS_DAINT) - 0x18 - 0x20 - read-only - 0x00000000 - - - IEPINT - IN endpoint interrupt bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - FS_DAINTMSK - FS_DAINTMSK - OTG_FS all endpoints interrupt mask register - (OTG_FS_DAINTMSK) - 0x1C - 0x20 - read-write - 0x00000000 - - - IEPM - IN EP interrupt mask bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - DVBUSDIS - DVBUSDIS - OTG_FS device VBUS discharge time - register - 0x28 - 0x20 - read-write - 0x000017D7 - - - VBUSDT - Device VBUS discharge time - 0 - 16 - - - - - DVBUSPULSE - DVBUSPULSE - OTG_FS device VBUS pulsing time - register - 0x2C - 0x20 - read-write - 0x000005B8 - - - DVBUSP - Device VBUS pulsing time - 0 - 12 - - - - - DIEPEMPMSK - DIEPEMPMSK - OTG_FS device IN endpoint FIFO empty - interrupt mask register - 0x34 - 0x20 - read-write - 0x00000000 - - - INEPTXFEM - IN EP Tx FIFO empty interrupt mask - bits - 0 - 16 - - - - - FS_DIEPCTL0 - FS_DIEPCTL0 - OTG_FS device control IN endpoint 0 control - register (OTG_FS_DIEPCTL0) - 0x100 - 0x20 - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 2 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-only - - - STALL - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-only - - - EPENA - Endpoint enable - 31 - 1 - read-only - - - - - DIEPCTL1 - DIEPCTL1 - OTG device endpoint-1 control - register - 0x120 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM_SD1PID - SODDFRM/SD1PID - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL2 - DIEPCTL2 - OTG device endpoint-2 control - register - 0x140 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL3 - DIEPCTL3 - OTG device endpoint-3 control - register - 0x160 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL0 - DOEPCTL0 - device endpoint-0 control - register - 0x300 - 0x20 - 0x00008000 - - - EPENA - EPENA - 31 - 1 - write-only - - - EPDIS - EPDIS - 30 - 1 - read-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-only - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-only - - - MPSIZ - MPSIZ - 0 - 2 - read-only - - - - - DOEPCTL1 - DOEPCTL1 - device endpoint-1 control - register - 0x320 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL2 - DOEPCTL2 - device endpoint-2 control - register - 0x340 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL3 - DOEPCTL3 - device endpoint-3 control - register - 0x360 - 0x20 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPINT0 - DIEPINT0 - device endpoint-x interrupt - register - 0x108 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT1 - DIEPINT1 - device endpoint-1 interrupt - register - 0x128 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT2 - DIEPINT2 - device endpoint-2 interrupt - register - 0x148 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT3 - DIEPINT3 - device endpoint-3 interrupt - register - 0x168 - 0x20 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DOEPINT0 - DOEPINT0 - device endpoint-0 interrupt - register - 0x308 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT1 - DOEPINT1 - device endpoint-1 interrupt - register - 0x328 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT2 - DOEPINT2 - device endpoint-2 interrupt - register - 0x348 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT3 - DOEPINT3 - device endpoint-3 interrupt - register - 0x368 - 0x20 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DIEPTSIZ0 - DIEPTSIZ0 - device endpoint-0 transfer size - register - 0x110 - 0x20 - read-write - 0x00000000 - - - PKTCNT - Packet count - 19 - 2 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DOEPTSIZ0 - DOEPTSIZ0 - device OUT endpoint-0 transfer size - register - 0x310 - 0x20 - read-write - 0x00000000 - - - STUPCNT - SETUP packet count - 29 - 2 - - - PKTCNT - Packet count - 19 - 1 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DIEPTSIZ1 - DIEPTSIZ1 - device endpoint-1 transfer size - register - 0x130 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ2 - DIEPTSIZ2 - device endpoint-2 transfer size - register - 0x150 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ3 - DIEPTSIZ3 - device endpoint-3 transfer size - register - 0x170 - 0x20 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DTXFSTS0 - DTXFSTS0 - OTG_FS device IN endpoint transmit FIFO - status register - 0x118 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS1 - DTXFSTS1 - OTG_FS device IN endpoint transmit FIFO - status register - 0x138 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS2 - DTXFSTS2 - OTG_FS device IN endpoint transmit FIFO - status register - 0x158 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS3 - DTXFSTS3 - OTG_FS device IN endpoint transmit FIFO - status register - 0x178 - 0x20 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DOEPTSIZ1 - DOEPTSIZ1 - device OUT endpoint-1 transfer size - register - 0x330 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ2 - DOEPTSIZ2 - device OUT endpoint-2 transfer size - register - 0x350 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ3 - DOEPTSIZ3 - device OUT endpoint-3 transfer size - register - 0x370 - 0x20 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - - - OTG_FS_PWRCLK - USB on the go full speed - USB_OTG_FS - 0x50000E00 - - 0x0 - 0x400 - registers - - - - FS_PCGCCTL - FS_PCGCCTL - OTG_FS power and clock gating control - register - 0x0 - 0x20 - read-write - 0x00000000 - - - STPPCLK - Stop PHY clock - 0 - 1 - - - GATEHCLK - Gate HCLK - 1 - 1 - - - PHYSUSP - PHY Suspended - 4 - 1 - - - - - - - CAN1 - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - CAN1_TX - CAN1 TX interrupts - 19 - - - CAN1_RX0 - CAN1 RX0 interrupts - 20 - - - CAN1_RX1 - CAN1 RX1 interrupts - 21 - - - CAN1_SCE - CAN1 SCE interrupt - 22 - - - - MCR - MCR - master control register - 0x0 - 0x20 - read-write - 0x00010002 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - MSR - MSR - master status register - 0x4 - 0x20 - 0x00000C02 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - TSR - TSR - transmit status register - 0x8 - 0x20 - 0x1C000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - RF0R - RF0R - receive FIFO 0 register - 0xC - 0x20 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - RF1R - RF1R - receive FIFO 1 register - 0x10 - 0x20 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - IER - IER - interrupt enable register - 0x14 - 0x20 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - ESR - ESR - interrupt enable register - 0x18 - 0x20 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - BTR - BTR - bit timing register - 0x1C - 0x20 - read-write - 0x00000000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - TI0R - TI0R - TX mailbox identifier register - 0x180 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT0R - TDT0R - mailbox data length control and time stamp - register - 0x184 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL0R - TDL0R - mailbox data low register - 0x188 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH0R - TDH0R - mailbox data high register - 0x18C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI1R - TI1R - mailbox identifier register - 0x190 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT1R - TDT1R - mailbox data length control and time stamp - register - 0x194 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL1R - TDL1R - mailbox data low register - 0x198 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH1R - TDH1R - mailbox data high register - 0x19C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI2R - TI2R - mailbox identifier register - 0x1A0 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT2R - TDT2R - mailbox data length control and time stamp - register - 0x1A4 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL2R - TDL2R - mailbox data low register - 0x1A8 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH2R - TDH2R - mailbox data high register - 0x1AC - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI0R - RI0R - receive FIFO mailbox identifier - register - 0x1B0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT0R - RDT0R - mailbox data high register - 0x1B4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL0R - RDL0R - mailbox data high register - 0x1B8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH0R - RDH0R - receive FIFO mailbox data high - register - 0x1BC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI1R - RI1R - mailbox data high register - 0x1C0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT1R - RDT1R - mailbox data high register - 0x1C4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL1R - RDL1R - mailbox data high register - 0x1C8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH1R - RDH1R - mailbox data high register - 0x1CC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - FMR - FMR - filter master register - 0x200 - 0x20 - read-write - 0x2A1C0E01 - - - CAN2SB - CAN2SB - 8 - 6 - - - FINIT - FINIT - 0 - 1 - - - - - FM1R - FM1R - filter mode register - 0x204 - 0x20 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - FBM14 - Filter mode - 14 - 1 - - - FBM15 - Filter mode - 15 - 1 - - - FBM16 - Filter mode - 16 - 1 - - - FBM17 - Filter mode - 17 - 1 - - - FBM18 - Filter mode - 18 - 1 - - - FBM19 - Filter mode - 19 - 1 - - - FBM20 - Filter mode - 20 - 1 - - - FBM21 - Filter mode - 21 - 1 - - - FBM22 - Filter mode - 22 - 1 - - - FBM23 - Filter mode - 23 - 1 - - - FBM24 - Filter mode - 24 - 1 - - - FBM25 - Filter mode - 25 - 1 - - - FBM26 - Filter mode - 26 - 1 - - - FBM27 - Filter mode - 27 - 1 - - - - - FS1R - FS1R - filter scale register - 0x20C - 0x20 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - FSC14 - Filter scale configuration - 14 - 1 - - - FSC15 - Filter scale configuration - 15 - 1 - - - FSC16 - Filter scale configuration - 16 - 1 - - - FSC17 - Filter scale configuration - 17 - 1 - - - FSC18 - Filter scale configuration - 18 - 1 - - - FSC19 - Filter scale configuration - 19 - 1 - - - FSC20 - Filter scale configuration - 20 - 1 - - - FSC21 - Filter scale configuration - 21 - 1 - - - FSC22 - Filter scale configuration - 22 - 1 - - - FSC23 - Filter scale configuration - 23 - 1 - - - FSC24 - Filter scale configuration - 24 - 1 - - - FSC25 - Filter scale configuration - 25 - 1 - - - FSC26 - Filter scale configuration - 26 - 1 - - - FSC27 - Filter scale configuration - 27 - 1 - - - - - FFA1R - FFA1R - filter FIFO assignment - register - 0x214 - 0x20 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - FFA14 - Filter FIFO assignment for filter - 14 - 14 - 1 - - - FFA15 - Filter FIFO assignment for filter - 15 - 15 - 1 - - - FFA16 - Filter FIFO assignment for filter - 16 - 16 - 1 - - - FFA17 - Filter FIFO assignment for filter - 17 - 17 - 1 - - - FFA18 - Filter FIFO assignment for filter - 18 - 18 - 1 - - - FFA19 - Filter FIFO assignment for filter - 19 - 19 - 1 - - - FFA20 - Filter FIFO assignment for filter - 20 - 20 - 1 - - - FFA21 - Filter FIFO assignment for filter - 21 - 21 - 1 - - - FFA22 - Filter FIFO assignment for filter - 22 - 22 - 1 - - - FFA23 - Filter FIFO assignment for filter - 23 - 23 - 1 - - - FFA24 - Filter FIFO assignment for filter - 24 - 24 - 1 - - - FFA25 - Filter FIFO assignment for filter - 25 - 25 - 1 - - - FFA26 - Filter FIFO assignment for filter - 26 - 26 - 1 - - - FFA27 - Filter FIFO assignment for filter - 27 - 27 - 1 - - - - - FA1R - FA1R - filter activation register - 0x21C - 0x20 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - FACT14 - Filter active - 14 - 1 - - - FACT15 - Filter active - 15 - 1 - - - FACT16 - Filter active - 16 - 1 - - - FACT17 - Filter active - 17 - 1 - - - FACT18 - Filter active - 18 - 1 - - - FACT19 - Filter active - 19 - 1 - - - FACT20 - Filter active - 20 - 1 - - - FACT21 - Filter active - 21 - 1 - - - FACT22 - Filter active - 22 - 1 - - - FACT23 - Filter active - 23 - 1 - - - FACT24 - Filter active - 24 - 1 - - - FACT25 - Filter active - 25 - 1 - - - FACT26 - Filter active - 26 - 1 - - - FACT27 - Filter active - 27 - 1 - - - - - F0R1 - F0R1 - Filter bank 0 register 1 - 0x240 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - F0R2 - Filter bank 0 register 2 - 0x244 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - F1R1 - Filter bank 1 register 1 - 0x248 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - F1R2 - Filter bank 1 register 2 - 0x24C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - F2R1 - Filter bank 2 register 1 - 0x250 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - F2R2 - Filter bank 2 register 2 - 0x254 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - F3R1 - Filter bank 3 register 1 - 0x258 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - F3R2 - Filter bank 3 register 2 - 0x25C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - F4R1 - Filter bank 4 register 1 - 0x260 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - F4R2 - Filter bank 4 register 2 - 0x264 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - F5R1 - Filter bank 5 register 1 - 0x268 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - F5R2 - Filter bank 5 register 2 - 0x26C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - F6R1 - Filter bank 6 register 1 - 0x270 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - F6R2 - Filter bank 6 register 2 - 0x274 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - F7R1 - Filter bank 7 register 1 - 0x278 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - F7R2 - Filter bank 7 register 2 - 0x27C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - F8R1 - Filter bank 8 register 1 - 0x280 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - F8R2 - Filter bank 8 register 2 - 0x284 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - F9R1 - Filter bank 9 register 1 - 0x288 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - F9R2 - Filter bank 9 register 2 - 0x28C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - F10R1 - Filter bank 10 register 1 - 0x290 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - F10R2 - Filter bank 10 register 2 - 0x294 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - F11R1 - Filter bank 11 register 1 - 0x298 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - F11R2 - Filter bank 11 register 2 - 0x29C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - F12R1 - Filter bank 4 register 1 - 0x2A0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - F12R2 - Filter bank 12 register 2 - 0x2A4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - F13R1 - Filter bank 13 register 1 - 0x2A8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - F13R2 - Filter bank 13 register 2 - 0x2AC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R1 - F14R1 - Filter bank 14 register 1 - 0x2B0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R2 - F14R2 - Filter bank 14 register 2 - 0x2B4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R1 - F15R1 - Filter bank 15 register 1 - 0x2B8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R2 - F15R2 - Filter bank 15 register 2 - 0x2BC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R1 - F16R1 - Filter bank 16 register 1 - 0x2C0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R2 - F16R2 - Filter bank 16 register 2 - 0x2C4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R1 - F17R1 - Filter bank 17 register 1 - 0x2C8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R2 - F17R2 - Filter bank 17 register 2 - 0x2CC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R1 - F18R1 - Filter bank 18 register 1 - 0x2D0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R2 - F18R2 - Filter bank 18 register 2 - 0x2D4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R1 - F19R1 - Filter bank 19 register 1 - 0x2D8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R2 - F19R2 - Filter bank 19 register 2 - 0x2DC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R1 - F20R1 - Filter bank 20 register 1 - 0x2E0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R2 - F20R2 - Filter bank 20 register 2 - 0x2E4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R1 - F21R1 - Filter bank 21 register 1 - 0x2E8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R2 - F21R2 - Filter bank 21 register 2 - 0x2EC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R1 - F22R1 - Filter bank 22 register 1 - 0x2F0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R2 - F22R2 - Filter bank 22 register 2 - 0x2F4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R1 - F23R1 - Filter bank 23 register 1 - 0x2F8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R2 - F23R2 - Filter bank 23 register 2 - 0x2FC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R1 - F24R1 - Filter bank 24 register 1 - 0x300 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R2 - F24R2 - Filter bank 24 register 2 - 0x304 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R1 - F25R1 - Filter bank 25 register 1 - 0x308 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R2 - F25R2 - Filter bank 25 register 2 - 0x30C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R1 - F26R1 - Filter bank 26 register 1 - 0x310 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R2 - F26R2 - Filter bank 26 register 2 - 0x314 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R1 - F27R1 - Filter bank 27 register 1 - 0x318 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R2 - F27R2 - Filter bank 27 register 2 - 0x31C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - CAN2 - 0x40006800 - - CAN2_TX - CAN2 TX interrupts - 63 - - - CAN2_RX0 - CAN2 RX0 interrupts - 64 - - - CAN2_RX1 - CAN2 RX1 interrupts - 65 - - - CAN2_SCE - CAN2 SCE interrupt - 66 - - - - FLASH - FLASH - FLASH - 0x40023C00 - - 0x0 - 0x400 - registers - - - - ACR - ACR - Flash access control register - 0x0 - 0x20 - 0x00000000 - - - LATENCY - Latency - 0 - 3 - read-write - - - PRFTEN - Prefetch enable - 8 - 1 - read-write - - - ICEN - Instruction cache enable - 9 - 1 - read-write - - - DCEN - Data cache enable - 10 - 1 - read-write - - - ICRST - Instruction cache reset - 11 - 1 - write-only - - - DCRST - Data cache reset - 12 - 1 - read-write - - - - - KEYR - KEYR - Flash key register - 0x4 - 0x20 - write-only - 0x00000000 - - - KEY - FPEC key - 0 - 32 - - - - - OPTKEYR - OPTKEYR - Flash option key register - 0x8 - 0x20 - write-only - 0x00000000 - - - OPTKEY - Option byte key - 0 - 32 - - - - - SR - SR - Status register - 0xC - 0x20 - 0x00000000 - - - EOP - End of operation - 0 - 1 - read-write - - - OPERR - Operation error - 1 - 1 - read-write - - - WRPERR - Write protection error - 4 - 1 - read-write - - - PGAERR - Programming alignment - error - 5 - 1 - read-write - - - PGPERR - Programming parallelism - error - 6 - 1 - read-write - - - PGSERR - Programming sequence error - 7 - 1 - read-write - - - BSY - Busy - 16 - 1 - read-only - - - - - CR - CR - Control register - 0x10 - 0x20 - read-write - 0x80000000 - - - PG - Programming - 0 - 1 - - - SER - Sector Erase - 1 - 1 - - - MER - Mass Erase - 2 - 1 - - - SNB - Sector number - 3 - 4 - - - PSIZE - Program size - 8 - 2 - - - STRT - Start - 16 - 1 - - - EOPIE - End of operation interrupt - enable - 24 - 1 - - - ERRIE - Error interrupt enable - 25 - 1 - - - LOCK - Lock - 31 - 1 - - - - - OPTCR - OPTCR - Flash option control register - 0x14 - 0x20 - read-write - 0x00000014 - - - OPTLOCK - Option lock - 0 - 1 - - - OPTSTRT - Option start - 1 - 1 - - - BOR_LEV - BOR reset Level - 2 - 2 - - - WDG_SW - WDG_SW User option bytes - 5 - 1 - - - nRST_STOP - nRST_STOP User option - bytes - 6 - 1 - - - nRST_STDBY - nRST_STDBY User option - bytes - 7 - 1 - - - RDP - Read protect - 8 - 8 - - - nWRP - Not write protect - 16 - 12 - - - - - - - EXTI - External interrupt/event - controller - EXTI - 0x40013C00 - - 0x0 - 0x400 - registers - - - TAMP_STAMP - Tamper and TimeStamp interrupts through the - EXTI line - 2 - - - EXTI0 - EXTI Line0 interrupt - 6 - - - EXTI1 - EXTI Line1 interrupt - 7 - - - EXTI2 - EXTI Line2 interrupt - 8 - - - EXTI3 - EXTI Line3 interrupt - 9 - - - EXTI4 - EXTI Line4 interrupt - 10 - - - EXTI9_5 - EXTI Line[9:5] interrupts - 23 - - - EXTI9_5 - EXTI Line[9:5] interrupts - 23 - - - EXTI15_10 - EXTI Line[15:10] interrupts - 40 - - - - IMR - IMR - Interrupt mask register - (EXTI_IMR) - 0x0 - 0x20 - read-write - 0x00000000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - MR19 - Interrupt Mask on line 19 - 19 - 1 - - - MR20 - Interrupt Mask on line 20 - 20 - 1 - - - MR21 - Interrupt Mask on line 21 - 21 - 1 - - - MR22 - Interrupt Mask on line 22 - 22 - 1 - - - - - EMR - EMR - Event mask register (EXTI_EMR) - 0x4 - 0x20 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - MR19 - Event Mask on line 19 - 19 - 1 - - - MR20 - Event Mask on line 20 - 20 - 1 - - - MR21 - Event Mask on line 21 - 21 - 1 - - - MR22 - Event Mask on line 22 - 22 - 1 - - - - - RTSR - RTSR - Rising Trigger selection register - (EXTI_RTSR) - 0x8 - 0x20 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Rising trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Rising trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Rising trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Rising trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Rising trigger event configuration of - line 22 - 22 - 1 - - - - - FTSR - FTSR - Falling Trigger selection register - (EXTI_FTSR) - 0xC - 0x20 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Falling trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Falling trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Falling trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Falling trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Falling trigger event configuration of - line 22 - 22 - 1 - - - - - SWIER - SWIER - Software interrupt event register - (EXTI_SWIER) - 0x10 - 0x20 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER18 - Software Interrupt on line - 18 - 18 - 1 - - - SWIER19 - Software Interrupt on line - 19 - 19 - 1 - - - SWIER20 - Software Interrupt on line - 20 - 20 - 1 - - - SWIER21 - Software Interrupt on line - 21 - 21 - 1 - - - SWIER22 - Software Interrupt on line - 22 - 22 - 1 - - - - - PR - PR - Pending register (EXTI_PR) - 0x14 - 0x20 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR18 - Pending bit 18 - 18 - 1 - - - PR19 - Pending bit 19 - 19 - 1 - - - PR20 - Pending bit 20 - 20 - 1 - - - PR21 - Pending bit 21 - 21 - 1 - - - PR22 - Pending bit 22 - 22 - 1 - - - - - - - OTG_HS_GLOBAL - USB on the go high speed - USB_OTG_HS - 0x40040000 - - 0x0 - 0x131 - registers - - - OTG_HS_EP1_OUT - USB On The Go HS End Point 1 Out global - interrupt - 74 - - - OTG_HS_EP1_IN - USB On The Go HS End Point 1 In global - interrupt - 75 - - - OTG_HS_WKUP - USB On The Go HS Wakeup through EXTI - interrupt - 76 - - - OTG_HS - USB On The Go HS global - interrupt - 77 - - - - OTG_HS_GOTGCTL - OTG_HS_GOTGCTL - OTG_HS control and status - register - 0x0 - 32 - 0x00000800 - - - SRQSCS - Session request success - 0 - 1 - read-only - - - SRQ - Session request - 1 - 1 - read-write - - - HNGSCS - Host negotiation success - 8 - 1 - read-only - - - HNPRQ - HNP request - 9 - 1 - read-write - - - HSHNPEN - Host set HNP enable - 10 - 1 - read-write - - - DHNPEN - Device HNP enabled - 11 - 1 - read-write - - - CIDSTS - Connector ID status - 16 - 1 - read-only - - - DBCT - Long/short debounce time - 17 - 1 - read-only - - - ASVLD - A-session valid - 18 - 1 - read-only - - - BSVLD - B-session valid - 19 - 1 - read-only - - - - - OTG_HS_GOTGINT - OTG_HS_GOTGINT - OTG_HS interrupt register - 0x4 - 32 - read-write - 0x0 - - - SEDET - Session end detected - 2 - 1 - - - SRSSCHG - Session request success status - change - 8 - 1 - - - HNSSCHG - Host negotiation success status - change - 9 - 1 - - - HNGDET - Host negotiation detected - 17 - 1 - - - ADTOCHG - A-device timeout change - 18 - 1 - - - DBCDNE - Debounce done - 19 - 1 - - - - - OTG_HS_GAHBCFG - OTG_HS_GAHBCFG - OTG_HS AHB configuration - register - 0x8 - 32 - read-write - 0x0 - - - GINT - Global interrupt mask - 0 - 1 - - - HBSTLEN - Burst length/type - 1 - 4 - - - DMAEN - DMA enable - 5 - 1 - - - TXFELVL - TxFIFO empty level - 7 - 1 - - - PTXFELVL - Periodic TxFIFO empty - level - 8 - 1 - - - - - OTG_HS_GUSBCFG - OTG_HS_GUSBCFG - OTG_HS USB configuration - register - 0xC - 32 - 0x00000A00 - - - TOCAL - FS timeout calibration - 0 - 3 - read-write - - - PHYSEL - USB 2.0 high-speed ULPI PHY or USB 1.1 - full-speed serial transceiver select - 6 - 1 - write-only - - - SRPCAP - SRP-capable - 8 - 1 - read-write - - - HNPCAP - HNP-capable - 9 - 1 - read-write - - - TRDT - USB turnaround time - 10 - 4 - read-write - - - PHYLPCS - PHY Low-power clock select - 15 - 1 - read-write - - - ULPIFSLS - ULPI FS/LS select - 17 - 1 - read-write - - - ULPIAR - ULPI Auto-resume - 18 - 1 - read-write - - - ULPICSM - ULPI Clock SuspendM - 19 - 1 - read-write - - - ULPIEVBUSD - ULPI External VBUS Drive - 20 - 1 - read-write - - - ULPIEVBUSI - ULPI external VBUS - indicator - 21 - 1 - read-write - - - TSDPS - TermSel DLine pulsing - selection - 22 - 1 - read-write - - - PCCI - Indicator complement - 23 - 1 - read-write - - - PTCI - Indicator pass through - 24 - 1 - read-write - - - ULPIIPD - ULPI interface protect - disable - 25 - 1 - read-write - - - FHMOD - Forced host mode - 29 - 1 - read-write - - - FDMOD - Forced peripheral mode - 30 - 1 - read-write - - - CTXPKT - Corrupt Tx packet - 31 - 1 - read-write - - - - - OTG_HS_GRSTCTL - OTG_HS_GRSTCTL - OTG_HS reset register - 0x10 - 32 - 0x20000000 - - - CSRST - Core soft reset - 0 - 1 - read-write - - - HSRST - HCLK soft reset - 1 - 1 - read-write - - - FCRST - Host frame counter reset - 2 - 1 - read-write - - - RXFFLSH - RxFIFO flush - 4 - 1 - read-write - - - TXFFLSH - TxFIFO flush - 5 - 1 - read-write - - - TXFNUM - TxFIFO number - 6 - 5 - read-write - - - DMAREQ - DMA request signal - 30 - 1 - read-only - - - AHBIDL - AHB master idle - 31 - 1 - read-only - - - - - OTG_HS_GINTSTS - OTG_HS_GINTSTS - OTG_HS core interrupt register - 0x14 - 32 - 0x04000020 - - - CMOD - Current mode of operation - 0 - 1 - read-only - - - MMIS - Mode mismatch interrupt - 1 - 1 - read-write - - - OTGINT - OTG interrupt - 2 - 1 - read-only - - - SOF - Start of frame - 3 - 1 - read-write - - - RXFLVL - RxFIFO nonempty - 4 - 1 - read-only - - - NPTXFE - Nonperiodic TxFIFO empty - 5 - 1 - read-only - - - GINAKEFF - Global IN nonperiodic NAK - effective - 6 - 1 - read-only - - - BOUTNAKEFF - Global OUT NAK effective - 7 - 1 - read-only - - - ESUSP - Early suspend - 10 - 1 - read-write - - - USBSUSP - USB suspend - 11 - 1 - read-write - - - USBRST - USB reset - 12 - 1 - read-write - - - ENUMDNE - Enumeration done - 13 - 1 - read-write - - - ISOODRP - Isochronous OUT packet dropped - interrupt - 14 - 1 - read-write - - - EOPF - End of periodic frame - interrupt - 15 - 1 - read-write - - - IEPINT - IN endpoint interrupt - 18 - 1 - read-only - - - OEPINT - OUT endpoint interrupt - 19 - 1 - read-only - - - IISOIXFR - Incomplete isochronous IN - transfer - 20 - 1 - read-write - - - PXFR_INCOMPISOOUT - Incomplete periodic - transfer - 21 - 1 - read-write - - - DATAFSUSP - Data fetch suspended - 22 - 1 - read-write - - - HPRTINT - Host port interrupt - 24 - 1 - read-only - - - HCINT - Host channels interrupt - 25 - 1 - read-only - - - PTXFE - Periodic TxFIFO empty - 26 - 1 - read-only - - - CIDSCHG - Connector ID status change - 28 - 1 - read-write - - - DISCINT - Disconnect detected - interrupt - 29 - 1 - read-write - - - SRQINT - Session request/new session detected - interrupt - 30 - 1 - read-write - - - WKUINT - Resume/remote wakeup detected - interrupt - 31 - 1 - read-write - - - - - OTG_HS_GINTMSK - OTG_HS_GINTMSK - OTG_HS interrupt mask register - 0x18 - 32 - 0x0 - - - MMISM - Mode mismatch interrupt - mask - 1 - 1 - read-write - - - OTGINT - OTG interrupt mask - 2 - 1 - read-write - - - SOFM - Start of frame mask - 3 - 1 - read-write - - - RXFLVLM - Receive FIFO nonempty mask - 4 - 1 - read-write - - - NPTXFEM - Nonperiodic TxFIFO empty - mask - 5 - 1 - read-write - - - GINAKEFFM - Global nonperiodic IN NAK effective - mask - 6 - 1 - read-write - - - GONAKEFFM - Global OUT NAK effective - mask - 7 - 1 - read-write - - - ESUSPM - Early suspend mask - 10 - 1 - read-write - - - USBSUSPM - USB suspend mask - 11 - 1 - read-write - - - USBRST - USB reset mask - 12 - 1 - read-write - - - ENUMDNEM - Enumeration done mask - 13 - 1 - read-write - - - ISOODRPM - Isochronous OUT packet dropped interrupt - mask - 14 - 1 - read-write - - - EOPFM - End of periodic frame interrupt - mask - 15 - 1 - read-write - - - EPMISM - Endpoint mismatch interrupt - mask - 17 - 1 - read-write - - - IEPINT - IN endpoints interrupt - mask - 18 - 1 - read-write - - - OEPINT - OUT endpoints interrupt - mask - 19 - 1 - read-write - - - IISOIXFRM - Incomplete isochronous IN transfer - mask - 20 - 1 - read-write - - - PXFRM_IISOOXFRM - Incomplete periodic transfer - mask - 21 - 1 - read-write - - - FSUSPM - Data fetch suspended mask - 22 - 1 - read-write - - - PRTIM - Host port interrupt mask - 24 - 1 - read-only - - - HCIM - Host channels interrupt - mask - 25 - 1 - read-write - - - PTXFEM - Periodic TxFIFO empty mask - 26 - 1 - read-write - - - CIDSCHGM - Connector ID status change - mask - 28 - 1 - read-write - - - DISCINT - Disconnect detected interrupt - mask - 29 - 1 - read-write - - - SRQIM - Session request/new session detected - interrupt mask - 30 - 1 - read-write - - - WUIM - Resume/remote wakeup detected interrupt - mask - 31 - 1 - read-write - - - - - OTG_HS_GRXSTSR_Host - OTG_HS_GRXSTSR_Host - OTG_HS Receive status debug read register - (host mode) - 0x1C - 32 - read-only - 0x0 - - - CHNUM - Channel number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - - - OTG_HS_GRXSTSP_Host - OTG_HS_GRXSTSP_Host - OTG_HS status read and pop register (host - mode) - 0x20 - 32 - read-only - 0x0 - - - CHNUM - Channel number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - - - OTG_HS_GRXFSIZ - OTG_HS_GRXFSIZ - OTG_HS Receive FIFO size - register - 0x24 - 32 - read-write - 0x00000200 - - - RXFD - RxFIFO depth - 0 - 16 - - - - - OTG_HS_GNPTXFSIZ_Host - OTG_HS_GNPTXFSIZ_Host - OTG_HS nonperiodic transmit FIFO size - register (host mode) - 0x28 - 32 - read-write - 0x00000200 - - - NPTXFSA - Nonperiodic transmit RAM start - address - 0 - 16 - - - NPTXFD - Nonperiodic TxFIFO depth - 16 - 16 - - - - - OTG_HS_TX0FSIZ_Peripheral - OTG_HS_TX0FSIZ_Peripheral - Endpoint 0 transmit FIFO size (peripheral - mode) - OTG_HS_GNPTXFSIZ_Host - 0x28 - 32 - read-write - 0x00000200 - - - TX0FSA - Endpoint 0 transmit RAM start - address - 0 - 16 - - - TX0FD - Endpoint 0 TxFIFO depth - 16 - 16 - - - - - OTG_HS_GNPTXSTS - OTG_HS_GNPTXSTS - OTG_HS nonperiodic transmit FIFO/queue - status register - 0x2C - 32 - read-only - 0x00080200 - - - NPTXFSAV - Nonperiodic TxFIFO space - available - 0 - 16 - - - NPTQXSAV - Nonperiodic transmit request queue space - available - 16 - 8 - - - NPTXQTOP - Top of the nonperiodic transmit request - queue - 24 - 7 - - - - - OTG_HS_GCCFG - OTG_HS_GCCFG - OTG_HS general core configuration - register - 0x38 - 32 - read-write - 0x0 - - - PWRDWN - Power down - 16 - 1 - - - I2CPADEN - Enable I2C bus connection for the - external I2C PHY interface - 17 - 1 - - - VBUSASEN - Enable the VBUS sensing - device - 18 - 1 - - - VBUSBSEN - Enable the VBUS sensing - device - 19 - 1 - - - SOFOUTEN - SOF output enable - 20 - 1 - - - NOVBUSSENS - VBUS sensing disable - option - 21 - 1 - - - - - OTG_HS_CID - OTG_HS_CID - OTG_HS core ID register - 0x3C - 32 - read-write - 0x00001200 - - - PRODUCT_ID - Product ID field - 0 - 32 - - - - - OTG_HS_HPTXFSIZ - OTG_HS_HPTXFSIZ - OTG_HS Host periodic transmit FIFO size - register - 0x100 - 32 - read-write - 0x02000600 - - - PTXSA - Host periodic TxFIFO start - address - 0 - 16 - - - PTXFD - Host periodic TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF1 - OTG_HS_DIEPTXF1 - OTG_HS device IN endpoint transmit FIFO size - register - 0x104 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF2 - OTG_HS_DIEPTXF2 - OTG_HS device IN endpoint transmit FIFO size - register - 0x108 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF3 - OTG_HS_DIEPTXF3 - OTG_HS device IN endpoint transmit FIFO size - register - 0x11C - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF4 - OTG_HS_DIEPTXF4 - OTG_HS device IN endpoint transmit FIFO size - register - 0x120 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF5 - OTG_HS_DIEPTXF5 - OTG_HS device IN endpoint transmit FIFO size - register - 0x124 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF6 - OTG_HS_DIEPTXF6 - OTG_HS device IN endpoint transmit FIFO size - register - 0x128 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF7 - OTG_HS_DIEPTXF7 - OTG_HS device IN endpoint transmit FIFO size - register - 0x12C - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_GRXSTSR_Peripheral - OTG_HS_GRXSTSR_Peripheral - OTG_HS Receive status debug read register - (peripheral mode mode) - OTG_HS_GRXSTSR_Host - 0x1C - 32 - read-only - 0x0 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - OTG_HS_GRXSTSP_Peripheral - OTG_HS_GRXSTSP_Peripheral - OTG_HS status read and pop register - (peripheral mode) - OTG_HS_GRXSTSP_Host - 0x20 - 32 - read-only - 0x0 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - - - OTG_HS_HOST - USB on the go high speed - USB_OTG_HS - 0x40040400 - - 0x0 - 0x400 - registers - - - - OTG_HS_HCFG - OTG_HS_HCFG - OTG_HS host configuration - register - 0x0 - 32 - 0x0 - - - FSLSPCS - FS/LS PHY clock select - 0 - 2 - read-write - - - FSLSS - FS- and LS-only support - 2 - 1 - read-only - - - - - OTG_HS_HFIR - OTG_HS_HFIR - OTG_HS Host frame interval - register - 0x4 - 32 - read-write - 0x0000EA60 - - - FRIVL - Frame interval - 0 - 16 - - - - - OTG_HS_HFNUM - OTG_HS_HFNUM - OTG_HS host frame number/frame time - remaining register - 0x8 - 32 - read-only - 0x00003FFF - - - FRNUM - Frame number - 0 - 16 - - - FTREM - Frame time remaining - 16 - 16 - - - - - OTG_HS_HPTXSTS - OTG_HS_HPTXSTS - OTG_HS_Host periodic transmit FIFO/queue - status register - 0x10 - 32 - 0x00080100 - - - PTXFSAVL - Periodic transmit data FIFO space - available - 0 - 16 - read-write - - - PTXQSAV - Periodic transmit request queue space - available - 16 - 8 - read-only - - - PTXQTOP - Top of the periodic transmit request - queue - 24 - 8 - read-only - - - - - OTG_HS_HAINT - OTG_HS_HAINT - OTG_HS Host all channels interrupt - register - 0x14 - 32 - read-only - 0x0 - - - HAINT - Channel interrupts - 0 - 16 - - - - - OTG_HS_HAINTMSK - OTG_HS_HAINTMSK - OTG_HS host all channels interrupt mask - register - 0x18 - 32 - read-write - 0x0 - - - HAINTM - Channel interrupt mask - 0 - 16 - - - - - OTG_HS_HPRT - OTG_HS_HPRT - OTG_HS host port control and status - register - 0x40 - 32 - 0x0 - - - PCSTS - Port connect status - 0 - 1 - read-only - - - PCDET - Port connect detected - 1 - 1 - read-write - - - PENA - Port enable - 2 - 1 - read-write - - - PENCHNG - Port enable/disable change - 3 - 1 - read-write - - - POCA - Port overcurrent active - 4 - 1 - read-only - - - POCCHNG - Port overcurrent change - 5 - 1 - read-write - - - PRES - Port resume - 6 - 1 - read-write - - - PSUSP - Port suspend - 7 - 1 - read-write - - - PRST - Port reset - 8 - 1 - read-write - - - PLSTS - Port line status - 10 - 2 - read-only - - - PPWR - Port power - 12 - 1 - read-write - - - PTCTL - Port test control - 13 - 4 - read-write - - - PSPD - Port speed - 17 - 2 - read-only - - - - - OTG_HS_HCCHAR0 - OTG_HS_HCCHAR0 - OTG_HS host channel-0 characteristics - register - 0x100 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR1 - OTG_HS_HCCHAR1 - OTG_HS host channel-1 characteristics - register - 0x120 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR2 - OTG_HS_HCCHAR2 - OTG_HS host channel-2 characteristics - register - 0x140 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR3 - OTG_HS_HCCHAR3 - OTG_HS host channel-3 characteristics - register - 0x160 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR4 - OTG_HS_HCCHAR4 - OTG_HS host channel-4 characteristics - register - 0x180 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR5 - OTG_HS_HCCHAR5 - OTG_HS host channel-5 characteristics - register - 0x1A0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR6 - OTG_HS_HCCHAR6 - OTG_HS host channel-6 characteristics - register - 0x1C0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR7 - OTG_HS_HCCHAR7 - OTG_HS host channel-7 characteristics - register - 0x1E0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR8 - OTG_HS_HCCHAR8 - OTG_HS host channel-8 characteristics - register - 0x200 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR9 - OTG_HS_HCCHAR9 - OTG_HS host channel-9 characteristics - register - 0x220 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR10 - OTG_HS_HCCHAR10 - OTG_HS host channel-10 characteristics - register - 0x240 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR11 - OTG_HS_HCCHAR11 - OTG_HS host channel-11 characteristics - register - 0x260 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCSPLT0 - OTG_HS_HCSPLT0 - OTG_HS host channel-0 split control - register - 0x104 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT1 - OTG_HS_HCSPLT1 - OTG_HS host channel-1 split control - register - 0x124 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT2 - OTG_HS_HCSPLT2 - OTG_HS host channel-2 split control - register - 0x144 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT3 - OTG_HS_HCSPLT3 - OTG_HS host channel-3 split control - register - 0x164 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT4 - OTG_HS_HCSPLT4 - OTG_HS host channel-4 split control - register - 0x184 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT5 - OTG_HS_HCSPLT5 - OTG_HS host channel-5 split control - register - 0x1A4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT6 - OTG_HS_HCSPLT6 - OTG_HS host channel-6 split control - register - 0x1C4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT7 - OTG_HS_HCSPLT7 - OTG_HS host channel-7 split control - register - 0x1E4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT8 - OTG_HS_HCSPLT8 - OTG_HS host channel-8 split control - register - 0x204 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT9 - OTG_HS_HCSPLT9 - OTG_HS host channel-9 split control - register - 0x224 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT10 - OTG_HS_HCSPLT10 - OTG_HS host channel-10 split control - register - 0x244 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT11 - OTG_HS_HCSPLT11 - OTG_HS host channel-11 split control - register - 0x264 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCINT0 - OTG_HS_HCINT0 - OTG_HS host channel-11 interrupt - register - 0x108 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT1 - OTG_HS_HCINT1 - OTG_HS host channel-1 interrupt - register - 0x128 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT2 - OTG_HS_HCINT2 - OTG_HS host channel-2 interrupt - register - 0x148 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT3 - OTG_HS_HCINT3 - OTG_HS host channel-3 interrupt - register - 0x168 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT4 - OTG_HS_HCINT4 - OTG_HS host channel-4 interrupt - register - 0x188 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT5 - OTG_HS_HCINT5 - OTG_HS host channel-5 interrupt - register - 0x1A8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT6 - OTG_HS_HCINT6 - OTG_HS host channel-6 interrupt - register - 0x1C8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT7 - OTG_HS_HCINT7 - OTG_HS host channel-7 interrupt - register - 0x1E8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT8 - OTG_HS_HCINT8 - OTG_HS host channel-8 interrupt - register - 0x208 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT9 - OTG_HS_HCINT9 - OTG_HS host channel-9 interrupt - register - 0x228 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT10 - OTG_HS_HCINT10 - OTG_HS host channel-10 interrupt - register - 0x248 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT11 - OTG_HS_HCINT11 - OTG_HS host channel-11 interrupt - register - 0x268 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINTMSK0 - OTG_HS_HCINTMSK0 - OTG_HS host channel-11 interrupt mask - register - 0x10C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK1 - OTG_HS_HCINTMSK1 - OTG_HS host channel-1 interrupt mask - register - 0x12C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK2 - OTG_HS_HCINTMSK2 - OTG_HS host channel-2 interrupt mask - register - 0x14C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK3 - OTG_HS_HCINTMSK3 - OTG_HS host channel-3 interrupt mask - register - 0x16C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK4 - OTG_HS_HCINTMSK4 - OTG_HS host channel-4 interrupt mask - register - 0x18C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK5 - OTG_HS_HCINTMSK5 - OTG_HS host channel-5 interrupt mask - register - 0x1AC - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK6 - OTG_HS_HCINTMSK6 - OTG_HS host channel-6 interrupt mask - register - 0x1CC - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK7 - OTG_HS_HCINTMSK7 - OTG_HS host channel-7 interrupt mask - register - 0x1EC - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK8 - OTG_HS_HCINTMSK8 - OTG_HS host channel-8 interrupt mask - register - 0x20C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK9 - OTG_HS_HCINTMSK9 - OTG_HS host channel-9 interrupt mask - register - 0x22C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK10 - OTG_HS_HCINTMSK10 - OTG_HS host channel-10 interrupt mask - register - 0x24C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK11 - OTG_HS_HCINTMSK11 - OTG_HS host channel-11 interrupt mask - register - 0x26C - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCTSIZ0 - OTG_HS_HCTSIZ0 - OTG_HS host channel-11 transfer size - register - 0x110 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ1 - OTG_HS_HCTSIZ1 - OTG_HS host channel-1 transfer size - register - 0x130 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ2 - OTG_HS_HCTSIZ2 - OTG_HS host channel-2 transfer size - register - 0x150 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ3 - OTG_HS_HCTSIZ3 - OTG_HS host channel-3 transfer size - register - 0x170 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ4 - OTG_HS_HCTSIZ4 - OTG_HS host channel-4 transfer size - register - 0x190 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ5 - OTG_HS_HCTSIZ5 - OTG_HS host channel-5 transfer size - register - 0x1B0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ6 - OTG_HS_HCTSIZ6 - OTG_HS host channel-6 transfer size - register - 0x1D0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ7 - OTG_HS_HCTSIZ7 - OTG_HS host channel-7 transfer size - register - 0x1F0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ8 - OTG_HS_HCTSIZ8 - OTG_HS host channel-8 transfer size - register - 0x210 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ9 - OTG_HS_HCTSIZ9 - OTG_HS host channel-9 transfer size - register - 0x230 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ10 - OTG_HS_HCTSIZ10 - OTG_HS host channel-10 transfer size - register - 0x250 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ11 - OTG_HS_HCTSIZ11 - OTG_HS host channel-11 transfer size - register - 0x270 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCDMA0 - OTG_HS_HCDMA0 - OTG_HS host channel-0 DMA address - register - 0x114 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA1 - OTG_HS_HCDMA1 - OTG_HS host channel-1 DMA address - register - 0x134 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA2 - OTG_HS_HCDMA2 - OTG_HS host channel-2 DMA address - register - 0x154 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA3 - OTG_HS_HCDMA3 - OTG_HS host channel-3 DMA address - register - 0x174 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA4 - OTG_HS_HCDMA4 - OTG_HS host channel-4 DMA address - register - 0x194 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA5 - OTG_HS_HCDMA5 - OTG_HS host channel-5 DMA address - register - 0x1B4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA6 - OTG_HS_HCDMA6 - OTG_HS host channel-6 DMA address - register - 0x1D4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA7 - OTG_HS_HCDMA7 - OTG_HS host channel-7 DMA address - register - 0x1F4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA8 - OTG_HS_HCDMA8 - OTG_HS host channel-8 DMA address - register - 0x214 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA9 - OTG_HS_HCDMA9 - OTG_HS host channel-9 DMA address - register - 0x234 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA10 - OTG_HS_HCDMA10 - OTG_HS host channel-10 DMA address - register - 0x254 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA11 - OTG_HS_HCDMA11 - OTG_HS host channel-11 DMA address - register - 0x274 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - - - OTG_HS_DEVICE - USB on the go high speed - USB_OTG_HS - 0x40040800 - - 0x0 - 0x400 - registers - - - - OTG_HS_DCFG - OTG_HS_DCFG - OTG_HS device configuration - register - 0x0 - 32 - read-write - 0x02200000 - - - DSPD - Device speed - 0 - 2 - - - NZLSOHSK - Nonzero-length status OUT - handshake - 2 - 1 - - - DAD - Device address - 4 - 7 - - - PFIVL - Periodic (micro)frame - interval - 11 - 2 - - - PERSCHIVL - Periodic scheduling - interval - 24 - 2 - - - - - OTG_HS_DCTL - OTG_HS_DCTL - OTG_HS device control register - 0x4 - 32 - 0x0 - - - RWUSIG - Remote wakeup signaling - 0 - 1 - read-write - - - SDIS - Soft disconnect - 1 - 1 - read-write - - - GINSTS - Global IN NAK status - 2 - 1 - read-only - - - GONSTS - Global OUT NAK status - 3 - 1 - read-only - - - TCTL - Test control - 4 - 3 - read-write - - - SGINAK - Set global IN NAK - 7 - 1 - write-only - - - CGINAK - Clear global IN NAK - 8 - 1 - write-only - - - SGONAK - Set global OUT NAK - 9 - 1 - write-only - - - CGONAK - Clear global OUT NAK - 10 - 1 - write-only - - - POPRGDNE - Power-on programming done - 11 - 1 - read-write - - - - - OTG_HS_DSTS - OTG_HS_DSTS - OTG_HS device status register - 0x8 - 32 - read-only - 0x00000010 - - - SUSPSTS - Suspend status - 0 - 1 - - - ENUMSPD - Enumerated speed - 1 - 2 - - - EERR - Erratic error - 3 - 1 - - - FNSOF - Frame number of the received - SOF - 8 - 14 - - - - - OTG_HS_DIEPMSK - OTG_HS_DIEPMSK - OTG_HS device IN endpoint common interrupt - mask register - 0x10 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (nonisochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - FIFO underrun mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - - - OTG_HS_DOEPMSK - OTG_HS_DOEPMSK - OTG_HS device OUT endpoint common interrupt - mask register - 0x14 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - STUPM - SETUP phase done mask - 3 - 1 - - - OTEPDM - OUT token received when endpoint - disabled mask - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets received - mask - 6 - 1 - - - OPEM - OUT packet error mask - 8 - 1 - - - BOIM - BNA interrupt mask - 9 - 1 - - - - - OTG_HS_DAINT - OTG_HS_DAINT - OTG_HS device all endpoints interrupt - register - 0x18 - 32 - read-only - 0x0 - - - IEPINT - IN endpoint interrupt bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - OTG_HS_DAINTMSK - OTG_HS_DAINTMSK - OTG_HS all endpoints interrupt mask - register - 0x1C - 32 - read-write - 0x0 - - - IEPM - IN EP interrupt mask bits - 0 - 16 - - - OEPM - OUT EP interrupt mask bits - 16 - 16 - - - - - OTG_HS_DVBUSDIS - OTG_HS_DVBUSDIS - OTG_HS device VBUS discharge time - register - 0x28 - 32 - read-write - 0x000017D7 - - - VBUSDT - Device VBUS discharge time - 0 - 16 - - - - - OTG_HS_DVBUSPULSE - OTG_HS_DVBUSPULSE - OTG_HS device VBUS pulsing time - register - 0x2C - 32 - read-write - 0x000005B8 - - - DVBUSP - Device VBUS pulsing time - 0 - 12 - - - - - OTG_HS_DTHRCTL - OTG_HS_DTHRCTL - OTG_HS Device threshold control - register - 0x30 - 32 - read-write - 0x0 - - - NONISOTHREN - Nonisochronous IN endpoints threshold - enable - 0 - 1 - - - ISOTHREN - ISO IN endpoint threshold - enable - 1 - 1 - - - TXTHRLEN - Transmit threshold length - 2 - 9 - - - RXTHREN - Receive threshold enable - 16 - 1 - - - RXTHRLEN - Receive threshold length - 17 - 9 - - - ARPEN - Arbiter parking enable - 27 - 1 - - - - - OTG_HS_DIEPEMPMSK - OTG_HS_DIEPEMPMSK - OTG_HS device IN endpoint FIFO empty - interrupt mask register - 0x34 - 32 - read-write - 0x0 - - - INEPTXFEM - IN EP Tx FIFO empty interrupt mask - bits - 0 - 16 - - - - - OTG_HS_DEACHINT - OTG_HS_DEACHINT - OTG_HS device each endpoint interrupt - register - 0x38 - 32 - read-write - 0x0 - - - IEP1INT - IN endpoint 1interrupt bit - 1 - 1 - - - OEP1INT - OUT endpoint 1 interrupt - bit - 17 - 1 - - - - - OTG_HS_DEACHINTMSK - OTG_HS_DEACHINTMSK - OTG_HS device each endpoint interrupt - register mask - 0x3C - 32 - read-write - 0x0 - - - IEP1INTM - IN Endpoint 1 interrupt mask - bit - 1 - 1 - - - OEP1INTM - OUT Endpoint 1 interrupt mask - bit - 17 - 1 - - - - - OTG_HS_DIEPEACHMSK1 - OTG_HS_DIEPEACHMSK1 - OTG_HS device each in endpoint-1 interrupt - register - 0x44 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (nonisochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - FIFO underrun mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - NAKM - NAK interrupt mask - 13 - 1 - - - - - OTG_HS_DOEPEACHMSK1 - OTG_HS_DOEPEACHMSK1 - OTG_HS device each OUT endpoint-1 interrupt - register - 0x84 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - OUT packet error mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - BERRM - Bubble error interrupt - mask - 12 - 1 - - - NAKM - NAK interrupt mask - 13 - 1 - - - NYETM - NYET interrupt mask - 14 - 1 - - - - - OTG_HS_DIEPCTL0 - OTG_HS_DIEPCTL0 - OTG device endpoint-0 control - register - 0x100 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL1 - OTG_HS_DIEPCTL1 - OTG device endpoint-1 control - register - 0x120 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL2 - OTG_HS_DIEPCTL2 - OTG device endpoint-2 control - register - 0x140 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL3 - OTG_HS_DIEPCTL3 - OTG device endpoint-3 control - register - 0x160 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL4 - OTG_HS_DIEPCTL4 - OTG device endpoint-4 control - register - 0x180 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL5 - OTG_HS_DIEPCTL5 - OTG device endpoint-5 control - register - 0x1A0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL6 - OTG_HS_DIEPCTL6 - OTG device endpoint-6 control - register - 0x1C0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL7 - OTG_HS_DIEPCTL7 - OTG device endpoint-7 control - register - 0x1E0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPINT0 - OTG_HS_DIEPINT0 - OTG device endpoint-0 interrupt - register - 0x108 - 32 - 0x00000080 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT1 - OTG_HS_DIEPINT1 - OTG device endpoint-1 interrupt - register - 0x128 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT2 - OTG_HS_DIEPINT2 - OTG device endpoint-2 interrupt - register - 0x148 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT3 - OTG_HS_DIEPINT3 - OTG device endpoint-3 interrupt - register - 0x168 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT4 - OTG_HS_DIEPINT4 - OTG device endpoint-4 interrupt - register - 0x188 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT5 - OTG_HS_DIEPINT5 - OTG device endpoint-5 interrupt - register - 0x1A8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT6 - OTG_HS_DIEPINT6 - OTG device endpoint-6 interrupt - register - 0x1C8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT7 - OTG_HS_DIEPINT7 - OTG device endpoint-7 interrupt - register - 0x1E8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPTSIZ0 - OTG_HS_DIEPTSIZ0 - OTG_HS device IN endpoint 0 transfer size - register - 0x110 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 7 - - - PKTCNT - Packet count - 19 - 2 - - - - - OTG_HS_DIEPDMA1 - OTG_HS_DIEPDMA1 - OTG_HS device endpoint-1 DMA address - register - 0x114 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA2 - OTG_HS_DIEPDMA2 - OTG_HS device endpoint-2 DMA address - register - 0x134 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA3 - OTG_HS_DIEPDMA3 - OTG_HS device endpoint-3 DMA address - register - 0x154 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA4 - OTG_HS_DIEPDMA4 - OTG_HS device endpoint-4 DMA address - register - 0x174 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA5 - OTG_HS_DIEPDMA5 - OTG_HS device endpoint-5 DMA address - register - 0x194 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DTXFSTS0 - OTG_HS_DTXFSTS0 - OTG_HS device IN endpoint transmit FIFO - status register - 0x118 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS1 - OTG_HS_DTXFSTS1 - OTG_HS device IN endpoint transmit FIFO - status register - 0x138 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS2 - OTG_HS_DTXFSTS2 - OTG_HS device IN endpoint transmit FIFO - status register - 0x158 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS3 - OTG_HS_DTXFSTS3 - OTG_HS device IN endpoint transmit FIFO - status register - 0x178 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS4 - OTG_HS_DTXFSTS4 - OTG_HS device IN endpoint transmit FIFO - status register - 0x198 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS5 - OTG_HS_DTXFSTS5 - OTG_HS device IN endpoint transmit FIFO - status register - 0x1B8 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DIEPTSIZ1 - OTG_HS_DIEPTSIZ1 - OTG_HS device endpoint transfer size - register - 0x130 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ2 - OTG_HS_DIEPTSIZ2 - OTG_HS device endpoint transfer size - register - 0x150 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ3 - OTG_HS_DIEPTSIZ3 - OTG_HS device endpoint transfer size - register - 0x170 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ4 - OTG_HS_DIEPTSIZ4 - OTG_HS device endpoint transfer size - register - 0x190 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ5 - OTG_HS_DIEPTSIZ5 - OTG_HS device endpoint transfer size - register - 0x1B0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DOEPCTL0 - OTG_HS_DOEPCTL0 - OTG_HS device control OUT endpoint 0 control - register - 0x300 - 32 - 0x00008000 - - - MPSIZ - Maximum packet size - 0 - 2 - read-only - - - USBAEP - USB active endpoint - 15 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-only - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-only - - - EPENA - Endpoint enable - 31 - 1 - write-only - - - - - OTG_HS_DOEPCTL1 - OTG_HS_DOEPCTL1 - OTG device endpoint-1 control - register - 0x320 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPCTL2 - OTG_HS_DOEPCTL2 - OTG device endpoint-2 control - register - 0x340 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPCTL3 - OTG_HS_DOEPCTL3 - OTG device endpoint-3 control - register - 0x360 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPINT0 - OTG_HS_DOEPINT0 - OTG_HS device endpoint-0 interrupt - register - 0x308 - 32 - read-write - 0x00000080 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT1 - OTG_HS_DOEPINT1 - OTG_HS device endpoint-1 interrupt - register - 0x328 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT2 - OTG_HS_DOEPINT2 - OTG_HS device endpoint-2 interrupt - register - 0x348 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT3 - OTG_HS_DOEPINT3 - OTG_HS device endpoint-3 interrupt - register - 0x368 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT4 - OTG_HS_DOEPINT4 - OTG_HS device endpoint-4 interrupt - register - 0x388 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT5 - OTG_HS_DOEPINT5 - OTG_HS device endpoint-5 interrupt - register - 0x3A8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT6 - OTG_HS_DOEPINT6 - OTG_HS device endpoint-6 interrupt - register - 0x3C8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT7 - OTG_HS_DOEPINT7 - OTG_HS device endpoint-7 interrupt - register - 0x3E8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPTSIZ0 - OTG_HS_DOEPTSIZ0 - OTG_HS device endpoint-1 transfer size - register - 0x310 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 7 - - - PKTCNT - Packet count - 19 - 1 - - - STUPCNT - SETUP packet count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ1 - OTG_HS_DOEPTSIZ1 - OTG_HS device endpoint-2 transfer size - register - 0x330 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ2 - OTG_HS_DOEPTSIZ2 - OTG_HS device endpoint-3 transfer size - register - 0x350 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ3 - OTG_HS_DOEPTSIZ3 - OTG_HS device endpoint-4 transfer size - register - 0x370 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ4 - OTG_HS_DOEPTSIZ4 - OTG_HS device endpoint-5 transfer size - register - 0x390 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - - - OTG_HS_PWRCLK - USB on the go high speed - USB_OTG_HS - 0x40040E00 - - 0x0 - 0x3F200 - registers - - - - OTG_HS_PCGCR - OTG_HS_PCGCR - Power and clock gating control - register - 0x0 - 32 - read-write - 0x0 - - - STPPCLK - Stop PHY clock - 0 - 1 - - - GATEHCLK - Gate HCLK - 1 - 1 - - - PHYSUSP - PHY suspended - 4 - 1 - - - - - - - NVIC - Nested Vectored Interrupt - Controller - NVIC - 0xE000E100 - - 0x0 - 0x351 - registers - - - - ISER0 - ISER0 - Interrupt Set-Enable Register - 0x0 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ISER1 - ISER1 - Interrupt Set-Enable Register - 0x4 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ISER2 - ISER2 - Interrupt Set-Enable Register - 0x8 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ICER0 - ICER0 - Interrupt Clear-Enable - Register - 0x80 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ICER1 - ICER1 - Interrupt Clear-Enable - Register - 0x84 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ICER2 - ICER2 - Interrupt Clear-Enable - Register - 0x88 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ISPR0 - ISPR0 - Interrupt Set-Pending Register - 0x100 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ISPR1 - ISPR1 - Interrupt Set-Pending Register - 0x104 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ISPR2 - ISPR2 - Interrupt Set-Pending Register - 0x108 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ICPR0 - ICPR0 - Interrupt Clear-Pending - Register - 0x180 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - ICPR1 - ICPR1 - Interrupt Clear-Pending - Register - 0x184 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - ICPR2 - ICPR2 - Interrupt Clear-Pending - Register - 0x188 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - IABR0 - IABR0 - Interrupt Active Bit Register - 0x200 - 0x20 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IABR1 - IABR1 - Interrupt Active Bit Register - 0x204 - 0x20 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IABR2 - IABR2 - Interrupt Active Bit Register - 0x208 - 0x20 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IPR0 - IPR0 - Interrupt Priority Register - 0x300 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR1 - IPR1 - Interrupt Priority Register - 0x304 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR2 - IPR2 - Interrupt Priority Register - 0x308 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR3 - IPR3 - Interrupt Priority Register - 0x30C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR4 - IPR4 - Interrupt Priority Register - 0x310 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR5 - IPR5 - Interrupt Priority Register - 0x314 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR6 - IPR6 - Interrupt Priority Register - 0x318 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR7 - IPR7 - Interrupt Priority Register - 0x31C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR8 - IPR8 - Interrupt Priority Register - 0x320 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR9 - IPR9 - Interrupt Priority Register - 0x324 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR10 - IPR10 - Interrupt Priority Register - 0x328 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR11 - IPR11 - Interrupt Priority Register - 0x32C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR12 - IPR12 - Interrupt Priority Register - 0x330 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR13 - IPR13 - Interrupt Priority Register - 0x334 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR14 - IPR14 - Interrupt Priority Register - 0x338 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR15 - IPR15 - Interrupt Priority Register - 0x33C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR16 - IPR16 - Interrupt Priority Register - 0x340 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR17 - IPR17 - Interrupt Priority Register - 0x344 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR18 - IPR18 - Interrupt Priority Register - 0x348 - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR19 - IPR19 - Interrupt Priority Register - 0x34C - 0x20 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - - - SAI1 - Serial audio interface - SAI1 - 0x40015800 - - 0x0 - 0x400 - registers - - - - SAI_ACR1 - SAI_ACR1 - SAI AConfiguration register 1 - 0x4 - 0x20 - read-write - 0x00000040 - - - MCKDIV - Master clock divider - 20 - 4 - - - MODE - Audio block mode - 0 - 2 - - - PRTCFG - Protocol configuration - 2 - 2 - - - DS - Data size - 5 - 3 - - - LSBFIRST - Least significant bit - first - 8 - 1 - - - CKSTR - Clock strobing edge - 9 - 1 - - - SYNCEN - Synchronization enable - 10 - 2 - - - MONO - Mono mode - 12 - 1 - - - OUTDRIV - Output drive - 13 - 1 - - - SAIAEN - Audio block enable - 16 - 1 - - - DMAEN - DMA enable - 17 - 1 - - - NODIV - No divider - 19 - 1 - - - - - SAI_BCR1 - SAI_BCR1 - SAI BConfiguration register 1 - 0x24 - 0x20 - read-write - 0x00000040 - - - MODE - Audio block mode - 0 - 2 - - - PRTCFG - Protocol configuration - 2 - 2 - - - DS - Data size - 5 - 3 - - - LSBFIRST - Least significant bit - first - 8 - 1 - - - CKSTR - Clock strobing edge - 9 - 1 - - - SYNCEN - Synchronization enable - 10 - 2 - - - MONO - Mono mode - 12 - 1 - - - OUTDRIV - Output drive - 13 - 1 - - - SAIBEN - Audio block enable - 16 - 1 - - - DMAEN - DMA enable - 17 - 1 - - - NODIV - No divider - 19 - 1 - - - MCKDIV - Master clock divider - 20 - 4 - - - - - SAI_ACR2 - SAI_ACR2 - SAI AConfiguration register 2 - 0x8 - 0x20 - read-write - 0x00000040 - - - FTH - FIFO threshold - 0 - 3 - - - FFLUSH - FIFO flush - 3 - 1 - - - TRIS - Tristate management on data - line - 4 - 1 - - - MUTE - Mute - 5 - 1 - - - MUTEVAL - Mute value - 6 - 1 - - - MUTECNT - Mute counter - 7 - 6 - - - CPL - Complement bit - 13 - 1 - - - COMP - Companding mode - 14 - 2 - - - - - SAI_BCR2 - SAI_BCR2 - SAI BConfiguration register 2 - 0x28 - 0x20 - read-write - 0x00000040 - - - FTH - FIFO threshold - 0 - 3 - - - FFLUSH - FIFO flush - 3 - 1 - - - TRIS - Tristate management on data - line - 4 - 1 - - - MUTE - Mute - 5 - 1 - - - MUTEVAL - Mute value - 6 - 1 - - - MUTECNT - Mute counter - 7 - 6 - - - CPL - Complement bit - 13 - 1 - - - COMP - Companding mode - 14 - 2 - - - - - SAI_AFRCR - SAI_AFRCR - SAI AFrame configuration - register - 0xC - 0x20 - 0x00000007 - - - FRL - Frame length - 0 - 8 - read-write - - - FSALL - Frame synchronization active level - length - 8 - 7 - read-write - - - FSDEF - Frame synchronization - definition - 16 - 1 - read-only - - - FSPOL - Frame synchronization - polarity - 17 - 1 - read-write - - - FSOFF - Frame synchronization - offset - 18 - 1 - read-write - - - - - SAI_BFRCR - SAI_BFRCR - SAI BFrame configuration - register - 0x2C - 0x20 - 0x00000007 - - - FRL - Frame length - 0 - 8 - read-write - - - FSALL - Frame synchronization active level - length - 8 - 7 - read-write - - - FSDEF - Frame synchronization - definition - 16 - 1 - read-only - - - FSPOL - Frame synchronization - polarity - 17 - 1 - read-write - - - FSOFF - Frame synchronization - offset - 18 - 1 - read-write - - - - - SAI_ASLOTR - SAI_ASLOTR - SAI ASlot register - 0x10 - 0x20 - read-write - 0x00000000 - - - FBOFF - First bit offset - 0 - 5 - - - SLOTSZ - Slot size - 6 - 2 - - - NBSLOT - Number of slots in an audio - frame - 8 - 4 - - - SLOTEN - Slot enable - 16 - 16 - - - - - SAI_BSLOTR - SAI_BSLOTR - SAI BSlot register - 0x30 - 0x20 - read-write - 0x00000000 - - - FBOFF - First bit offset - 0 - 5 - - - SLOTSZ - Slot size - 6 - 2 - - - NBSLOT - Number of slots in an audio - frame - 8 - 4 - - - SLOTEN - Slot enable - 16 - 16 - - - - - SAI_AIM - SAI_AIM - SAI AInterrupt mask register2 - 0x14 - 0x20 - read-write - 0x00000000 - - - OVRUDRIE - Overrun/underrun interrupt - enable - 0 - 1 - - - MUTEDETIE - Mute detection interrupt - enable - 1 - 1 - - - WCKCFGIE - Wrong clock configuration interrupt - enable - 2 - 1 - - - FREQIE - FIFO request interrupt - enable - 3 - 1 - - - CNRDYIE - Codec not ready interrupt - enable - 4 - 1 - - - AFSDETIE - Anticipated frame synchronization - detection interrupt enable - 5 - 1 - - - LFSDETIE - Late frame synchronization detection - interrupt enable - 6 - 1 - - - - - SAI_BIM - SAI_BIM - SAI BInterrupt mask register2 - 0x34 - 0x20 - read-write - 0x00000000 - - - OVRUDRIE - Overrun/underrun interrupt - enable - 0 - 1 - - - MUTEDETIE - Mute detection interrupt - enable - 1 - 1 - - - WCKCFGIE - Wrong clock configuration interrupt - enable - 2 - 1 - - - FREQIE - FIFO request interrupt - enable - 3 - 1 - - - CNRDYIE - Codec not ready interrupt - enable - 4 - 1 - - - AFSDETIE - Anticipated frame synchronization - detection interrupt enable - 5 - 1 - - - LFSDETIE - Late frame synchronization detection - interrupt enable - 6 - 1 - - - - - SAI_ASR - SAI_ASR - SAI AStatus register - 0x18 - 0x20 - read-only - 0x00000008 - - - OVRUDR - Overrun / underrun - 0 - 1 - - - MUTEDET - Mute detection - 1 - 1 - - - WCKCFG - Wrong clock configuration - flag - 2 - 1 - - - FREQ - FIFO request - 3 - 1 - - - CNRDY - Codec not ready - 4 - 1 - - - AFSDET - Anticipated frame synchronization - detection - 5 - 1 - - - LFSDET - Late frame synchronization - detection - 6 - 1 - - - FLTH - FIFO level threshold - 16 - 3 - - - - - SAI_BSR - SAI_BSR - SAI BStatus register - 0x38 - 0x20 - read-only - 0x00000008 - - - OVRUDR - Overrun / underrun - 0 - 1 - - - MUTEDET - Mute detection - 1 - 1 - - - WCKCFG - Wrong clock configuration - flag - 2 - 1 - - - FREQ - FIFO request - 3 - 1 - - - CNRDY - Codec not ready - 4 - 1 - - - AFSDET - Anticipated frame synchronization - detection - 5 - 1 - - - LFSDET - Late frame synchronization - detection - 6 - 1 - - - FLTH - FIFO level threshold - 16 - 3 - - - - - SAI_ACLRFR - SAI_ACLRFR - SAI AClear flag register - 0x1C - 0x20 - read-write - 0x00000000 - - - COVRUDR - Clear overrun / underrun - 0 - 1 - - - CMUTEDET - Mute detection flag - 1 - 1 - - - CWCKCFG - Clear wrong clock configuration - flag - 2 - 1 - - - CCNRDY - Clear codec not ready flag - 4 - 1 - - - CAFSDET - Clear anticipated frame synchronization - detection flag - 5 - 1 - - - CLFSDET - Clear late frame synchronization - detection flag - 6 - 1 - - - - - SAI_BCLRFR - SAI_BCLRFR - SAI BClear flag register - 0x3C - 0x20 - read-write - 0x00000000 - - - COVRUDR - Clear overrun / underrun - 0 - 1 - - - CMUTEDET - Mute detection flag - 1 - 1 - - - CWCKCFG - Clear wrong clock configuration - flag - 2 - 1 - - - CCNRDY - Clear codec not ready flag - 4 - 1 - - - CAFSDET - Clear anticipated frame synchronization - detection flag - 5 - 1 - - - CLFSDET - Clear late frame synchronization - detection flag - 6 - 1 - - - - - SAI_ADR - SAI_ADR - SAI AData register - 0x20 - 0x20 - read-write - 0x00000000 - - - DATA - Data - 0 - 32 - - - - - SAI_BDR - SAI_BDR - SAI BData register - 0x40 - 0x20 - read-write - 0x00000000 - - - DATA - Data - 0 - 32 - - - - - - - LTDC - LCD-TFT Controller - LTDC - 0x40016800 - - 0x0 - 0x400 - registers - - - LCD_TFT - LTDC global interrupt - 88 - - - LCD_TFT_1 - LTDC global error interrupt - 89 - - - - SSCR - SSCR - Synchronization Size Configuration - Register - 0x8 - 0x20 - read-write - 0x00000000 - - - HSW - Horizontal Synchronization Width (in - units of pixel clock period) - 16 - 10 - - - VSH - Vertical Synchronization Height (in - units of horizontal scan line) - 0 - 11 - - - - - BPCR - BPCR - Back Porch Configuration - Register - 0xC - 0x20 - read-write - 0x00000000 - - - AHBP - Accumulated Horizontal back porch (in - units of pixel clock period) - 16 - 10 - - - AVBP - Accumulated Vertical back porch (in - units of horizontal scan line) - 0 - 11 - - - - - AWCR - AWCR - Active Width Configuration - Register - 0x10 - 0x20 - read-write - 0x00000000 - - - AAV - AAV - 16 - 10 - - - AAH - Accumulated Active Height (in units of - horizontal scan line) - 0 - 11 - - - - - TWCR - TWCR - Total Width Configuration - Register - 0x14 - 0x20 - read-write - 0x00000000 - - - TOTALW - Total Width (in units of pixel clock - period) - 16 - 10 - - - TOTALH - Total Height (in units of horizontal - scan line) - 0 - 11 - - - - - GCR - GCR - Global Control Register - 0x18 - 0x20 - 0x00002220 - - - HSPOL - Horizontal Synchronization - Polarity - 31 - 1 - read-write - - - VSPOL - Vertical Synchronization - Polarity - 30 - 1 - read-write - - - DEPOL - Data Enable Polarity - 29 - 1 - read-write - - - PCPOL - Pixel Clock Polarity - 28 - 1 - read-write - - - DEN - Dither Enable - 16 - 1 - read-write - - - DRW - Dither Red Width - 12 - 3 - read-only - - - DGW - Dither Green Width - 8 - 3 - read-only - - - DBW - Dither Blue Width - 4 - 3 - read-only - - - LTDCEN - LCD-TFT controller enable - bit - 0 - 1 - read-write - - - - - SRCR - SRCR - Shadow Reload Configuration - Register - 0x24 - 0x20 - read-write - 0x00000000 - - - VBR - Vertical Blanking Reload - 1 - 1 - - - IMR - Immediate Reload - 0 - 1 - - - - - BCCR - BCCR - Background Color Configuration - Register - 0x2C - 0x20 - read-write - 0x00000000 - - - BC - Background Color Red value - 0 - 24 - - - - - IER - IER - Interrupt Enable Register - 0x34 - 0x20 - read-write - 0x00000000 - - - RRIE - Register Reload interrupt - enable - 3 - 1 - - - TERRIE - Transfer Error Interrupt - Enable - 2 - 1 - - - FUIE - FIFO Underrun Interrupt - Enable - 1 - 1 - - - LIE - Line Interrupt Enable - 0 - 1 - - - - - ISR - ISR - Interrupt Status Register - 0x38 - 0x20 - read-only - 0x00000000 - - - RRIF - Register Reload Interrupt - Flag - 3 - 1 - - - TERRIF - Transfer Error interrupt - flag - 2 - 1 - - - FUIF - FIFO Underrun Interrupt - flag - 1 - 1 - - - LIF - Line Interrupt flag - 0 - 1 - - - - - ICR - ICR - Interrupt Clear Register - 0x3C - 0x20 - write-only - 0x00000000 - - - CRRIF - Clears Register Reload Interrupt - Flag - 3 - 1 - - - CTERRIF - Clears the Transfer Error Interrupt - Flag - 2 - 1 - - - CFUIF - Clears the FIFO Underrun Interrupt - flag - 1 - 1 - - - CLIF - Clears the Line Interrupt - Flag - 0 - 1 - - - - - LIPCR - LIPCR - Line Interrupt Position Configuration - Register - 0x40 - 0x20 - read-write - 0x00000000 - - - LIPOS - Line Interrupt Position - 0 - 11 - - - - - CPSR - CPSR - Current Position Status - Register - 0x44 - 0x20 - read-only - 0x00000000 - - - CXPOS - Current X Position - 16 - 16 - - - CYPOS - Current Y Position - 0 - 16 - - - - - CDSR - CDSR - Current Display Status - Register - 0x48 - 0x20 - read-only - 0x0000000F - - - HSYNCS - Horizontal Synchronization display - Status - 3 - 1 - - - VSYNCS - Vertical Synchronization display - Status - 2 - 1 - - - HDES - Horizontal Data Enable display - Status - 1 - 1 - - - VDES - Vertical Data Enable display - Status - 0 - 1 - - - - - L1CR - L1CR - Layerx Control Register - 0x84 - 0x20 - read-write - 0x00000000 - - - CLUTEN - Color Look-Up Table Enable - 4 - 1 - - - COLKEN - Color Keying Enable - 1 - 1 - - - LEN - Layer Enable - 0 - 1 - - - - - L1WHPCR - L1WHPCR - Layerx Window Horizontal Position - Configuration Register - 0x88 - 0x20 - read-write - 0x00000000 - - - WHSPPOS - Window Horizontal Stop - Position - 16 - 12 - - - WHSTPOS - Window Horizontal Start - Position - 0 - 12 - - - - - L1WVPCR - L1WVPCR - Layerx Window Vertical Position - Configuration Register - 0x8C - 0x20 - read-write - 0x00000000 - - - WVSPPOS - Window Vertical Stop - Position - 16 - 11 - - - WVSTPOS - Window Vertical Start - Position - 0 - 11 - - - - - L1CKCR - L1CKCR - Layerx Color Keying Configuration - Register - 0x90 - 0x20 - read-write - 0x00000000 - - - CKRED - Color Key Red value - 16 - 8 - - - CKGREEN - Color Key Green value - 8 - 8 - - - CKBLUE - Color Key Blue value - 0 - 8 - - - - - L1PFCR - L1PFCR - Layerx Pixel Format Configuration - Register - 0x94 - 0x20 - read-write - 0x00000000 - - - PF - Pixel Format - 0 - 3 - - - - - L1CACR - L1CACR - Layerx Constant Alpha Configuration - Register - 0x98 - 0x20 - read-write - 0x00000000 - - - CONSTA - Constant Alpha - 0 - 8 - - - - - L1DCCR - L1DCCR - Layerx Default Color Configuration - Register - 0x9C - 0x20 - read-write - 0x00000000 - - - DCALPHA - Default Color Alpha - 24 - 8 - - - DCRED - Default Color Red - 16 - 8 - - - DCGREEN - Default Color Green - 8 - 8 - - - DCBLUE - Default Color Blue - 0 - 8 - - - - - L1BFCR - L1BFCR - Layerx Blending Factors Configuration - Register - 0xA0 - 0x20 - read-write - 0x00000607 - - - BF1 - Blending Factor 1 - 8 - 3 - - - BF2 - Blending Factor 2 - 0 - 3 - - - - - L1CFBAR - L1CFBAR - Layerx Color Frame Buffer Address - Register - 0xAC - 0x20 - read-write - 0x00000000 - - - CFBADD - Color Frame Buffer Start - Address - 0 - 32 - - - - - L1CFBLR - L1CFBLR - Layerx Color Frame Buffer Length - Register - 0xB0 - 0x20 - read-write - 0x00000000 - - - CFBP - Color Frame Buffer Pitch in - bytes - 16 - 13 - - - CFBLL - Color Frame Buffer Line - Length - 0 - 13 - - - - - L1CFBLNR - L1CFBLNR - Layerx ColorFrame Buffer Line Number - Register - 0xB4 - 0x20 - read-write - 0x00000000 - - - CFBLNBR - Frame Buffer Line Number - 0 - 11 - - - - - L1CLUTWR - L1CLUTWR - Layerx CLUT Write Register - 0xC4 - 0x20 - write-only - 0x00000000 - - - CLUTADD - CLUT Address - 24 - 8 - - - RED - Red value - 16 - 8 - - - GREEN - Green value - 8 - 8 - - - BLUE - Blue value - 0 - 8 - - - - - L2CR - L2CR - Layerx Control Register - 0x104 - 0x20 - read-write - 0x00000000 - - - CLUTEN - Color Look-Up Table Enable - 4 - 1 - - - COLKEN - Color Keying Enable - 1 - 1 - - - LEN - Layer Enable - 0 - 1 - - - - - L2WHPCR - L2WHPCR - Layerx Window Horizontal Position - Configuration Register - 0x108 - 0x20 - read-write - 0x00000000 - - - WHSPPOS - Window Horizontal Stop - Position - 16 - 12 - - - WHSTPOS - Window Horizontal Start - Position - 0 - 12 - - - - - L2WVPCR - L2WVPCR - Layerx Window Vertical Position - Configuration Register - 0x10C - 0x20 - read-write - 0x00000000 - - - WVSPPOS - Window Vertical Stop - Position - 16 - 11 - - - WVSTPOS - Window Vertical Start - Position - 0 - 11 - - - - - L2CKCR - L2CKCR - Layerx Color Keying Configuration - Register - 0x110 - 0x20 - read-write - 0x00000000 - - - CKRED - Color Key Red value - 15 - 9 - - - CKGREEN - Color Key Green value - 8 - 7 - - - CKBLUE - Color Key Blue value - 0 - 8 - - - - - L2PFCR - L2PFCR - Layerx Pixel Format Configuration - Register - 0x114 - 0x20 - read-write - 0x00000000 - - - PF - Pixel Format - 0 - 3 - - - - - L2CACR - L2CACR - Layerx Constant Alpha Configuration - Register - 0x118 - 0x20 - read-write - 0x00000000 - - - CONSTA - Constant Alpha - 0 - 8 - - - - - L2DCCR - L2DCCR - Layerx Default Color Configuration - Register - 0x11C - 0x20 - read-write - 0x00000000 - - - DCALPHA - Default Color Alpha - 24 - 8 - - - DCRED - Default Color Red - 16 - 8 - - - DCGREEN - Default Color Green - 8 - 8 - - - DCBLUE - Default Color Blue - 0 - 8 - - - - - L2BFCR - L2BFCR - Layerx Blending Factors Configuration - Register - 0x120 - 0x20 - read-write - 0x00000607 - - - BF1 - Blending Factor 1 - 8 - 3 - - - BF2 - Blending Factor 2 - 0 - 3 - - - - - L2CFBAR - L2CFBAR - Layerx Color Frame Buffer Address - Register - 0x12C - 0x20 - read-write - 0x00000000 - - - CFBADD - Color Frame Buffer Start - Address - 0 - 32 - - - - - L2CFBLR - L2CFBLR - Layerx Color Frame Buffer Length - Register - 0x130 - 0x20 - read-write - 0x00000000 - - - CFBP - Color Frame Buffer Pitch in - bytes - 16 - 13 - - - CFBLL - Color Frame Buffer Line - Length - 0 - 13 - - - - - L2CFBLNR - L2CFBLNR - Layerx ColorFrame Buffer Line Number - Register - 0x134 - 0x20 - read-write - 0x00000000 - - - CFBLNBR - Frame Buffer Line Number - 0 - 11 - - - - - L2CLUTWR - L2CLUTWR - Layerx CLUT Write Register - 0x144 - 0x20 - write-only - 0x00000000 - - - CLUTADD - CLUT Address - 24 - 8 - - - RED - Red value - 16 - 8 - - - GREEN - Green value - 8 - 8 - - - BLUE - Blue value - 0 - 8 - - - - - - - HASH - Hash processor - HASH - 0x50060400 - - 0x0 - 0x400 - registers - - - HASH_RNG - Hash and Rng global interrupt - 80 - - - - CR - CR - control register - 0x0 - 0x20 - 0x00000000 - - - INIT - Initialize message digest - calculation - 2 - 1 - write-only - - - DMAE - DMA enable - 3 - 1 - read-write - - - DATATYPE - Data type selection - 4 - 2 - read-write - - - MODE - Mode selection - 6 - 1 - read-write - - - ALGO0 - Algorithm selection - 7 - 1 - read-write - - - NBW - Number of words already - pushed - 8 - 4 - read-only - - - DINNE - DIN not empty - 12 - 1 - read-only - - - MDMAT - Multiple DMA Transfers - 13 - 1 - read-write - - - LKEY - Long key selection - 16 - 1 - read-write - - - ALGO1 - ALGO - 18 - 1 - read-write - - - - - DIN - DIN - data input register - 0x4 - 0x20 - read-write - 0x00000000 - - - DATAIN - Data input - 0 - 32 - - - - - STR - STR - start register - 0x8 - 0x20 - 0x00000000 - - - DCAL - Digest calculation - 8 - 1 - write-only - - - NBLW - Number of valid bits in the last word of - the message - 0 - 5 - read-write - - - - - HR0 - HR0 - digest registers - 0xC - 0x20 - read-only - 0x00000000 - - - H0 - H0 - 0 - 32 - - - - - HR1 - HR1 - digest registers - 0x10 - 0x20 - read-only - 0x00000000 - - - H1 - H1 - 0 - 32 - - - - - HR2 - HR2 - digest registers - 0x14 - 0x20 - read-only - 0x00000000 - - - H2 - H2 - 0 - 32 - - - - - HR3 - HR3 - digest registers - 0x18 - 0x20 - read-only - 0x00000000 - - - H3 - H3 - 0 - 32 - - - - - HR4 - HR4 - digest registers - 0x1C - 0x20 - read-only - 0x00000000 - - - H4 - H4 - 0 - 32 - - - - - IMR - IMR - interrupt enable register - 0x20 - 0x20 - read-write - 0x00000000 - - - DCIE - Digest calculation completion interrupt - enable - 1 - 1 - - - DINIE - Data input interrupt - enable - 0 - 1 - - - - - SR - SR - status register - 0x24 - 0x20 - 0x00000001 - - - BUSY - Busy bit - 3 - 1 - read-only - - - DMAS - DMA Status - 2 - 1 - read-only - - - DCIS - Digest calculation completion interrupt - status - 1 - 1 - read-write - - - DINIS - Data input interrupt - status - 0 - 1 - read-write - - - - - CSR0 - CSR0 - context swap registers - 0xF8 - 0x20 - read-write - 0x00000000 - - - CSR0 - CSR0 - 0 - 32 - - - - - CSR1 - CSR1 - context swap registers - 0xFC - 0x20 - read-write - 0x00000000 - - - CSR1 - CSR1 - 0 - 32 - - - - - CSR2 - CSR2 - context swap registers - 0x100 - 0x20 - read-write - 0x00000000 - - - CSR2 - CSR2 - 0 - 32 - - - - - CSR3 - CSR3 - context swap registers - 0x104 - 0x20 - read-write - 0x00000000 - - - CSR3 - CSR3 - 0 - 32 - - - - - CSR4 - CSR4 - context swap registers - 0x108 - 0x20 - read-write - 0x00000000 - - - CSR4 - CSR4 - 0 - 32 - - - - - CSR5 - CSR5 - context swap registers - 0x10C - 0x20 - read-write - 0x00000000 - - - CSR5 - CSR5 - 0 - 32 - - - - - CSR6 - CSR6 - context swap registers - 0x110 - 0x20 - read-write - 0x00000000 - - - CSR6 - CSR6 - 0 - 32 - - - - - CSR7 - CSR7 - context swap registers - 0x114 - 0x20 - read-write - 0x00000000 - - - CSR7 - CSR7 - 0 - 32 - - - - - CSR8 - CSR8 - context swap registers - 0x118 - 0x20 - read-write - 0x00000000 - - - CSR8 - CSR8 - 0 - 32 - - - - - CSR9 - CSR9 - context swap registers - 0x11C - 0x20 - read-write - 0x00000000 - - - CSR9 - CSR9 - 0 - 32 - - - - - CSR10 - CSR10 - context swap registers - 0x120 - 0x20 - read-write - 0x00000000 - - - CSR10 - CSR10 - 0 - 32 - - - - - CSR11 - CSR11 - context swap registers - 0x124 - 0x20 - read-write - 0x00000000 - - - CSR11 - CSR11 - 0 - 32 - - - - - CSR12 - CSR12 - context swap registers - 0x128 - 0x20 - read-write - 0x00000000 - - - CSR12 - CSR12 - 0 - 32 - - - - - CSR13 - CSR13 - context swap registers - 0x12C - 0x20 - read-write - 0x00000000 - - - CSR13 - CSR13 - 0 - 32 - - - - - CSR14 - CSR14 - context swap registers - 0x130 - 0x20 - read-write - 0x00000000 - - - CSR14 - CSR14 - 0 - 32 - - - - - CSR15 - CSR15 - context swap registers - 0x134 - 0x20 - read-write - 0x00000000 - - - CSR15 - CSR15 - 0 - 32 - - - - - CSR16 - CSR16 - context swap registers - 0x138 - 0x20 - read-write - 0x00000000 - - - CSR16 - CSR16 - 0 - 32 - - - - - CSR17 - CSR17 - context swap registers - 0x13C - 0x20 - read-write - 0x00000000 - - - CSR17 - CSR17 - 0 - 32 - - - - - CSR18 - CSR18 - context swap registers - 0x140 - 0x20 - read-write - 0x00000000 - - - CSR18 - CSR18 - 0 - 32 - - - - - CSR19 - CSR19 - context swap registers - 0x144 - 0x20 - read-write - 0x00000000 - - - CSR19 - CSR19 - 0 - 32 - - - - - CSR20 - CSR20 - context swap registers - 0x148 - 0x20 - read-write - 0x00000000 - - - CSR20 - CSR20 - 0 - 32 - - - - - CSR21 - CSR21 - context swap registers - 0x14C - 0x20 - read-write - 0x00000000 - - - CSR21 - CSR21 - 0 - 32 - - - - - CSR22 - CSR22 - context swap registers - 0x150 - 0x20 - read-write - 0x00000000 - - - CSR22 - CSR22 - 0 - 32 - - - - - CSR23 - CSR23 - context swap registers - 0x154 - 0x20 - read-write - 0x00000000 - - - CSR23 - CSR23 - 0 - 32 - - - - - CSR24 - CSR24 - context swap registers - 0x158 - 0x20 - read-write - 0x00000000 - - - CSR24 - CSR24 - 0 - 32 - - - - - CSR25 - CSR25 - context swap registers - 0x15C - 0x20 - read-write - 0x00000000 - - - CSR25 - CSR25 - 0 - 32 - - - - - CSR26 - CSR26 - context swap registers - 0x160 - 0x20 - read-write - 0x00000000 - - - CSR26 - CSR26 - 0 - 32 - - - - - CSR27 - CSR27 - context swap registers - 0x164 - 0x20 - read-write - 0x00000000 - - - CSR27 - CSR27 - 0 - 32 - - - - - CSR28 - CSR28 - context swap registers - 0x168 - 0x20 - read-write - 0x00000000 - - - CSR28 - CSR28 - 0 - 32 - - - - - CSR29 - CSR29 - context swap registers - 0x16C - 0x20 - read-write - 0x00000000 - - - CSR29 - CSR29 - 0 - 32 - - - - - CSR30 - CSR30 - context swap registers - 0x170 - 0x20 - read-write - 0x00000000 - - - CSR30 - CSR30 - 0 - 32 - - - - - CSR31 - CSR31 - context swap registers - 0x174 - 0x20 - read-write - 0x00000000 - - - CSR31 - CSR31 - 0 - 32 - - - - - CSR32 - CSR32 - context swap registers - 0x178 - 0x20 - read-write - 0x00000000 - - - CSR32 - CSR32 - 0 - 32 - - - - - CSR33 - CSR33 - context swap registers - 0x17C - 0x20 - read-write - 0x00000000 - - - CSR33 - CSR33 - 0 - 32 - - - - - CSR34 - CSR34 - context swap registers - 0x180 - 0x20 - read-write - 0x00000000 - - - CSR34 - CSR34 - 0 - 32 - - - - - CSR35 - CSR35 - context swap registers - 0x184 - 0x20 - read-write - 0x00000000 - - - CSR35 - CSR35 - 0 - 32 - - - - - CSR36 - CSR36 - context swap registers - 0x188 - 0x20 - read-write - 0x00000000 - - - CSR36 - CSR36 - 0 - 32 - - - - - CSR37 - CSR37 - context swap registers - 0x18C - 0x20 - read-write - 0x00000000 - - - CSR37 - CSR37 - 0 - 32 - - - - - CSR38 - CSR38 - context swap registers - 0x190 - 0x20 - read-write - 0x00000000 - - - CSR38 - CSR38 - 0 - 32 - - - - - CSR39 - CSR39 - context swap registers - 0x194 - 0x20 - read-write - 0x00000000 - - - CSR39 - CSR39 - 0 - 32 - - - - - CSR40 - CSR40 - context swap registers - 0x198 - 0x20 - read-write - 0x00000000 - - - CSR40 - CSR40 - 0 - 32 - - - - - CSR41 - CSR41 - context swap registers - 0x19C - 0x20 - read-write - 0x00000000 - - - CSR41 - CSR41 - 0 - 32 - - - - - CSR42 - CSR42 - context swap registers - 0x1A0 - 0x20 - read-write - 0x00000000 - - - CSR42 - CSR42 - 0 - 32 - - - - - CSR43 - CSR43 - context swap registers - 0x1A4 - 0x20 - read-write - 0x00000000 - - - CSR43 - CSR43 - 0 - 32 - - - - - CSR44 - CSR44 - context swap registers - 0x1A8 - 0x20 - read-write - 0x00000000 - - - CSR44 - CSR44 - 0 - 32 - - - - - CSR45 - CSR45 - context swap registers - 0x1AC - 0x20 - read-write - 0x00000000 - - - CSR45 - CSR45 - 0 - 32 - - - - - CSR46 - CSR46 - context swap registers - 0x1B0 - 0x20 - read-write - 0x00000000 - - - CSR46 - CSR46 - 0 - 32 - - - - - CSR47 - CSR47 - context swap registers - 0x1B4 - 0x20 - read-write - 0x00000000 - - - CSR47 - CSR47 - 0 - 32 - - - - - CSR48 - CSR48 - context swap registers - 0x1B8 - 0x20 - read-write - 0x00000000 - - - CSR48 - CSR48 - 0 - 32 - - - - - CSR49 - CSR49 - context swap registers - 0x1BC - 0x20 - read-write - 0x00000000 - - - CSR49 - CSR49 - 0 - 32 - - - - - CSR50 - CSR50 - context swap registers - 0x1C0 - 0x20 - read-write - 0x00000000 - - - CSR50 - CSR50 - 0 - 32 - - - - - CSR51 - CSR51 - context swap registers - 0x1C4 - 0x20 - read-write - 0x00000000 - - - CSR51 - CSR51 - 0 - 32 - - - - - CSR52 - CSR52 - context swap registers - 0x1C8 - 0x20 - read-write - 0x00000000 - - - CSR52 - CSR52 - 0 - 32 - - - - - CSR53 - CSR53 - context swap registers - 0x1CC - 0x20 - read-write - 0x00000000 - - - CSR53 - CSR53 - 0 - 32 - - - - - HASH_HR0 - HASH_HR0 - HASH digest register - 0x310 - 0x20 - read-only - 0x00000000 - - - H0 - H0 - 0 - 32 - - - - - HASH_HR1 - HASH_HR1 - read-only - 0x314 - 0x20 - read-only - 0x00000000 - - - H1 - H1 - 0 - 32 - - - - - HASH_HR2 - HASH_HR2 - read-only - 0x318 - 0x20 - read-only - 0x00000000 - - - H2 - H2 - 0 - 32 - - - - - HASH_HR3 - HASH_HR3 - read-only - 0x31C - 0x20 - read-only - 0x00000000 - - - H3 - H3 - 0 - 32 - - - - - HASH_HR4 - HASH_HR4 - read-only - 0x320 - 0x20 - read-only - 0x00000000 - - - H4 - H4 - 0 - 32 - - - - - HASH_HR5 - HASH_HR5 - read-only - 0x324 - 0x20 - read-only - 0x00000000 - - - H5 - H5 - 0 - 32 - - - - - HASH_HR6 - HASH_HR6 - read-only - 0x328 - 0x20 - read-only - 0x00000000 - - - H6 - H6 - 0 - 32 - - - - - HASH_HR7 - HASH_HR7 - read-only - 0x32C - 0x20 - read-only - 0x00000000 - - - H7 - H7 - 0 - 32 - - - - - - - CRYP - Cryptographic processor - CRYP - 0x50060000 - - 0x0 - 0x400 - registers - - - CRYP - CRYP crypto global interrupt - 79 - - - - CR - CR - control register - 0x0 - 0x20 - 0x00000000 - - - ALGODIR - Algorithm direction - 2 - 1 - read-write - - - ALGOMODE0 - Algorithm mode - 3 - 3 - read-write - - - DATATYPE - Data type selection - 6 - 2 - read-write - - - KEYSIZE - Key size selection (AES mode - only) - 8 - 2 - read-write - - - FFLUSH - FIFO flush - 14 - 1 - write-only - - - CRYPEN - Cryptographic processor - enable - 15 - 1 - read-write - - - GCM_CCMPH - GCM_CCMPH - 16 - 2 - read-write - - - ALGOMODE3 - ALGOMODE - 19 - 1 - read-write - - - - - SR - SR - status register - 0x4 - 0x20 - read-only - 0x00000003 - - - BUSY - Busy bit - 4 - 1 - - - OFFU - Output FIFO full - 3 - 1 - - - OFNE - Output FIFO not empty - 2 - 1 - - - IFNF - Input FIFO not full - 1 - 1 - - - IFEM - Input FIFO empty - 0 - 1 - - - - - DIN - DIN - data input register - 0x8 - 0x20 - read-write - 0x00000000 - - - DATAIN - Data input - 0 - 32 - - - - - DOUT - DOUT - data output register - 0xC - 0x20 - read-only - 0x00000000 - - - DATAOUT - Data output - 0 - 32 - - - - - DMACR - DMACR - DMA control register - 0x10 - 0x20 - read-write - 0x00000000 - - - DOEN - DMA output enable - 1 - 1 - - - DIEN - DMA input enable - 0 - 1 - - - - - IMSCR - IMSCR - interrupt mask set/clear - register - 0x14 - 0x20 - read-write - 0x00000000 - - - OUTIM - Output FIFO service interrupt - mask - 1 - 1 - - - INIM - Input FIFO service interrupt - mask - 0 - 1 - - - - - RISR - RISR - raw interrupt status register - 0x18 - 0x20 - read-only - 0x00000001 - - - OUTRIS - Output FIFO service raw interrupt - status - 1 - 1 - - - INRIS - Input FIFO service raw interrupt - status - 0 - 1 - - - - - MISR - MISR - masked interrupt status - register - 0x1C - 0x20 - read-only - 0x00000000 - - - OUTMIS - Output FIFO service masked interrupt - status - 1 - 1 - - - INMIS - Input FIFO service masked interrupt - status - 0 - 1 - - - - - K0LR - K0LR - key registers - 0x20 - 0x20 - write-only - 0x00000000 - - - b224 - b224 - 0 - 1 - - - b225 - b225 - 1 - 1 - - - b226 - b226 - 2 - 1 - - - b227 - b227 - 3 - 1 - - - b228 - b228 - 4 - 1 - - - b229 - b229 - 5 - 1 - - - b230 - b230 - 6 - 1 - - - b231 - b231 - 7 - 1 - - - b232 - b232 - 8 - 1 - - - b233 - b233 - 9 - 1 - - - b234 - b234 - 10 - 1 - - - b235 - b235 - 11 - 1 - - - b236 - b236 - 12 - 1 - - - b237 - b237 - 13 - 1 - - - b238 - b238 - 14 - 1 - - - b239 - b239 - 15 - 1 - - - b240 - b240 - 16 - 1 - - - b241 - b241 - 17 - 1 - - - b242 - b242 - 18 - 1 - - - b243 - b243 - 19 - 1 - - - b244 - b244 - 20 - 1 - - - b245 - b245 - 21 - 1 - - - b246 - b246 - 22 - 1 - - - b247 - b247 - 23 - 1 - - - b248 - b248 - 24 - 1 - - - b249 - b249 - 25 - 1 - - - b250 - b250 - 26 - 1 - - - b251 - b251 - 27 - 1 - - - b252 - b252 - 28 - 1 - - - b253 - b253 - 29 - 1 - - - b254 - b254 - 30 - 1 - - - b255 - b255 - 31 - 1 - - - - - K0RR - K0RR - key registers - 0x24 - 0x20 - write-only - 0x00000000 - - - b192 - b192 - 0 - 1 - - - b193 - b193 - 1 - 1 - - - b194 - b194 - 2 - 1 - - - b195 - b195 - 3 - 1 - - - b196 - b196 - 4 - 1 - - - b197 - b197 - 5 - 1 - - - b198 - b198 - 6 - 1 - - - b199 - b199 - 7 - 1 - - - b200 - b200 - 8 - 1 - - - b201 - b201 - 9 - 1 - - - b202 - b202 - 10 - 1 - - - b203 - b203 - 11 - 1 - - - b204 - b204 - 12 - 1 - - - b205 - b205 - 13 - 1 - - - b206 - b206 - 14 - 1 - - - b207 - b207 - 15 - 1 - - - b208 - b208 - 16 - 1 - - - b209 - b209 - 17 - 1 - - - b210 - b210 - 18 - 1 - - - b211 - b211 - 19 - 1 - - - b212 - b212 - 20 - 1 - - - b213 - b213 - 21 - 1 - - - b214 - b214 - 22 - 1 - - - b215 - b215 - 23 - 1 - - - b216 - b216 - 24 - 1 - - - b217 - b217 - 25 - 1 - - - b218 - b218 - 26 - 1 - - - b219 - b219 - 27 - 1 - - - b220 - b220 - 28 - 1 - - - b221 - b221 - 29 - 1 - - - b222 - b222 - 30 - 1 - - - b223 - b223 - 31 - 1 - - - - - K1LR - K1LR - key registers - 0x28 - 0x20 - write-only - 0x00000000 - - - b160 - b160 - 0 - 1 - - - b161 - b161 - 1 - 1 - - - b162 - b162 - 2 - 1 - - - b163 - b163 - 3 - 1 - - - b164 - b164 - 4 - 1 - - - b165 - b165 - 5 - 1 - - - b166 - b166 - 6 - 1 - - - b167 - b167 - 7 - 1 - - - b168 - b168 - 8 - 1 - - - b169 - b169 - 9 - 1 - - - b170 - b170 - 10 - 1 - - - b171 - b171 - 11 - 1 - - - b172 - b172 - 12 - 1 - - - b173 - b173 - 13 - 1 - - - b174 - b174 - 14 - 1 - - - b175 - b175 - 15 - 1 - - - b176 - b176 - 16 - 1 - - - b177 - b177 - 17 - 1 - - - b178 - b178 - 18 - 1 - - - b179 - b179 - 19 - 1 - - - b180 - b180 - 20 - 1 - - - b181 - b181 - 21 - 1 - - - b182 - b182 - 22 - 1 - - - b183 - b183 - 23 - 1 - - - b184 - b184 - 24 - 1 - - - b185 - b185 - 25 - 1 - - - b186 - b186 - 26 - 1 - - - b187 - b187 - 27 - 1 - - - b188 - b188 - 28 - 1 - - - b189 - b189 - 29 - 1 - - - b190 - b190 - 30 - 1 - - - b191 - b191 - 31 - 1 - - - - - K1RR - K1RR - key registers - 0x2C - 0x20 - write-only - 0x00000000 - - - b128 - b128 - 0 - 1 - - - b129 - b129 - 1 - 1 - - - b130 - b130 - 2 - 1 - - - b131 - b131 - 3 - 1 - - - b132 - b132 - 4 - 1 - - - b133 - b133 - 5 - 1 - - - b134 - b134 - 6 - 1 - - - b135 - b135 - 7 - 1 - - - b136 - b136 - 8 - 1 - - - b137 - b137 - 9 - 1 - - - b138 - b138 - 10 - 1 - - - b139 - b139 - 11 - 1 - - - b140 - b140 - 12 - 1 - - - b141 - b141 - 13 - 1 - - - b142 - b142 - 14 - 1 - - - b143 - b143 - 15 - 1 - - - b144 - b144 - 16 - 1 - - - b145 - b145 - 17 - 1 - - - b146 - b146 - 18 - 1 - - - b147 - b147 - 19 - 1 - - - b148 - b148 - 20 - 1 - - - b149 - b149 - 21 - 1 - - - b150 - b150 - 22 - 1 - - - b151 - b151 - 23 - 1 - - - b152 - b152 - 24 - 1 - - - b153 - b153 - 25 - 1 - - - b154 - b154 - 26 - 1 - - - b155 - b155 - 27 - 1 - - - b156 - b156 - 28 - 1 - - - b157 - b157 - 29 - 1 - - - b158 - b158 - 30 - 1 - - - b159 - b159 - 31 - 1 - - - - - K2LR - K2LR - key registers - 0x30 - 0x20 - write-only - 0x00000000 - - - b96 - b96 - 0 - 1 - - - b97 - b97 - 1 - 1 - - - b98 - b98 - 2 - 1 - - - b99 - b99 - 3 - 1 - - - b100 - b100 - 4 - 1 - - - b101 - b101 - 5 - 1 - - - b102 - b102 - 6 - 1 - - - b103 - b103 - 7 - 1 - - - b104 - b104 - 8 - 1 - - - b105 - b105 - 9 - 1 - - - b106 - b106 - 10 - 1 - - - b107 - b107 - 11 - 1 - - - b108 - b108 - 12 - 1 - - - b109 - b109 - 13 - 1 - - - b110 - b110 - 14 - 1 - - - b111 - b111 - 15 - 1 - - - b112 - b112 - 16 - 1 - - - b113 - b113 - 17 - 1 - - - b114 - b114 - 18 - 1 - - - b115 - b115 - 19 - 1 - - - b116 - b116 - 20 - 1 - - - b117 - b117 - 21 - 1 - - - b118 - b118 - 22 - 1 - - - b119 - b119 - 23 - 1 - - - b120 - b120 - 24 - 1 - - - b121 - b121 - 25 - 1 - - - b122 - b122 - 26 - 1 - - - b123 - b123 - 27 - 1 - - - b124 - b124 - 28 - 1 - - - b125 - b125 - 29 - 1 - - - b126 - b126 - 30 - 1 - - - b127 - b127 - 31 - 1 - - - - - K2RR - K2RR - key registers - 0x34 - 0x20 - write-only - 0x00000000 - - - b64 - b64 - 0 - 1 - - - b65 - b65 - 1 - 1 - - - b66 - b66 - 2 - 1 - - - b67 - b67 - 3 - 1 - - - b68 - b68 - 4 - 1 - - - b69 - b69 - 5 - 1 - - - b70 - b70 - 6 - 1 - - - b71 - b71 - 7 - 1 - - - b72 - b72 - 8 - 1 - - - b73 - b73 - 9 - 1 - - - b74 - b74 - 10 - 1 - - - b75 - b75 - 11 - 1 - - - b76 - b76 - 12 - 1 - - - b77 - b77 - 13 - 1 - - - b78 - b78 - 14 - 1 - - - b79 - b79 - 15 - 1 - - - b80 - b80 - 16 - 1 - - - b81 - b81 - 17 - 1 - - - b82 - b82 - 18 - 1 - - - b83 - b83 - 19 - 1 - - - b84 - b84 - 20 - 1 - - - b85 - b85 - 21 - 1 - - - b86 - b86 - 22 - 1 - - - b87 - b87 - 23 - 1 - - - b88 - b88 - 24 - 1 - - - b89 - b89 - 25 - 1 - - - b90 - b90 - 26 - 1 - - - b91 - b91 - 27 - 1 - - - b92 - b92 - 28 - 1 - - - b93 - b93 - 29 - 1 - - - b94 - b94 - 30 - 1 - - - b95 - b95 - 31 - 1 - - - - - K3LR - K3LR - key registers - 0x38 - 0x20 - write-only - 0x00000000 - - - b32 - b32 - 0 - 1 - - - b33 - b33 - 1 - 1 - - - b34 - b34 - 2 - 1 - - - b35 - b35 - 3 - 1 - - - b36 - b36 - 4 - 1 - - - b37 - b37 - 5 - 1 - - - b38 - b38 - 6 - 1 - - - b39 - b39 - 7 - 1 - - - b40 - b40 - 8 - 1 - - - b41 - b41 - 9 - 1 - - - b42 - b42 - 10 - 1 - - - b43 - b43 - 11 - 1 - - - b44 - b44 - 12 - 1 - - - b45 - b45 - 13 - 1 - - - b46 - b46 - 14 - 1 - - - b47 - b47 - 15 - 1 - - - b48 - b48 - 16 - 1 - - - b49 - b49 - 17 - 1 - - - b50 - b50 - 18 - 1 - - - b51 - b51 - 19 - 1 - - - b52 - b52 - 20 - 1 - - - b53 - b53 - 21 - 1 - - - b54 - b54 - 22 - 1 - - - b55 - b55 - 23 - 1 - - - b56 - b56 - 24 - 1 - - - b57 - b57 - 25 - 1 - - - b58 - b58 - 26 - 1 - - - b59 - b59 - 27 - 1 - - - b60 - b60 - 28 - 1 - - - b61 - b61 - 29 - 1 - - - b62 - b62 - 30 - 1 - - - b63 - b63 - 31 - 1 - - - - - K3RR - K3RR - key registers - 0x3C - 0x20 - write-only - 0x00000000 - - - b0 - b0 - 0 - 1 - - - b1 - b1 - 1 - 1 - - - b2 - b2 - 2 - 1 - - - b3 - b3 - 3 - 1 - - - b4 - b4 - 4 - 1 - - - b5 - b5 - 5 - 1 - - - b6 - b6 - 6 - 1 - - - b7 - b7 - 7 - 1 - - - b8 - b8 - 8 - 1 - - - b9 - b9 - 9 - 1 - - - b10 - b10 - 10 - 1 - - - b11 - b11 - 11 - 1 - - - b12 - b12 - 12 - 1 - - - b13 - b13 - 13 - 1 - - - b14 - b14 - 14 - 1 - - - b15 - b15 - 15 - 1 - - - b16 - b16 - 16 - 1 - - - b17 - b17 - 17 - 1 - - - b18 - b18 - 18 - 1 - - - b19 - b19 - 19 - 1 - - - b20 - b20 - 20 - 1 - - - b21 - b21 - 21 - 1 - - - b22 - b22 - 22 - 1 - - - b23 - b23 - 23 - 1 - - - b24 - b24 - 24 - 1 - - - b25 - b25 - 25 - 1 - - - b26 - b26 - 26 - 1 - - - b27 - b27 - 27 - 1 - - - b28 - b28 - 28 - 1 - - - b29 - b29 - 29 - 1 - - - b30 - b30 - 30 - 1 - - - b31 - b31 - 31 - 1 - - - - - IV0LR - IV0LR - initialization vector - registers - 0x40 - 0x20 - read-write - 0x00000000 - - - IV31 - IV31 - 0 - 1 - - - IV30 - IV30 - 1 - 1 - - - IV29 - IV29 - 2 - 1 - - - IV28 - IV28 - 3 - 1 - - - IV27 - IV27 - 4 - 1 - - - IV26 - IV26 - 5 - 1 - - - IV25 - IV25 - 6 - 1 - - - IV24 - IV24 - 7 - 1 - - - IV23 - IV23 - 8 - 1 - - - IV22 - IV22 - 9 - 1 - - - IV21 - IV21 - 10 - 1 - - - IV20 - IV20 - 11 - 1 - - - IV19 - IV19 - 12 - 1 - - - IV18 - IV18 - 13 - 1 - - - IV17 - IV17 - 14 - 1 - - - IV16 - IV16 - 15 - 1 - - - IV15 - IV15 - 16 - 1 - - - IV14 - IV14 - 17 - 1 - - - IV13 - IV13 - 18 - 1 - - - IV12 - IV12 - 19 - 1 - - - IV11 - IV11 - 20 - 1 - - - IV10 - IV10 - 21 - 1 - - - IV9 - IV9 - 22 - 1 - - - IV8 - IV8 - 23 - 1 - - - IV7 - IV7 - 24 - 1 - - - IV6 - IV6 - 25 - 1 - - - IV5 - IV5 - 26 - 1 - - - IV4 - IV4 - 27 - 1 - - - IV3 - IV3 - 28 - 1 - - - IV2 - IV2 - 29 - 1 - - - IV1 - IV1 - 30 - 1 - - - IV0 - IV0 - 31 - 1 - - - - - IV0RR - IV0RR - initialization vector - registers - 0x44 - 0x20 - read-write - 0x00000000 - - - IV63 - IV63 - 0 - 1 - - - IV62 - IV62 - 1 - 1 - - - IV61 - IV61 - 2 - 1 - - - IV60 - IV60 - 3 - 1 - - - IV59 - IV59 - 4 - 1 - - - IV58 - IV58 - 5 - 1 - - - IV57 - IV57 - 6 - 1 - - - IV56 - IV56 - 7 - 1 - - - IV55 - IV55 - 8 - 1 - - - IV54 - IV54 - 9 - 1 - - - IV53 - IV53 - 10 - 1 - - - IV52 - IV52 - 11 - 1 - - - IV51 - IV51 - 12 - 1 - - - IV50 - IV50 - 13 - 1 - - - IV49 - IV49 - 14 - 1 - - - IV48 - IV48 - 15 - 1 - - - IV47 - IV47 - 16 - 1 - - - IV46 - IV46 - 17 - 1 - - - IV45 - IV45 - 18 - 1 - - - IV44 - IV44 - 19 - 1 - - - IV43 - IV43 - 20 - 1 - - - IV42 - IV42 - 21 - 1 - - - IV41 - IV41 - 22 - 1 - - - IV40 - IV40 - 23 - 1 - - - IV39 - IV39 - 24 - 1 - - - IV38 - IV38 - 25 - 1 - - - IV37 - IV37 - 26 - 1 - - - IV36 - IV36 - 27 - 1 - - - IV35 - IV35 - 28 - 1 - - - IV34 - IV34 - 29 - 1 - - - IV33 - IV33 - 30 - 1 - - - IV32 - IV32 - 31 - 1 - - - - - IV1LR - IV1LR - initialization vector - registers - 0x48 - 0x20 - read-write - 0x00000000 - - - IV95 - IV95 - 0 - 1 - - - IV94 - IV94 - 1 - 1 - - - IV93 - IV93 - 2 - 1 - - - IV92 - IV92 - 3 - 1 - - - IV91 - IV91 - 4 - 1 - - - IV90 - IV90 - 5 - 1 - - - IV89 - IV89 - 6 - 1 - - - IV88 - IV88 - 7 - 1 - - - IV87 - IV87 - 8 - 1 - - - IV86 - IV86 - 9 - 1 - - - IV85 - IV85 - 10 - 1 - - - IV84 - IV84 - 11 - 1 - - - IV83 - IV83 - 12 - 1 - - - IV82 - IV82 - 13 - 1 - - - IV81 - IV81 - 14 - 1 - - - IV80 - IV80 - 15 - 1 - - - IV79 - IV79 - 16 - 1 - - - IV78 - IV78 - 17 - 1 - - - IV77 - IV77 - 18 - 1 - - - IV76 - IV76 - 19 - 1 - - - IV75 - IV75 - 20 - 1 - - - IV74 - IV74 - 21 - 1 - - - IV73 - IV73 - 22 - 1 - - - IV72 - IV72 - 23 - 1 - - - IV71 - IV71 - 24 - 1 - - - IV70 - IV70 - 25 - 1 - - - IV69 - IV69 - 26 - 1 - - - IV68 - IV68 - 27 - 1 - - - IV67 - IV67 - 28 - 1 - - - IV66 - IV66 - 29 - 1 - - - IV65 - IV65 - 30 - 1 - - - IV64 - IV64 - 31 - 1 - - - - - IV1RR - IV1RR - initialization vector - registers - 0x4C - 0x20 - read-write - 0x00000000 - - - IV127 - IV127 - 0 - 1 - - - IV126 - IV126 - 1 - 1 - - - IV125 - IV125 - 2 - 1 - - - IV124 - IV124 - 3 - 1 - - - IV123 - IV123 - 4 - 1 - - - IV122 - IV122 - 5 - 1 - - - IV121 - IV121 - 6 - 1 - - - IV120 - IV120 - 7 - 1 - - - IV119 - IV119 - 8 - 1 - - - IV118 - IV118 - 9 - 1 - - - IV117 - IV117 - 10 - 1 - - - IV116 - IV116 - 11 - 1 - - - IV115 - IV115 - 12 - 1 - - - IV114 - IV114 - 13 - 1 - - - IV113 - IV113 - 14 - 1 - - - IV112 - IV112 - 15 - 1 - - - IV111 - IV111 - 16 - 1 - - - IV110 - IV110 - 17 - 1 - - - IV109 - IV109 - 18 - 1 - - - IV108 - IV108 - 19 - 1 - - - IV107 - IV107 - 20 - 1 - - - IV106 - IV106 - 21 - 1 - - - IV105 - IV105 - 22 - 1 - - - IV104 - IV104 - 23 - 1 - - - IV103 - IV103 - 24 - 1 - - - IV102 - IV102 - 25 - 1 - - - IV101 - IV101 - 26 - 1 - - - IV100 - IV100 - 27 - 1 - - - IV99 - IV99 - 28 - 1 - - - IV98 - IV98 - 29 - 1 - - - IV97 - IV97 - 30 - 1 - - - IV96 - IV96 - 31 - 1 - - - - - CSGCMCCM0R - CSGCMCCM0R - context swap register - 0x50 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM0R - CSGCMCCM0R - 0 - 32 - - - - - CSGCMCCM1R - CSGCMCCM1R - context swap register - 0x54 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM1R - CSGCMCCM1R - 0 - 32 - - - - - CSGCMCCM2R - CSGCMCCM2R - context swap register - 0x58 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM2R - CSGCMCCM2R - 0 - 32 - - - - - CSGCMCCM3R - CSGCMCCM3R - context swap register - 0x5C - 0x20 - read-write - 0x00000000 - - - CSGCMCCM3R - CSGCMCCM3R - 0 - 32 - - - - - CSGCMCCM4R - CSGCMCCM4R - context swap register - 0x60 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM4R - CSGCMCCM4R - 0 - 32 - - - - - CSGCMCCM5R - CSGCMCCM5R - context swap register - 0x64 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM5R - CSGCMCCM5R - 0 - 32 - - - - - CSGCMCCM6R - CSGCMCCM6R - context swap register - 0x68 - 0x20 - read-write - 0x00000000 - - - CSGCMCCM6R - CSGCMCCM6R - 0 - 32 - - - - - CSGCMCCM7R - CSGCMCCM7R - context swap register - 0x6C - 0x20 - read-write - 0x00000000 - - - CSGCMCCM7R - CSGCMCCM7R - 0 - 32 - - - - - CSGCM0R - CSGCM0R - context swap register - 0x70 - 0x20 - read-write - 0x00000000 - - - CSGCM0R - CSGCM0R - 0 - 32 - - - - - CSGCM1R - CSGCM1R - context swap register - 0x74 - 0x20 - read-write - 0x00000000 - - - CSGCM1R - CSGCM1R - 0 - 32 - - - - - CSGCM2R - CSGCM2R - context swap register - 0x78 - 0x20 - read-write - 0x00000000 - - - CSGCM2R - CSGCM2R - 0 - 32 - - - - - CSGCM3R - CSGCM3R - context swap register - 0x7C - 0x20 - read-write - 0x00000000 - - - CSGCM3R - CSGCM3R - 0 - 32 - - - - - CSGCM4R - CSGCM4R - context swap register - 0x80 - 0x20 - read-write - 0x00000000 - - - CSGCM4R - CSGCM4R - 0 - 32 - - - - - CSGCM5R - CSGCM5R - context swap register - 0x84 - 0x20 - read-write - 0x00000000 - - - CSGCM5R - CSGCM5R - 0 - 32 - - - - - CSGCM6R - CSGCM6R - context swap register - 0x88 - 0x20 - read-write - 0x00000000 - - - CSGCM6R - CSGCM6R - 0 - 32 - - - - - CSGCM7R - CSGCM7R - context swap register - 0x8C - 0x20 - read-write - 0x00000000 - - - CSGCM7R - CSGCM7R - 0 - 32 - - - - - - - FPU - Floting point unit - FPU - 0xE000EF34 - - 0x0 - 0xD - registers - - - FPU - Floating point unit interrupt - 81 - - - FPU - Floating point interrupt - 81 - - - - FPCCR - FPCCR - Floating-point context control - register - 0x0 - 0x20 - read-write - 0x00000000 - - - LSPACT - LSPACT - 0 - 1 - - - USER - USER - 1 - 1 - - - THREAD - THREAD - 3 - 1 - - - HFRDY - HFRDY - 4 - 1 - - - MMRDY - MMRDY - 5 - 1 - - - BFRDY - BFRDY - 6 - 1 - - - MONRDY - MONRDY - 8 - 1 - - - LSPEN - LSPEN - 30 - 1 - - - ASPEN - ASPEN - 31 - 1 - - - - - FPCAR - FPCAR - Floating-point context address - register - 0x4 - 0x20 - read-write - 0x00000000 - - - ADDRESS - Location of unpopulated - floating-point - 3 - 29 - - - - - FPSCR - FPSCR - Floating-point status control - register - 0x8 - 0x20 - read-write - 0x00000000 - - - IOC - Invalid operation cumulative exception - bit - 0 - 1 - - - DZC - Division by zero cumulative exception - bit. - 1 - 1 - - - OFC - Overflow cumulative exception - bit - 2 - 1 - - - UFC - Underflow cumulative exception - bit - 3 - 1 - - - IXC - Inexact cumulative exception - bit - 4 - 1 - - - IDC - Input denormal cumulative exception - bit. - 7 - 1 - - - RMode - Rounding Mode control - field - 22 - 2 - - - FZ - Flush-to-zero mode control - bit: - 24 - 1 - - - DN - Default NaN mode control - bit - 25 - 1 - - - AHP - Alternative half-precision control - bit - 26 - 1 - - - V - Overflow condition code - flag - 28 - 1 - - - C - Carry condition code flag - 29 - 1 - - - Z - Zero condition code flag - 30 - 1 - - - N - Negative condition code - flag - 31 - 1 - - - - - - - MPU - Memory protection unit - MPU - 0xE000ED90 - - 0x0 - 0x15 - registers - - - - MPU_TYPER - MPU_TYPER - MPU type register - 0x0 - 0x20 - read-only - 0X00000800 - - - SEPARATE - Separate flag - 0 - 1 - - - DREGION - Number of MPU data regions - 8 - 8 - - - IREGION - Number of MPU instruction - regions - 16 - 8 - - - - - MPU_CTRL - MPU_CTRL - MPU control register - 0x4 - 0x20 - read-only - 0X00000000 - - - ENABLE - Enables the MPU - 0 - 1 - - - HFNMIENA - Enables the operation of MPU during hard - fault - 1 - 1 - - - PRIVDEFENA - Enable priviliged software access to - default memory map - 2 - 1 - - - - - MPU_RNR - MPU_RNR - MPU region number register - 0x8 - 0x20 - read-write - 0X00000000 - - - REGION - MPU region - 0 - 8 - - - - - MPU_RBAR - MPU_RBAR - MPU region base address - register - 0xC - 0x20 - read-write - 0X00000000 - - - REGION - MPU region field - 0 - 4 - - - VALID - MPU region number valid - 4 - 1 - - - ADDR - Region base address field - 5 - 27 - - - - - MPU_RASR - MPU_RASR - MPU region attribute and size - register - 0x10 - 0x20 - read-write - 0X00000000 - - - ENABLE - Region enable bit. - 0 - 1 - - - SIZE - Size of the MPU protection - region - 1 - 5 - - - SRD - Subregion disable bits - 8 - 8 - - - B - memory attribute - 16 - 1 - - - C - memory attribute - 17 - 1 - - - S - Shareable memory attribute - 18 - 1 - - - TEX - memory attribute - 19 - 3 - - - AP - Access permission - 24 - 3 - - - XN - Instruction access disable - bit - 28 - 1 - - - - - - - STK - SysTick timer - STK - 0xE000E010 - - 0x0 - 0x11 - registers - - - - CTRL - CTRL - SysTick control and status - register - 0x0 - 0x20 - read-write - 0X00000000 - - - ENABLE - Counter enable - 0 - 1 - - - TICKINT - SysTick exception request - enable - 1 - 1 - - - CLKSOURCE - Clock source selection - 2 - 1 - - - COUNTFLAG - COUNTFLAG - 16 - 1 - - - - - LOAD - LOAD - SysTick reload value register - 0x4 - 0x20 - read-write - 0X00000000 - - - RELOAD - RELOAD value - 0 - 24 - - - - - VAL - VAL - SysTick current value register - 0x8 - 0x20 - read-write - 0X00000000 - - - CURRENT - Current counter value - 0 - 24 - - - - - CALIB - CALIB - SysTick calibration value - register - 0xC - 0x20 - read-write - 0X00000000 - - - TENMS - Calibration value - 0 - 24 - - - SKEW - SKEW flag: Indicates whether the TENMS - value is exact - 30 - 1 - - - NOREF - NOREF flag. Reads as zero - 31 - 1 - - - - - - - SCB - System control block - SCB - 0xE000ED00 - - 0x0 - 0x41 - registers - - - - CPUID - CPUID - CPUID base register - 0x0 - 0x20 - read-only - 0x410FC241 - - - Revision - Revision number - 0 - 4 - - - PartNo - Part number of the - processor - 4 - 12 - - - Constant - Reads as 0xF - 16 - 4 - - - Variant - Variant number - 20 - 4 - - - Implementer - Implementer code - 24 - 8 - - - - - ICSR - ICSR - Interrupt control and state - register - 0x4 - 0x20 - read-write - 0x00000000 - - - VECTACTIVE - Active vector - 0 - 9 - - - RETTOBASE - Return to base level - 11 - 1 - - - VECTPENDING - Pending vector - 12 - 7 - - - ISRPENDING - Interrupt pending flag - 22 - 1 - - - PENDSTCLR - SysTick exception clear-pending - bit - 25 - 1 - - - PENDSTSET - SysTick exception set-pending - bit - 26 - 1 - - - PENDSVCLR - PendSV clear-pending bit - 27 - 1 - - - PENDSVSET - PendSV set-pending bit - 28 - 1 - - - NMIPENDSET - NMI set-pending bit. - 31 - 1 - - - - - VTOR - VTOR - Vector table offset register - 0x8 - 0x20 - read-write - 0x00000000 - - - TBLOFF - Vector table base offset - field - 9 - 21 - - - - - AIRCR - AIRCR - Application interrupt and reset control - register - 0xC - 0x20 - read-write - 0x00000000 - - - VECTRESET - VECTRESET - 0 - 1 - - - VECTCLRACTIVE - VECTCLRACTIVE - 1 - 1 - - - SYSRESETREQ - SYSRESETREQ - 2 - 1 - - - PRIGROUP - PRIGROUP - 8 - 3 - - - ENDIANESS - ENDIANESS - 15 - 1 - - - VECTKEYSTAT - Register key - 16 - 16 - - - - - SCR - SCR - System control register - 0x10 - 0x20 - read-write - 0x00000000 - - - SLEEPONEXIT - SLEEPONEXIT - 1 - 1 - - - SLEEPDEEP - SLEEPDEEP - 2 - 1 - - - SEVEONPEND - Send Event on Pending bit - 4 - 1 - - - - - CCR - CCR - Configuration and control - register - 0x14 - 0x20 - read-write - 0x00000000 - - - NONBASETHRDENA - Configures how the processor enters - Thread mode - 0 - 1 - - - USERSETMPEND - USERSETMPEND - 1 - 1 - - - UNALIGN__TRP - UNALIGN_ TRP - 3 - 1 - - - DIV_0_TRP - DIV_0_TRP - 4 - 1 - - - BFHFNMIGN - BFHFNMIGN - 8 - 1 - - - STKALIGN - STKALIGN - 9 - 1 - - - - - SHPR1 - SHPR1 - System handler priority - registers - 0x18 - 0x20 - read-write - 0x00000000 - - - PRI_4 - Priority of system handler - 4 - 0 - 8 - - - PRI_5 - Priority of system handler - 5 - 8 - 8 - - - PRI_6 - Priority of system handler - 6 - 16 - 8 - - - - - SHPR2 - SHPR2 - System handler priority - registers - 0x1C - 0x20 - read-write - 0x00000000 - - - PRI_11 - Priority of system handler - 11 - 24 - 8 - - - - - SHPR3 - SHPR3 - System handler priority - registers - 0x20 - 0x20 - read-write - 0x00000000 - - - PRI_14 - Priority of system handler - 14 - 16 - 8 - - - PRI_15 - Priority of system handler - 15 - 24 - 8 - - - - - SHCRS - SHCRS - System handler control and state - register - 0x24 - 0x20 - read-write - 0x00000000 - - - MEMFAULTACT - Memory management fault exception active - bit - 0 - 1 - - - BUSFAULTACT - Bus fault exception active - bit - 1 - 1 - - - USGFAULTACT - Usage fault exception active - bit - 3 - 1 - - - SVCALLACT - SVC call active bit - 7 - 1 - - - MONITORACT - Debug monitor active bit - 8 - 1 - - - PENDSVACT - PendSV exception active - bit - 10 - 1 - - - SYSTICKACT - SysTick exception active - bit - 11 - 1 - - - USGFAULTPENDED - Usage fault exception pending - bit - 12 - 1 - - - MEMFAULTPENDED - Memory management fault exception - pending bit - 13 - 1 - - - BUSFAULTPENDED - Bus fault exception pending - bit - 14 - 1 - - - SVCALLPENDED - SVC call pending bit - 15 - 1 - - - MEMFAULTENA - Memory management fault enable - bit - 16 - 1 - - - BUSFAULTENA - Bus fault enable bit - 17 - 1 - - - USGFAULTENA - Usage fault enable bit - 18 - 1 - - - - - CFSR_UFSR_BFSR_MMFSR - CFSR_UFSR_BFSR_MMFSR - Configurable fault status - register - 0x28 - 0x20 - read-write - 0x00000000 - - - IACCVIOL - Instruction access violation - flag - 1 - 1 - - - MUNSTKERR - Memory manager fault on unstacking for a - return from exception - 3 - 1 - - - MSTKERR - Memory manager fault on stacking for - exception entry. - 4 - 1 - - - MLSPERR - MLSPERR - 5 - 1 - - - MMARVALID - Memory Management Fault Address Register - (MMAR) valid flag - 7 - 1 - - - IBUSERR - Instruction bus error - 8 - 1 - - - PRECISERR - Precise data bus error - 9 - 1 - - - IMPRECISERR - Imprecise data bus error - 10 - 1 - - - UNSTKERR - Bus fault on unstacking for a return - from exception - 11 - 1 - - - STKERR - Bus fault on stacking for exception - entry - 12 - 1 - - - LSPERR - Bus fault on floating-point lazy state - preservation - 13 - 1 - - - BFARVALID - Bus Fault Address Register (BFAR) valid - flag - 15 - 1 - - - UNDEFINSTR - Undefined instruction usage - fault - 16 - 1 - - - INVSTATE - Invalid state usage fault - 17 - 1 - - - INVPC - Invalid PC load usage - fault - 18 - 1 - - - NOCP - No coprocessor usage - fault. - 19 - 1 - - - UNALIGNED - Unaligned access usage - fault - 24 - 1 - - - DIVBYZERO - Divide by zero usage fault - 25 - 1 - - - - - HFSR - HFSR - Hard fault status register - 0x2C - 0x20 - read-write - 0x00000000 - - - VECTTBL - Vector table hard fault - 1 - 1 - - - FORCED - Forced hard fault - 30 - 1 - - - DEBUG_VT - Reserved for Debug use - 31 - 1 - - - - - MMFAR - MMFAR - Memory management fault address - register - 0x34 - 0x20 - read-write - 0x00000000 - - - MMFAR - Memory management fault - address - 0 - 32 - - - - - BFAR - BFAR - Bus fault address register - 0x38 - 0x20 - read-write - 0x00000000 - - - BFAR - Bus fault address - 0 - 32 - - - - - AFSR - AFSR - Auxiliary fault status - register - 0x3C - 0x20 - read-write - 0x00000000 - - - IMPDEF - Implementation defined - 0 - 32 - - - - - - - NVIC_STIR - Nested vectored interrupt - controller - NVIC - 0xE000EF00 - - 0x0 - 0x5 - registers - - - - STIR - STIR - Software trigger interrupt - register - 0x0 - 0x20 - read-write - 0x00000000 - - - INTID - Software generated interrupt - ID - 0 - 9 - - - - - - - FPU_CPACR - Floating point unit CPACR - FPU - 0xE000ED88 - - 0x0 - 0x5 - registers - - - - CPACR - CPACR - Coprocessor access control - register - 0x0 - 0x20 - read-write - 0x0000000 - - - CP - CP - 20 - 4 - - - - - - - SCB_ACTRL - System control block ACTLR - SCB - 0xE000E008 - - 0x0 - 0x5 - registers - - - - ACTRL - ACTRL - Auxiliary control register - 0x0 - 0x20 - read-write - 0x00000000 - - - DISMCYCINT - DISMCYCINT - 0 - 1 - - - DISDEFWBUF - DISDEFWBUF - 1 - 1 - - - DISFOLD - DISFOLD - 2 - 1 - - - DISFPCA - DISFPCA - 8 - 1 - - - DISOOFP - DISOOFP - 9 - 1 - - - - - - -