|
@ -3679,7 +3679,7 @@ void Stepper::report_positions() { |
|
|
void Stepper::microstep_ms(const uint8_t driver, const int8_t ms1, const int8_t ms2, const int8_t ms3) { |
|
|
void Stepper::microstep_ms(const uint8_t driver, const int8_t ms1, const int8_t ms2, const int8_t ms3) { |
|
|
if (ms1 >= 0) switch (driver) { |
|
|
if (ms1 >= 0) switch (driver) { |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
case 0: |
|
|
case X_AXIS: |
|
|
#if HAS_X_MS_PINS |
|
|
#if HAS_X_MS_PINS |
|
|
WRITE(X_MS1_PIN, ms1); |
|
|
WRITE(X_MS1_PIN, ms1); |
|
|
#endif |
|
|
#endif |
|
@ -3689,7 +3689,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
case 1: |
|
|
case Y_AXIS: |
|
|
#if HAS_Y_MS_PINS |
|
|
#if HAS_Y_MS_PINS |
|
|
WRITE(Y_MS1_PIN, ms1); |
|
|
WRITE(Y_MS1_PIN, ms1); |
|
|
#endif |
|
|
#endif |
|
@ -3699,7 +3699,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
case 2: |
|
|
case Z_AXIS: |
|
|
#if HAS_Z_MS_PINS |
|
|
#if HAS_Z_MS_PINS |
|
|
WRITE(Z_MS1_PIN, ms1); |
|
|
WRITE(Z_MS1_PIN, ms1); |
|
|
#endif |
|
|
#endif |
|
@ -3714,52 +3714,52 @@ void Stepper::report_positions() { |
|
|
#endif |
|
|
#endif |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
#if HAS_I_MS_PINS |
|
|
|
|
|
case I_AXIS: WRITE(I_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_J_MS_PINS |
|
|
|
|
|
case J_AXIS: WRITE(J_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_K_MS_PINS |
|
|
|
|
|
case K_AXIS: WRITE(K_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_U_MS_PINS |
|
|
|
|
|
case U_AXIS: WRITE(U_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_V_MS_PINS |
|
|
|
|
|
case V_AXIS: WRITE(V_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_W_MS_PINS |
|
|
|
|
|
case W_AXIS: WRITE(W_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
#if HAS_E0_MS_PINS |
|
|
#if HAS_E0_MS_PINS |
|
|
case 3: WRITE(E0_MS1_PIN, ms1); break; |
|
|
case E_AXIS: WRITE(E0_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E1_MS_PINS |
|
|
#if HAS_E1_MS_PINS |
|
|
case 4: WRITE(E1_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 1): WRITE(E1_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E2_MS_PINS |
|
|
#if HAS_E2_MS_PINS |
|
|
case 5: WRITE(E2_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 2): WRITE(E2_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E3_MS_PINS |
|
|
#if HAS_E3_MS_PINS |
|
|
case 6: WRITE(E3_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 3): WRITE(E3_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E4_MS_PINS |
|
|
#if HAS_E4_MS_PINS |
|
|
case 7: WRITE(E4_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 4): WRITE(E4_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E5_MS_PINS |
|
|
#if HAS_E5_MS_PINS |
|
|
case 8: WRITE(E5_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 5): WRITE(E5_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E6_MS_PINS |
|
|
#if HAS_E6_MS_PINS |
|
|
case 9: WRITE(E6_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 6): WRITE(E6_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E7_MS_PINS |
|
|
#if HAS_E7_MS_PINS |
|
|
case 10: WRITE(E7_MS1_PIN, ms1); break; |
|
|
case (E_AXIS + 7): WRITE(E7_MS1_PIN, ms1); break; |
|
|
#endif |
|
|
|
|
|
#if HAS_I_MS_PINS |
|
|
|
|
|
case 11: WRITE(I_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_J_MS_PINS |
|
|
|
|
|
case 12: WRITE(J_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_K_MS_PINS |
|
|
|
|
|
case 13: WRITE(K_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_U_MS_PINS |
|
|
|
|
|
case 14: WRITE(U_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_V_MS_PINS |
|
|
|
|
|
case 15: WRITE(V_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_W_MS_PINS |
|
|
|
|
|
case 16: WRITE(W_MS1_PIN, ms1); break |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
} |
|
|
} |
|
|
if (ms2 >= 0) switch (driver) { |
|
|
if (ms2 >= 0) switch (driver) { |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
case 0: |
|
|
case X_AXIS: |
|
|
#if HAS_X_MS_PINS |
|
|
#if HAS_X_MS_PINS |
|
|
WRITE(X_MS2_PIN, ms2); |
|
|
WRITE(X_MS2_PIN, ms2); |
|
|
#endif |
|
|
#endif |
|
@ -3769,7 +3769,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
case 1: |
|
|
case Y_AXIS: |
|
|
#if HAS_Y_MS_PINS |
|
|
#if HAS_Y_MS_PINS |
|
|
WRITE(Y_MS2_PIN, ms2); |
|
|
WRITE(Y_MS2_PIN, ms2); |
|
|
#endif |
|
|
#endif |
|
@ -3779,7 +3779,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
case 2: |
|
|
case Z_AXIS: |
|
|
#if HAS_Z_MS_PINS |
|
|
#if HAS_Z_MS_PINS |
|
|
WRITE(Z_MS2_PIN, ms2); |
|
|
WRITE(Z_MS2_PIN, ms2); |
|
|
#endif |
|
|
#endif |
|
@ -3794,52 +3794,52 @@ void Stepper::report_positions() { |
|
|
#endif |
|
|
#endif |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
#if HAS_I_MS_PINS |
|
|
|
|
|
case I_AXIS: WRITE(I_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_J_MS_PINS |
|
|
|
|
|
case J_AXIS: WRITE(J_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_K_MS_PINS |
|
|
|
|
|
case K_AXIS: WRITE(K_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_U_MS_PINS |
|
|
|
|
|
case U_AXIS: WRITE(U_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_V_MS_PINS |
|
|
|
|
|
case V_AXIS: WRITE(V_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_W_MS_PINS |
|
|
|
|
|
case W_AXIS: WRITE(W_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
#if HAS_E0_MS_PINS |
|
|
#if HAS_E0_MS_PINS |
|
|
case 3: WRITE(E0_MS2_PIN, ms2); break; |
|
|
case E_AXIS: WRITE(E0_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E1_MS_PINS |
|
|
#if HAS_E1_MS_PINS |
|
|
case 4: WRITE(E1_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 1): WRITE(E1_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E2_MS_PINS |
|
|
#if HAS_E2_MS_PINS |
|
|
case 5: WRITE(E2_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 2): WRITE(E2_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E3_MS_PINS |
|
|
#if HAS_E3_MS_PINS |
|
|
case 6: WRITE(E3_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 3): WRITE(E3_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E4_MS_PINS |
|
|
#if HAS_E4_MS_PINS |
|
|
case 7: WRITE(E4_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 4): WRITE(E4_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E5_MS_PINS |
|
|
#if HAS_E5_MS_PINS |
|
|
case 8: WRITE(E5_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 5): WRITE(E5_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E6_MS_PINS |
|
|
#if HAS_E6_MS_PINS |
|
|
case 9: WRITE(E6_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 6): WRITE(E6_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E7_MS_PINS |
|
|
#if HAS_E7_MS_PINS |
|
|
case 10: WRITE(E7_MS2_PIN, ms2); break; |
|
|
case (E_AXIS + 7): WRITE(E7_MS2_PIN, ms2); break; |
|
|
#endif |
|
|
|
|
|
#if HAS_I_MS_PINS |
|
|
|
|
|
case 11: WRITE(I_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_J_MS_PINS |
|
|
|
|
|
case 12: WRITE(J_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_K_MS_PINS |
|
|
|
|
|
case 13: WRITE(K_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_U_MS_PINS |
|
|
|
|
|
case 14: WRITE(U_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_V_MS_PINS |
|
|
|
|
|
case 15: WRITE(V_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_W_MS_PINS |
|
|
|
|
|
case 16: WRITE(W_MS2_PIN, ms2); break |
|
|
|
|
|
#endif |
|
|
#endif |
|
|
} |
|
|
} |
|
|
if (ms3 >= 0) switch (driver) { |
|
|
if (ms3 >= 0) switch (driver) { |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
#if HAS_X_MS_PINS || HAS_X2_MS_PINS |
|
|
case 0: |
|
|
case X_AXIS: |
|
|
#if HAS_X_MS_PINS && PIN_EXISTS(X_MS3) |
|
|
#if HAS_X_MS_PINS && PIN_EXISTS(X_MS3) |
|
|
WRITE(X_MS3_PIN, ms3); |
|
|
WRITE(X_MS3_PIN, ms3); |
|
|
#endif |
|
|
#endif |
|
@ -3849,7 +3849,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
#if HAS_Y_MS_PINS || HAS_Y2_MS_PINS |
|
|
case 1: |
|
|
case Y_AXIS: |
|
|
#if HAS_Y_MS_PINS && PIN_EXISTS(Y_MS3) |
|
|
#if HAS_Y_MS_PINS && PIN_EXISTS(Y_MS3) |
|
|
WRITE(Y_MS3_PIN, ms3); |
|
|
WRITE(Y_MS3_PIN, ms3); |
|
|
#endif |
|
|
#endif |
|
@ -3859,7 +3859,7 @@ void Stepper::report_positions() { |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
#if HAS_SOME_Z_MS_PINS |
|
|
case 2: |
|
|
case Z_AXIS: |
|
|
#if HAS_Z_MS_PINS && PIN_EXISTS(Z_MS3) |
|
|
#if HAS_Z_MS_PINS && PIN_EXISTS(Z_MS3) |
|
|
WRITE(Z_MS3_PIN, ms3); |
|
|
WRITE(Z_MS3_PIN, ms3); |
|
|
#endif |
|
|
#endif |
|
@ -3874,29 +3874,47 @@ void Stepper::report_positions() { |
|
|
#endif |
|
|
#endif |
|
|
break; |
|
|
break; |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
#if HAS_I_MS_PINS |
|
|
|
|
|
case I_AXIS: WRITE(I_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_J_MS_PINS |
|
|
|
|
|
case J_AXIS: WRITE(J_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_K_MS_PINS |
|
|
|
|
|
case K_AXIS: WRITE(K_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_U_MS_PINS |
|
|
|
|
|
case U_AXIS: WRITE(U_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_V_MS_PINS |
|
|
|
|
|
case V_AXIS: WRITE(V_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
|
|
|
#if HAS_W_MS_PINS |
|
|
|
|
|
case W_AXIS: WRITE(W_MS3_PIN, ms3); break |
|
|
|
|
|
#endif |
|
|
#if HAS_E0_MS_PINS && PIN_EXISTS(E0_MS3) |
|
|
#if HAS_E0_MS_PINS && PIN_EXISTS(E0_MS3) |
|
|
case 3: WRITE(E0_MS3_PIN, ms3); break; |
|
|
case E_AXIS: WRITE(E0_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E1_MS_PINS && PIN_EXISTS(E1_MS3) |
|
|
#if HAS_E1_MS_PINS && PIN_EXISTS(E1_MS3) |
|
|
case 4: WRITE(E1_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 1): WRITE(E1_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E2_MS_PINS && PIN_EXISTS(E2_MS3) |
|
|
#if HAS_E2_MS_PINS && PIN_EXISTS(E2_MS3) |
|
|
case 5: WRITE(E2_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 2): WRITE(E2_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E3_MS_PINS && PIN_EXISTS(E3_MS3) |
|
|
#if HAS_E3_MS_PINS && PIN_EXISTS(E3_MS3) |
|
|
case 6: WRITE(E3_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 3): WRITE(E3_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E4_MS_PINS && PIN_EXISTS(E4_MS3) |
|
|
#if HAS_E4_MS_PINS && PIN_EXISTS(E4_MS3) |
|
|
case 7: WRITE(E4_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 4): WRITE(E4_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E5_MS_PINS && PIN_EXISTS(E5_MS3) |
|
|
#if HAS_E5_MS_PINS && PIN_EXISTS(E5_MS3) |
|
|
case 8: WRITE(E5_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 5): WRITE(E5_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E6_MS_PINS && PIN_EXISTS(E6_MS3) |
|
|
#if HAS_E6_MS_PINS && PIN_EXISTS(E6_MS3) |
|
|
case 9: WRITE(E6_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 6): WRITE(E6_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
#if HAS_E7_MS_PINS && PIN_EXISTS(E7_MS3) |
|
|
#if HAS_E7_MS_PINS && PIN_EXISTS(E7_MS3) |
|
|
case 10: WRITE(E7_MS3_PIN, ms3); break; |
|
|
case (E_AXIS + 7): WRITE(E7_MS3_PIN, ms3); break; |
|
|
#endif |
|
|
#endif |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|