|
|
|
@ -18,7 +18,7 @@ |
|
|
|
|
|
|
|
#ifdef TARGET_LPC1768 |
|
|
|
|
|
|
|
#include "../../../macros.h" |
|
|
|
#include "../../core/macros.h" |
|
|
|
#include "../HAL.h" |
|
|
|
#include "arduino.h" |
|
|
|
#include "pinmapping.h" |
|
|
|
@ -32,197 +32,159 @@ typedef void (*interruptCB)(void); |
|
|
|
static interruptCB callbacksP0[GNUM]; |
|
|
|
static interruptCB callbacksP2[GNUM]; |
|
|
|
|
|
|
|
extern "C" void GpioEnableInt(uint32_t port, uint32_t pin, uint32_t mode); |
|
|
|
extern "C" void GpioDisableInt(uint32_t port, uint32_t pin); |
|
|
|
extern "C" void GpioEnableInt(const uint32_t port, const uint32_t pin, const uint32_t mode); |
|
|
|
extern "C" void GpioDisableInt(const uint32_t port, const uint32_t pin); |
|
|
|
|
|
|
|
//void deadloop(void) {}
|
|
|
|
|
|
|
|
/* Configure PIO interrupt sources */ |
|
|
|
static void __initialize() { |
|
|
|
int i; |
|
|
|
for (i=0; i<GNUM; i++) { |
|
|
|
callbacksP0[i] = 0; |
|
|
|
callbacksP2[i] = 0; |
|
|
|
} |
|
|
|
NVIC_EnableIRQ(EINT3_IRQn); |
|
|
|
for (uint8_t i = 0; i < GNUM; i++) { |
|
|
|
callbacksP0[i] = 0; |
|
|
|
callbacksP2[i] = 0; |
|
|
|
} |
|
|
|
NVIC_EnableIRQ(EINT3_IRQn); |
|
|
|
} |
|
|
|
|
|
|
|
void attachInterrupt(uint32_t pin, void (*callback)(void), uint32_t mode) |
|
|
|
{ |
|
|
|
static int enabled = 0; |
|
|
|
|
|
|
|
if(!INTERRUPT_PIN(pin)) return; |
|
|
|
|
|
|
|
if (!enabled) { |
|
|
|
__initialize(); |
|
|
|
enabled = 1; |
|
|
|
} |
|
|
|
uint8_t myport = pin_map[pin].port; |
|
|
|
uint8_t mypin = pin_map[pin].pin; |
|
|
|
void attachInterrupt(const uint32_t pin, void (*callback)(void), uint32_t mode) { |
|
|
|
static int enabled = 0; |
|
|
|
|
|
|
|
if (!INTERRUPT_PIN(pin)) return; |
|
|
|
|
|
|
|
if (myport == 0 ) |
|
|
|
callbacksP0[mypin] = callback; |
|
|
|
else |
|
|
|
callbacksP2[mypin] = callback; |
|
|
|
if (!enabled) { |
|
|
|
__initialize(); |
|
|
|
++enabled; |
|
|
|
} |
|
|
|
uint8_t myport = pin_map[pin].port, |
|
|
|
mypin = pin_map[pin].pin; |
|
|
|
|
|
|
|
// Enable interrupt
|
|
|
|
GpioEnableInt(myport,mypin,mode); |
|
|
|
} |
|
|
|
if (myport == 0) |
|
|
|
callbacksP0[mypin] = callback; |
|
|
|
else |
|
|
|
callbacksP2[mypin] = callback; |
|
|
|
|
|
|
|
void detachInterrupt(uint32_t pin) |
|
|
|
{ |
|
|
|
if(!INTERRUPT_PIN(pin)) return; |
|
|
|
|
|
|
|
uint8_t myport = pin_map[pin].port; |
|
|
|
uint8_t mypin = pin_map[pin].pin; |
|
|
|
|
|
|
|
// Disable interrupt
|
|
|
|
GpioDisableInt(myport,mypin); |
|
|
|
|
|
|
|
//unset callback
|
|
|
|
if (myport == 0 ) |
|
|
|
callbacksP0[mypin] = 0; |
|
|
|
else //if (myport == 2 )
|
|
|
|
callbacksP2[mypin] = 0; |
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
extern "C" void GpioEnableInt(uint32_t port, uint32_t pin, uint32_t mode) { |
|
|
|
//pin here is the processor pin, not logical pin
|
|
|
|
if (port==0) { |
|
|
|
LPC_GPIOINT->IO0IntClr = (1 << pin); |
|
|
|
if (mode ==RISING) { |
|
|
|
LPC_GPIOINT->IO0IntEnR |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO0IntEnF &= ~(1<<pin); |
|
|
|
} |
|
|
|
else if (mode==FALLING) { |
|
|
|
LPC_GPIOINT->IO0IntEnF |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO0IntEnR &= ~(1<<pin); |
|
|
|
} |
|
|
|
else if (mode==CHANGE) { |
|
|
|
LPC_GPIOINT->IO0IntEnR |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO0IntEnF |= (1<<pin); |
|
|
|
} |
|
|
|
} |
|
|
|
else{ |
|
|
|
LPC_GPIOINT->IO2IntClr = (1 << pin); |
|
|
|
if (mode ==RISING) { |
|
|
|
LPC_GPIOINT->IO2IntEnR |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO2IntEnF &= ~(1<<pin); |
|
|
|
} |
|
|
|
else if (mode==FALLING) { |
|
|
|
LPC_GPIOINT->IO2IntEnF |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO2IntEnR &= ~(1<<pin); |
|
|
|
} |
|
|
|
else if (mode==CHANGE) { |
|
|
|
LPC_GPIOINT->IO2IntEnR |= (1<<pin); |
|
|
|
LPC_GPIOINT->IO2IntEnF |= (1<<pin); |
|
|
|
} |
|
|
|
} |
|
|
|
} |
|
|
|
extern "C" void GpioDisableInt(uint32_t port, uint32_t pin) |
|
|
|
{ |
|
|
|
if (port==0){ |
|
|
|
LPC_GPIOINT->IO0IntEnR &= ~(1<<pin); |
|
|
|
LPC_GPIOINT->IO0IntEnF &= ~(1<<pin); |
|
|
|
LPC_GPIOINT->IO0IntClr = 1 << pin; |
|
|
|
} |
|
|
|
else { |
|
|
|
LPC_GPIOINT->IO2IntEnR &= ~(1<<pin); |
|
|
|
LPC_GPIOINT->IO2IntEnF &= ~(1<<pin); |
|
|
|
LPC_GPIOINT->IO2IntClr = 1 << pin; |
|
|
|
} |
|
|
|
// Enable interrupt
|
|
|
|
GpioEnableInt(myport,mypin,mode); |
|
|
|
} |
|
|
|
|
|
|
|
bool isPowerOf2(unsigned int n) |
|
|
|
void detachInterrupt(const uint32_t pin) { |
|
|
|
if (!INTERRUPT_PIN(pin)) return; |
|
|
|
|
|
|
|
{ |
|
|
|
const uint8_t myport = pin_map[pin].port, |
|
|
|
mypin = pin_map[pin].pin; |
|
|
|
|
|
|
|
return n == 1 || (n & (n-1)) == 0; |
|
|
|
// Disable interrupt
|
|
|
|
GpioDisableInt(myport, mypin); |
|
|
|
|
|
|
|
// unset callback
|
|
|
|
if (myport == 0) |
|
|
|
callbacksP0[mypin] = 0; |
|
|
|
else //if (myport == 2 )
|
|
|
|
callbacksP2[mypin] = 0; |
|
|
|
} |
|
|
|
|
|
|
|
#if 0 |
|
|
|
extern "C" void EINT3_IRQHandler () { |
|
|
|
LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF; |
|
|
|
TOGGLE(13); |
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
} |
|
|
|
#else |
|
|
|
extern "C" void EINT3_IRQHandler(void) |
|
|
|
{ |
|
|
|
// Read in all current interrupt registers. We do this once as the
|
|
|
|
// GPIO interrupt registers are on the APB bus, and this is slow.
|
|
|
|
uint32_t rise0 = LPC_GPIOINT->IO0IntStatR; |
|
|
|
uint32_t fall0 = LPC_GPIOINT->IO0IntStatF; |
|
|
|
uint32_t rise2 = LPC_GPIOINT->IO2IntStatR; |
|
|
|
uint32_t fall2 = LPC_GPIOINT->IO2IntStatF; |
|
|
|
//Clear teh interrupts ASAP
|
|
|
|
LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF; |
|
|
|
NVIC_ClearPendingIRQ(EINT3_IRQn); |
|
|
|
uint8_t bitloc; |
|
|
|
if (rise0 == 0) |
|
|
|
goto fall0; |
|
|
|
/* multiple pins changes happened.*/ |
|
|
|
while(rise0 > 0) { //Continue as long as there are interrupts pending
|
|
|
|
bitloc = 31 - __CLZ(rise0); //CLZ returns number of leading zeros, 31 minus that is location of first pending interrupt
|
|
|
|
if (callbacksP0[bitloc]!=0) |
|
|
|
callbacksP0[bitloc](); |
|
|
|
rise0 -= 1<<bitloc; |
|
|
|
} |
|
|
|
fall0: |
|
|
|
if (fall0==0) |
|
|
|
goto rise2; |
|
|
|
/* if (isPowerOf2(fall0) && callbacksP0[31 - __CLZ(rise0)])
|
|
|
|
callbacksP0[31 - __CLZ(rise0)](); */ |
|
|
|
//LPC_GPIOINT->IO0IntClr = fall0;*/
|
|
|
|
else { |
|
|
|
while(fall0 > 0) { |
|
|
|
bitloc = 31 - __CLZ(fall0); |
|
|
|
if (callbacksP0[bitloc]!=0) |
|
|
|
callbacksP0[bitloc](); |
|
|
|
fall0 -= 1<<bitloc; |
|
|
|
|
|
|
|
extern "C" void GpioEnableInt(uint32_t port, uint32_t pin, uint32_t mode) { |
|
|
|
//pin here is the processor pin, not logical pin
|
|
|
|
if (port == 0) { |
|
|
|
LPC_GPIOINT->IO0IntClr = _BV(pin); |
|
|
|
if (mode == RISING) { |
|
|
|
SBI(LPC_GPIOINT->IO0IntEnR, pin); |
|
|
|
CBI(LPC_GPIOINT->IO0IntEnF, pin); |
|
|
|
} |
|
|
|
else if (mode == FALLING) { |
|
|
|
SBI(LPC_GPIOINT->IO0IntEnF, pin); |
|
|
|
CBI(LPC_GPIOINT->IO0IntEnR, pin); |
|
|
|
} |
|
|
|
else if (mode == CHANGE) { |
|
|
|
SBI(LPC_GPIOINT->IO0IntEnR, pin); |
|
|
|
SBI(LPC_GPIOINT->IO0IntEnF, pin); |
|
|
|
} |
|
|
|
} |
|
|
|
} |
|
|
|
rise2: |
|
|
|
if (rise2==0) |
|
|
|
goto fall2; |
|
|
|
/*if ((rise2 & (rise2 - 1)) == 0) {
|
|
|
|
callbacksP2[rise2](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = rise2;
|
|
|
|
}*/ |
|
|
|
else { |
|
|
|
while(rise2 > 0) { |
|
|
|
bitloc = 31 - __CLZ(rise2); |
|
|
|
if (callbacksP2[bitloc]!=0) |
|
|
|
callbacksP2[bitloc](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = 1 << bitloc;
|
|
|
|
rise2 -= 1<<bitloc; |
|
|
|
else { |
|
|
|
LPC_GPIOINT->IO2IntClr = _BV(pin); |
|
|
|
if (mode == RISING) { |
|
|
|
SBI(LPC_GPIOINT->IO2IntEnR, pin); |
|
|
|
CBI(LPC_GPIOINT->IO2IntEnF, pin); |
|
|
|
} |
|
|
|
else if (mode == FALLING) { |
|
|
|
SBI(LPC_GPIOINT->IO2IntEnF, pin); |
|
|
|
CBI(LPC_GPIOINT->IO2IntEnR, pin); |
|
|
|
} |
|
|
|
else if (mode == CHANGE) { |
|
|
|
SBI(LPC_GPIOINT->IO2IntEnR, pin); |
|
|
|
SBI(LPC_GPIOINT->IO2IntEnF, pin); |
|
|
|
} |
|
|
|
} |
|
|
|
} |
|
|
|
fall2: |
|
|
|
if (fall2==0) |
|
|
|
goto end; |
|
|
|
/*if ((fall2 & (fall2 - 1)) == 0) {
|
|
|
|
callbacksP2[fall2](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = fall2;
|
|
|
|
}*/ |
|
|
|
else { |
|
|
|
while(fall2 > 0) { |
|
|
|
bitloc = 31 - __CLZ(fall2); |
|
|
|
if (callbacksP2[bitloc]!=0) |
|
|
|
callbacksP2[bitloc](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = 1 << bitloc;
|
|
|
|
fall2 -= 1<<bitloc; |
|
|
|
} |
|
|
|
end: |
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
//LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF;
|
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
return; //silences warning
|
|
|
|
|
|
|
|
extern "C" void GpioDisableInt(const uint32_t port, const uint32_t pin) { |
|
|
|
if (port == 0) { |
|
|
|
CBI(LPC_GPIOINT->IO0IntEnR, pin); |
|
|
|
CBI(LPC_GPIOINT->IO0IntEnF, pin); |
|
|
|
LPC_GPIOINT->IO0IntClr = _BV(pin); |
|
|
|
} |
|
|
|
else { |
|
|
|
CBI(LPC_GPIOINT->IO2IntEnR, pin); |
|
|
|
CBI(LPC_GPIOINT->IO2IntEnF, pin); |
|
|
|
LPC_GPIOINT->IO2IntClr = _BV(pin); |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
bool isPowerOf2(unsigned int n) { |
|
|
|
return n == 1 || (n & (n - 1)) == 0; |
|
|
|
} |
|
|
|
|
|
|
|
#if 0 |
|
|
|
extern "C" void EINT3_IRQHandler () { |
|
|
|
LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF; |
|
|
|
TOGGLE(13); |
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
} |
|
|
|
#else |
|
|
|
|
|
|
|
extern "C" void EINT3_IRQHandler(void) { |
|
|
|
// Read in all current interrupt registers. We do this once as the
|
|
|
|
// GPIO interrupt registers are on the APB bus, and this is slow.
|
|
|
|
uint32_t rise0 = LPC_GPIOINT->IO0IntStatR, |
|
|
|
fall0 = LPC_GPIOINT->IO0IntStatF, |
|
|
|
rise2 = LPC_GPIOINT->IO2IntStatR, |
|
|
|
fall2 = LPC_GPIOINT->IO2IntStatF; |
|
|
|
// Clear the interrupts ASAP
|
|
|
|
LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF; |
|
|
|
NVIC_ClearPendingIRQ(EINT3_IRQn); |
|
|
|
|
|
|
|
/* multiple pins changes happened.*/ |
|
|
|
if (rise0) while (rise0 > 0) { // Continue as long as there are interrupts pending
|
|
|
|
const uint8_t bitloc = 31 - __CLZ(rise0); //CLZ returns number of leading zeros, 31 minus that is location of first pending interrupt
|
|
|
|
if (callbacksP0[bitloc] != NULL) callbacksP0[bitloc](); |
|
|
|
rise0 -= _BV(bitloc); |
|
|
|
} |
|
|
|
|
|
|
|
if (fall0) while (fall0 > 0) { |
|
|
|
const uint8_t bitloc = 31 - __CLZ(fall0); |
|
|
|
if (callbacksP0[bitloc] != NULL) callbacksP0[bitloc](); |
|
|
|
fall0 -= _BV(bitloc); |
|
|
|
} |
|
|
|
|
|
|
|
if (rise2) while(rise2 > 0) { |
|
|
|
const uint8_t bitloc = 31 - __CLZ(rise2); |
|
|
|
if (callbacksP2[bitloc] != NULL) callbacksP2[bitloc](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = 1 << bitloc;
|
|
|
|
rise2 -= _BV(bitloc); |
|
|
|
} |
|
|
|
|
|
|
|
if (fall2) while (fall2 > 0) { |
|
|
|
const uint8_t bitloc = 31 - __CLZ(fall2); |
|
|
|
if (callbacksP2[bitloc] != NULL) callbacksP2[bitloc](); |
|
|
|
//LPC_GPIOINT->IO2IntClr = 1 << bitloc;
|
|
|
|
fall2 -= _BV(bitloc); |
|
|
|
} |
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
//LPC_GPIOINT->IO0IntClr = LPC_GPIOINT->IO2IntClr = 0xFFFFFFFF;
|
|
|
|
//NVIC_ClearPendingIRQ(EINT3_IRQn);
|
|
|
|
} |
|
|
|
|
|
|
|
#endif |
|
|
|
|
|
|
|
#endif // TARGET_LPC1768
|
|
|
|
|
Scott Lahteine
7 years ago