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@ -111,6 +111,9 @@ |
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#define DELAY_NS(x) DELAY_CYCLES( (x) * (F_CPU/1000000) / 1000) |
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typedef uint8_t (*pfnSpiTransfer) (uint8_t b); |
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typedef void (*pfnSpiRxBlock)(uint8_t* buf, uint32_t nbyte); |
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typedef void (*pfnSpiTxBlock)(const uint8_t* buf, uint32_t nbyte); |
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/* ---------------- Macros to be able to access definitions from asm */ |
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@ -183,26 +186,32 @@ |
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/* Bit 0 */ |
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" str %[mosi_mask],[%[mosi_port], %[idx],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" nop" "\n\t" |
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" nop" "\n\t" /* Result will be 0 */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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: [mosi_mask]"+r"( MOSI_MASK ), |
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[mosi_port]"+r"( MOSI_PORT_PLUS30 ), |
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[sck_mask]"+r"( SCK_MASK ), |
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[sck_port]"+r"( SCK_PORT_PLUS30 ), |
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[idx]"+r"( idx ), |
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[txval]"+r"( bout ) |
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: |
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: [idx]"+r"( idx ) |
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: [txval]"r"( bout ) , |
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[mosi_mask]"r"( MOSI_MASK ), |
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[mosi_port]"r"( MOSI_PORT_PLUS30 ), |
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[sck_mask]"r"( SCK_MASK ), |
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[sck_port]"r"( SCK_PORT_PLUS30 ) |
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: "cc" |
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); |
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return 0; |
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} |
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// Calculates the bit band alias address and returns a pointer address to word.
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// addr: The byte address of bitbanding bit.
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// bit: The bit position of bitbanding bit.
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#define BITBAND_ADDRESS(addr, bit) \ |
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(((uint32_t)(addr) & 0xF0000000) + 0x02000000 + ((uint32_t)(addr)&0xFFFFF)*32 + (bit)*4) |
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// run at ~8 .. ~10Mhz - Rx version (Tx line not altered)
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static uint8_t spiTransferRx0(uint8_t bout) { // using Mode 0
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int bin = 0, work = 0; |
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register uint32_t MISO_PORT_PLUS3C = ((uint32_t) PORT(MISO_PIN)) + 0x3C; /* PDSR of port */ |
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register uint32_t bin; |
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register uint32_t work; |
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register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */ |
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */ |
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN); |
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UNUSED(bout); |
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@ -213,70 +222,61 @@ |
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/* bit 7 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#7,#1" "\n\t" /* Store read bit as the bit 7 */ |
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/* bit 6 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#6,#1" "\n\t" /* Store read bit as the bit 6 */ |
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/* bit 5 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#5,#1" "\n\t" /* Store read bit as the bit 5 */ |
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/* bit 4 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#4,#1" "\n\t" /* Store read bit as the bit 4 */ |
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/* bit 3 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#3,#1" "\n\t" /* Store read bit as the bit 3 */ |
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/* bit 2 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#2,#1" "\n\t" /* Store read bit as the bit 2 */ |
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/* bit 1 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#1,#1" "\n\t" /* Store read bit as the bit 1 */ |
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/* bit 0 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[miso_port]]" "\n\t" /* PDSR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" lsrs %[work],%[work],%[miso_shift]" "\n\t" /* Isolate input into carry */ |
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" adc %[bin],%[bin],%[bin]" "\n\t" /* Shift left result and add the carry */ |
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" bfi %[bin],%[work],#0,#1" "\n\t" /* Store read bit as the bit 0 */ |
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: [miso_port]"+r"( MISO_PORT_PLUS3C ), |
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[sck_mask]"+r"( SCK_MASK ), |
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[sck_port]"+r"( SCK_PORT_PLUS30 ), |
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[bin]"+r"(bin), |
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: [bin]"+r"(bin), |
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[work]"+r"(work) |
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: [miso_shift]"M"( PIN_SHIFT(MISO_PIN) + 1 ) /* So we move to the carry */ |
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: [bitband_miso_port]"r"( BITBAND_MISO_PORT ), |
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[sck_mask]"r"( SCK_MASK ), |
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[sck_port]"r"( SCK_PORT_PLUS30 ) |
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: "cc" |
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); |
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return (uint8_t)bin; |
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return bin; |
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} |
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// run at ~4Mhz
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@ -317,10 +317,182 @@ |
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return b; |
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} |
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// Pointers to generic functions
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// Pointers to generic functions for byte transfers
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static pfnSpiTransfer spiTransferTx = spiTransferX; |
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static pfnSpiTransfer spiTransferRx = spiTransferX; |
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// Block transfers run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
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static void spiTxBlock0(const uint8_t* ptr, uint32_t todo) { |
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register uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */ |
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register uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN); |
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */ |
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN); |
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register uint32_t work; |
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register uint32_t txval; |
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/* The software SPI routine */ |
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__asm__ __volatile__( |
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".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax
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" loop%=:" "\n\t" |
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" ldrb.w %[txval], [%[ptr]], #1" "\n\t" /* Load value to send, increment buffer */ |
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" mvn %[txval],%[txval]" "\n\t" /* Negate value */ |
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/* Bit 7 */ |
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" ubfx %[work],%[txval],#7,#1" "\n\t" /* Place bit 7 in bit 0 of work*/ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#6,#1" "\n\t" /* Place bit 6 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 6 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#5,#1" "\n\t" /* Place bit 5 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 5 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#4,#1" "\n\t" /* Place bit 4 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 4 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#3,#1" "\n\t" /* Place bit 3 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 3 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#2,#1" "\n\t" /* Place bit 2 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 2 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#1,#1" "\n\t" /* Place bit 1 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 1 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ubfx %[work],%[txval],#0,#1" "\n\t" /* Place bit 0 in bit 0 of work*/ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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/* Bit 0 */ |
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" str %[mosi_mask],[%[mosi_port], %[work],LSL #2]" "\n\t" /* Access the proper SODR or CODR registers based on that bit */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" subs %[todo],#1" "\n\t" /* Decrement count of pending words to send, update status */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" bne.n loop%=" "\n\t" /* Repeat until done */ |
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: [ptr]"+r" ( ptr ) , |
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[todo]"+r" ( todo ) , |
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[work]"+r"( work ) , |
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[txval]"+r"( txval ) |
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: [mosi_mask]"r"( MOSI_MASK ), |
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[mosi_port]"r"( MOSI_PORT_PLUS30 ), |
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[sck_mask]"r"( SCK_MASK ), |
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[sck_port]"r"( SCK_PORT_PLUS30 ) |
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: "cc" |
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); |
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} |
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static void spiRxBlock0(uint8_t* ptr, uint32_t todo) { |
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register uint32_t bin; |
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register uint32_t work; |
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register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */ |
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */ |
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN); |
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/* The software SPI routine */ |
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__asm__ __volatile__( |
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".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax
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" loop%=:" "\n\t" |
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/* bit 7 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" bfi %[bin],%[work],#7,#1" "\n\t" /* Store read bit as the bit 7 */ |
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/* bit 6 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" bfi %[bin],%[work],#6,#1" "\n\t" /* Store read bit as the bit 6 */ |
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/* bit 5 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
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" bfi %[bin],%[work],#5,#1" "\n\t" /* Store read bit as the bit 5 */ |
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/* bit 4 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
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" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
|
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" bfi %[bin],%[work],#4,#1" "\n\t" /* Store read bit as the bit 4 */ |
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|
|
|
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/* bit 3 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
|
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
|
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|
" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
|
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" bfi %[bin],%[work],#3,#1" "\n\t" /* Store read bit as the bit 3 */ |
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|
|
|
|
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|
/* bit 2 */ |
|
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
|
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" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
|
|
|
" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
|
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|
" bfi %[bin],%[work],#2,#1" "\n\t" /* Store read bit as the bit 2 */ |
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|
|
|
|
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|
/* bit 1 */ |
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" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
|
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|
" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
|
|
|
" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
|
|
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" bfi %[bin],%[work],#1,#1" "\n\t" /* Store read bit as the bit 1 */ |
|
|
|
|
|
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|
/* bit 0 */ |
|
|
|
" str %[sck_mask],[%[sck_port]]" "\n\t" /* SODR */ |
|
|
|
" ldr %[work],[%[bitband_miso_port]]" "\n\t" /* PDSR on bitband area for required bit: work will be 1 or 0 based on port */ |
|
|
|
" str %[sck_mask],[%[sck_port],#0x4]" "\n\t" /* CODR */ |
|
|
|
" bfi %[bin],%[work],#0,#1" "\n\t" /* Store read bit as the bit 0 */ |
|
|
|
|
|
|
|
" subs %[todo],#1" "\n\t" /* Decrement count of pending words to send, update status */ |
|
|
|
" strb.w %[bin], [%[ptr]], #1" "\n\t" /* Store read value into buffer, increment buffer pointer */ |
|
|
|
" bne.n loop%=" "\n\t" /* Repeat until done */ |
|
|
|
|
|
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|
: [ptr]"+r"(ptr), |
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|
[todo]"+r"(todo), |
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|
[bin]"+r"(bin), |
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|
|
[work]"+r"(work) |
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|
|
: [bitband_miso_port]"r"( BITBAND_MISO_PORT ), |
|
|
|
[sck_mask]"r"( SCK_MASK ), |
|
|
|
[sck_port]"r"( SCK_PORT_PLUS30 ) |
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|
|
: "cc" |
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|
); |
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|
} |
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|
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|
static void spiTxBlockX(const uint8_t* buf, uint32_t todo) { |
|
|
|
do { |
|
|
|
(void) spiTransferTx(*buf++); |
|
|
|
} while (--todo); |
|
|
|
} |
|
|
|
|
|
|
|
static void spiRxBlockX(uint8_t* buf, uint32_t todo) { |
|
|
|
do { |
|
|
|
*buf++ = spiTransferRx(0xff); |
|
|
|
} while (--todo); |
|
|
|
} |
|
|
|
|
|
|
|
// Pointers to generic functions for block tranfers
|
|
|
|
static pfnSpiTxBlock spiTxBlock = spiTxBlockX; |
|
|
|
static pfnSpiRxBlock spiRxBlock = spiRxBlockX; |
|
|
|
|
|
|
|
void spiBegin() { |
|
|
|
SET_OUTPUT(SS_PIN); |
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|
|
WRITE(SS_PIN, HIGH); |
|
|
@ -329,6 +501,38 @@ |
|
|
|
SET_OUTPUT(MOSI_PIN); |
|
|
|
} |
|
|
|
|
|
|
|
uint8_t spiRec() { |
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
uint8_t b = spiTransferRx(0xFF); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
return b; |
|
|
|
} |
|
|
|
|
|
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
|
uint32_t todo = nbyte; |
|
|
|
if (todo == 0) return; |
|
|
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
spiRxBlock(buf,nbyte); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
void spiSend(uint8_t b) { |
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
(void) spiTransferTx(b); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
(void) spiTransferTx(token); |
|
|
|
spiTxBlock(buf,512); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
/**
|
|
|
|
* spiRate should be |
|
|
|
* 0 : 8 - 10 MHz |
|
|
@ -344,15 +548,21 @@ |
|
|
|
case 0: |
|
|
|
spiTransferTx = spiTransferTx0; |
|
|
|
spiTransferRx = spiTransferRx0; |
|
|
|
spiTxBlock = spiTxBlock0; |
|
|
|
spiRxBlock = spiRxBlock0; |
|
|
|
break; |
|
|
|
case 1: |
|
|
|
spiTransferTx = spiTransfer1; |
|
|
|
spiTransferRx = spiTransfer1; |
|
|
|
spiTxBlock = spiTxBlockX; |
|
|
|
spiRxBlock = spiRxBlockX; |
|
|
|
break; |
|
|
|
default: |
|
|
|
spiDelayCyclesX4 = (F_CPU/1000000) >> (6 - spiRate); |
|
|
|
spiTransferTx = spiTransferX; |
|
|
|
spiTransferRx = spiTransferX; |
|
|
|
spiTxBlock = spiTxBlockX; |
|
|
|
spiRxBlock = spiRxBlockX; |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
@ -361,41 +571,6 @@ |
|
|
|
WRITE(SCK_PIN, LOW); |
|
|
|
} |
|
|
|
|
|
|
|
uint8_t spiRec() { |
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
uint8_t b = spiTransferRx(0xFF); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
return b; |
|
|
|
} |
|
|
|
|
|
|
|
void spiRead(uint8_t* buf, uint16_t nbyte) { |
|
|
|
if (nbyte == 0) return; |
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
WRITE(MOSI_PIN, 1); /* Output 1s 1*/ |
|
|
|
for (int i = 0; i < nbyte; i++) { |
|
|
|
buf[i] = spiTransferRx(0xff); |
|
|
|
} |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
void spiSend(uint8_t b) { |
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
(void) spiTransferTx(b); |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
void spiSendBlock(uint8_t token, const uint8_t* buf) { |
|
|
|
|
|
|
|
WRITE(SS_PIN, LOW); |
|
|
|
(void) spiTransferTx(token); |
|
|
|
|
|
|
|
for (uint16_t i = 0; i < 512; i++) { |
|
|
|
(void) spiTransferTx(buf[i]); |
|
|
|
} |
|
|
|
WRITE(SS_PIN, HIGH); |
|
|
|
} |
|
|
|
|
|
|
|
#pragma GCC reset_options |
|
|
|
|
|
|
|
#else |
|
|
|