diff --git a/Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h b/Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h index b131853643..4e999f88ff 100644 --- a/Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h +++ b/Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h @@ -51,7 +51,7 @@ enum XPTCoordinate : uint8_t { XPT2046_Z2 = 0x40 | XPT2046_CONTROL | XPT2046_DFR_MODE, }; -#if !defined(XPT2046_Z1_THRESHOLD) +#ifndef XPT2046_Z1_THRESHOLD #define XPT2046_Z1_THRESHOLD 10 #endif diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp index e68b3c1269..3df982e48b 100644 --- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp +++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp @@ -147,7 +147,7 @@ uint32_t TFT_FSMC::ReadID(tft_data_t Reg) { } bool TFT_FSMC::isBusy() { - #if defined(STM32F1xx) + #ifdef STM32F1xx volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET; #elif defined(STM32F4xx) volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN; diff --git a/Marlin/src/HAL/STM32/tft/tft_spi.cpp b/Marlin/src/HAL/STM32/tft/tft_spi.cpp index 2e18c8a64c..e455164c77 100644 --- a/Marlin/src/HAL/STM32/tft/tft_spi.cpp +++ b/Marlin/src/HAL/STM32/tft/tft_spi.cpp @@ -179,7 +179,7 @@ uint32_t TFT_SPI::ReadID(uint16_t Reg) { } bool TFT_SPI::isBusy() { - #if defined(STM32F1xx) + #ifdef STM32F1xx volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET; #elif defined(STM32F4xx) volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN; diff --git a/Marlin/src/core/macros.h b/Marlin/src/core/macros.h index ddcf27b2b8..8dfcb875ac 100644 --- a/Marlin/src/core/macros.h +++ b/Marlin/src/core/macros.h @@ -21,7 +21,7 @@ */ #pragma once -#if !defined(__has_include) +#ifndef __has_include #define __has_include(...) 1 #endif diff --git a/Marlin/src/inc/SanityCheck.h b/Marlin/src/inc/SanityCheck.h index ff8730d07b..7c0625dec4 100644 --- a/Marlin/src/inc/SanityCheck.h +++ b/Marlin/src/inc/SanityCheck.h @@ -2276,7 +2276,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS * Redundant temperature sensor config */ #if HAS_TEMP_REDUNDANT - #if !defined(TEMP_SENSOR_REDUNDANT_SOURCE) + #ifndef TEMP_SENSOR_REDUNDANT_SOURCE #error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_SOURCE." #elif !defined(TEMP_SENSOR_REDUNDANT_TARGET) #error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_TARGET." @@ -2984,7 +2984,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS #endif #if ENABLED(ANYCUBIC_LCD_CHIRON) - #if !defined(BEEPER_PIN) + #ifndef BEEPER_PIN #error "ANYCUBIC_LCD_CHIRON requires BEEPER_PIN" #elif DISABLED(SDSUPPORT) #error "ANYCUBIC_LCD_CHIRON requires SDSUPPORT" diff --git a/Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h b/Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h index 0c600fa0a5..524ebfafaa 100644 --- a/Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h +++ b/Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h @@ -97,7 +97,7 @@ #elif defined(TOUCH_UI_800x480) namespace FTDI { - #if defined(TOUCH_UI_800x480_GENERIC) + #ifdef TOUCH_UI_800x480_GENERIC constexpr uint8_t Pclk = 2; constexpr uint16_t Hsize = 800; constexpr uint16_t Vsize = 480; diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp index 72ad45ef46..5e8e1cc7e4 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp +++ b/buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp @@ -413,7 +413,7 @@ void init( void ) // Disable pull-up on every pin for (unsigned i = 0; i < PINS_COUNT; i++) - digitalWrite(i, LOW); + digitalWrite(i, LOW); // Enable parallel access on PIO output data registers PIOA->PIO_OWER = 0xFFFFFFFF; diff --git a/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h index 99f3a30443..92730f5945 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h @@ -100,11 +100,11 @@ extern "C" { * This value is used by the RCC HAL module to compute the system frequency * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#ifndef HSE_VALUE #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ -#if !defined (HSE_STARTUP_TIMEOUT) +#ifndef HSE_STARTUP_TIMEOUT #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ @@ -112,7 +112,7 @@ extern "C" { * @brief Internal oscillator (CSI) default value. * This value is the default CSI value after Reset. */ -#if !defined (CSI_VALUE) +#ifndef CSI_VALUE #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ #endif /* CSI_VALUE */ @@ -121,7 +121,7 @@ extern "C" { * This value is used by the RCC HAL module to compute the system frequency * (when HSI is used as system clock source, directly or through the PLL). */ -#if !defined (HSI_VALUE) +#ifndef HSI_VALUE #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ @@ -129,16 +129,16 @@ extern "C" { * @brief External Low Speed oscillator (LSE) value. * This value is used by the UART, RTC HAL module to compute the system frequency */ -#if !defined (LSE_VALUE) +#ifndef LSE_VALUE #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ #endif /* LSE_VALUE */ -#if !defined (LSE_STARTUP_TIMEOUT) +#ifndef LSE_STARTUP_TIMEOUT #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ -#if !defined (LSI_VALUE) +#ifndef LSI_VALUE #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -148,7 +148,7 @@ in voltage and temperature.*/ * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. */ -#if !defined (EXTERNAL_CLOCK_VALUE) +#ifndef EXTERNAL_CLOCK_VALUE #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/ #endif /* EXTERNAL_CLOCK_VALUE */ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp index 203e9fc9b8..ce2f2a0aa3 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp +++ b/buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp @@ -184,7 +184,7 @@ void SystemClockStartupInit() { PWR->CR3 &= ~(1 << 2); // SCUEN=0 PWR->D3CR |= 3 << 14; // VOS=3,Scale1,1.15~1.26V core voltage - while((PWR->D3CR & (1 << 13)) == 0); // Wait for the voltage to stabilize + while((PWR->D3CR & (1 << 13)) == 0); // Wait for the voltage to stabilize RCC->CR |= 1<<16; // Enable HSE uint16_t timeout = 0; @@ -198,9 +198,9 @@ void SystemClockStartupInit() { RCC->PLLCKSELR |= 2 << 0; // PLLSRC[1:0] = 2, HSE for PLL clock source RCC->PLLCKSELR |= 5 << 4; // DIVM1[5:0] = pllm, Prescaler for PLL1 RCC->PLL1DIVR |= (160 - 1) << 0; // DIVN1[8:0] = plln - 1, Multiplication factor for PLL1 VCO - RCC->PLL1DIVR |= (2 - 1) << 9; // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor + RCC->PLL1DIVR |= (2 - 1) << 9; // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor RCC->PLL1DIVR |= (4 - 1) << 16; // DIVQ1[6:0] = pllq - 1, PLL1 DIVQ division factor - RCC->PLL1DIVR |= 1 << 24; // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor + RCC->PLL1DIVR |= 1 << 24; // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor RCC->PLLCFGR |= 2 << 2; // PLL1 input (ref1_ck) clock range frequency is between 4 and 8 MHz RCC->PLLCFGR |= 0 << 1; // PLL1 VCO selection, 0: 192 to 836 MHz, 1 : 150 to 420 MHz RCC->PLLCFGR |= 3 << 16; // pll1_q_ck and pll1_p_ck output is enabled @@ -209,7 +209,7 @@ void SystemClockStartupInit() { // PLL2 DIVR clock frequency = 220MHz, so that SDRAM clock can be set to 110MHz RCC->PLLCKSELR |= 25 << 12; // DIVM2[5:0] = 25, Prescaler for PLL2 - RCC->PLL2DIVR |= (440 - 1) << 0; // DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO + RCC->PLL2DIVR |= (440 - 1) << 0; // DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO RCC->PLL2DIVR |= (2 - 1) << 9; // DIVP2[6:0] = 2-1, PLL2 DIVP division factor RCC->PLL2DIVR |= (2 - 1) << 24; // DIVR2[6:0] = 2-1, PLL2 DIVR division factor RCC->PLLCFGR |= 0 << 6; // PLL2RGE[1:0]=0, PLL2 input (ref2_ck) clock range frequency is between 1 and 2 MHz @@ -271,8 +271,8 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint uint8_t rnr = 0; if ((size % 32) || size == 0) return 1; rnr = MPU_Convert_Bytes_To_POT(size) - 1; - SCB->SHCSR &= ~(1 << 16); //disable MemManage - MPU->CTRL &= ~(1 << 0); //disable MPU + SCB->SHCSR &= ~(1 << 16); //disable MemManage + MPU->CTRL &= ~(1 << 0); //disable MPU MPU->RNR = rnum; MPU->RBAR = baseaddr; tempreg |= 0 << 28; @@ -286,21 +286,21 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint tempreg |= 1 << 0; MPU->RASR = tempreg; MPU->CTRL = (1 << 2) | (1 << 0); //enable PRIVDEFENA - SCB->SHCSR |= 1 << 16; //enable MemManage + SCB->SHCSR |= 1 << 16; //enable MemManage return 0; } void MPU_Memory_Protection(void) { - MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect DTCM 128k, Sharing is prohibited, cache is allowed, and buffering is allowed + MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect DTCM 128k, Sharing is prohibited, cache is allowed, and buffering is allowed - MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect AXI SRAM, Sharing is prohibited, cache is allowed, and buffering is allowed - MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed - MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed + MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect AXI SRAM, Sharing is prohibited, cache is allowed, and buffering is allowed + MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed + MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed - MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect LCD FMC 64M, No sharing, no cache, no buffering - MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SDRAM 32M, Sharing is prohibited, cache is allowed, and buffering is allowed - MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect NAND FLASH 256M, No sharing, no cache, no buffering + MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect LCD FMC 64M, No sharing, no cache, no buffering + MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SDRAM 32M, Sharing is prohibited, cache is allowed, and buffering is allowed + MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect NAND FLASH 256M, No sharing, no cache, no buffering } /** diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c index 56ae00b41b..6fb5453e58 100755 --- a/buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c @@ -136,7 +136,7 @@ WEAK const PinMap PinMap_PWM[] = { #endif {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3 // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3 #endif #if defined(STM32F103xE) || defined(STM32F103xG) @@ -148,11 +148,11 @@ WEAK const PinMap PinMap_PWM[] = { #else {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 #endif -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 #endif {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 #endif // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 @@ -161,7 +161,7 @@ WEAK const PinMap PinMap_PWM[] = { #else {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N #endif -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 #endif {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 @@ -196,10 +196,10 @@ WEAK const PinMap PinMap_PWM[] = { {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 #endif -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 #endif -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 #endif {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 @@ -208,11 +208,11 @@ WEAK const PinMap PinMap_PWM[] = { // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 #endif {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N -#if defined(STM32F103xG) +#ifdef STM32F103xG // {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 #endif {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 @@ -249,7 +249,7 @@ WEAK const PinMap PinMap_UART_TX[] = { #if defined(STM32F103xE) || defined(STM32F103xG) {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, #endif -#if defined(STM32F103xB) +#ifdef STM32F103xB {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, #endif #if defined(STM32F103xE) || defined(STM32F103xG) @@ -270,7 +270,7 @@ WEAK const PinMap PinMap_UART_RX[] = { #if defined(STM32F103xE) || defined(STM32F103xG) {PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, #endif -#if defined(STM32F103xB) +#ifdef STM32F103xB {PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, #endif #if defined(STM32F103xE) || defined(STM32F103xG) diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h index 3440343ffa..b684a090e7 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h @@ -171,7 +171,7 @@ extern "C" { * Activated: CRC code is present inside driver * Deactivated: CRC code cleaned from driver */ -#if !defined(USE_SPI_CRC) +#ifndef USE_SPI_CRC #define USE_SPI_CRC 0 #endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h index e64272745b..8e4f248c2e 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h @@ -139,7 +139,7 @@ extern "C" { #define PIN_SERIAL2_TX PA2 // Extra HAL modules -#if defined(STM32F103xE) +#ifdef STM32F103xE //#define HAL_DAC_MODULE_ENABLED (unused or maybe for the eeprom write?) #define HAL_SD_MODULE_ENABLED #define HAL_SRAM_MODULE_ENABLED diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c index 339a55916c..fd429266a3 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c @@ -143,17 +143,17 @@ WEAK const PinMap PinMap_PWM[] = { #else {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 #endif -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 #endif {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 #endif {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N //{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 //{PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 #endif {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 @@ -185,11 +185,11 @@ WEAK const PinMap PinMap_PWM[] = { {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1 {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2 {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 #endif {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 #endif {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 @@ -198,11 +198,11 @@ WEAK const PinMap PinMap_PWM[] = { //{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 #endif {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N -#if defined(STM32F103xG) +#ifdef STM32F103xG //{PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 #endif {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 @@ -223,7 +223,7 @@ WEAK const PinMap PinMap_PWM[] = { {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2 {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3 {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4 -#if defined(STM32F103xG) +#ifdef STM32F103xG {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1 {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2 #endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h index a41247b9b1..2443052621 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h @@ -81,15 +81,15 @@ extern "C" { * This value is used by the RCC HAL module to compute the system frequency * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) -#if defined(USE_STM3210C_EVAL) +#ifndef HSE_VALUE +#ifdef USE_STM3210C_EVAL #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ #else #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ #endif #endif /* HSE_VALUE */ -#if !defined (HSE_STARTUP_TIMEOUT) +#ifndef HSE_STARTUP_TIMEOUT #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ @@ -98,14 +98,14 @@ extern "C" { * This value is used by the RCC HAL module to compute the system frequency * (when HSI is used as system clock source, directly or through the PLL). */ -#if !defined (HSI_VALUE) +#ifndef HSI_VALUE #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ #endif /* HSI_VALUE */ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#ifndef LSI_VALUE #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -114,11 +114,11 @@ extern "C" { * @brief External Low Speed oscillator (LSE) value. * This value is used by the UART, RTC HAL module to compute the system frequency */ -#if !defined (LSE_VALUE) +#ifndef LSE_VALUE #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ #endif /* LSE_VALUE */ -#if !defined (LSE_STARTUP_TIMEOUT) +#ifndef LSE_STARTUP_TIMEOUT #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ @@ -129,7 +129,7 @@ extern "C" { /** * @brief This is the HAL system configuration section */ -#if !defined(VDD_VALUE) +#ifndef VDD_VALUE #define VDD_VALUE 3300U /*!< Value of VDD in mv */ #endif #if !defined (TICK_INT_PRIORITY) diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h index 952fe3c5b8..d246a1e745 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h @@ -91,11 +91,11 @@ * This value is used by the RCC HAL module to compute the system frequency * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#ifndef HSE_VALUE #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ -#if !defined (HSE_STARTUP_TIMEOUT) +#ifndef HSE_STARTUP_TIMEOUT #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ @@ -104,14 +104,14 @@ * This value is used by the RCC HAL module to compute the system frequency * (when HSI is used as system clock source, directly or through the PLL). */ -#if !defined (HSI_VALUE) +#ifndef HSI_VALUE #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ #endif /* HSI_VALUE */ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#ifndef LSI_VALUE #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -119,11 +119,11 @@ /** * @brief External Low Speed oscillator (LSE) value. */ -#if !defined (LSE_VALUE) +#ifndef LSE_VALUE #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ #endif /* LSE_VALUE */ -#if !defined (LSE_STARTUP_TIMEOUT) +#ifndef LSE_STARTUP_TIMEOUT #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ @@ -132,7 +132,7 @@ * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. */ -#if !defined (EXTERNAL_CLOCK_VALUE) +#ifndef EXTERNAL_CLOCK_VALUE #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ #endif /* EXTERNAL_CLOCK_VALUE */ diff --git a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c index 0abfc70700..eb95de1495 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32G0C1R(C-E)IxN.xml, STM32G0C1R(C-E)TxN.xml * CubeMX DB release 6.0.30 */ -#if !defined(CUSTOM_PERIPHERAL_PINS) +#ifndef CUSTOM_PERIPHERAL_PINS #include "Arduino.h" #include "PeripheralPins.h" diff --git a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp index 8af7150dc7..d18509f35f 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp +++ b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp @@ -11,7 +11,7 @@ ******************************************************************************* */ -#if defined(STM32G0B1xx) +#ifdef STM32G0B1xx #include "pins_arduino.h" // Digital PinName array diff --git a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c index 49c4cbb87a..d5ccda9f9b 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c +++ b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c @@ -17,7 +17,7 @@ * STM32H753VIHx.xml, STM32H753VITx.xml * CubeMX DB release 6.0.30 */ -#if !defined(CUSTOM_PERIPHERAL_PINS) +#ifndef CUSTOM_PERIPHERAL_PINS #include "Arduino.h" #include "PeripheralPins.h" diff --git a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp index 7813f8860e..814149f6c7 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp +++ b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp @@ -10,7 +10,7 @@ * ******************************************************************************* */ -#if defined(STM32H743xx) +#ifdef STM32H743xx #include "pins_arduino.h" // Digital PinName array diff --git a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h index 35cf65dee9..c4635c4b1f 100644 --- a/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h @@ -226,16 +226,16 @@ #endif // Extra HAL modules -#if !defined(HAL_DAC_MODULE_DISABLED) +#ifndef HAL_DAC_MODULE_DISABLED #define HAL_DAC_MODULE_ENABLED #endif -#if !defined(HAL_ETH_MODULE_DISABLED) +#ifndef HAL_ETH_MODULE_DISABLED #define HAL_ETH_MODULE_ENABLED #endif -#if !defined(HAL_QSPI_MODULE_DISABLED) +#ifndef HAL_QSPI_MODULE_DISABLED #define HAL_QSPI_MODULE_ENABLED #endif -#if !defined(HAL_SD_MODULE_DISABLED) +#ifndef HAL_SD_MODULE_DISABLED #define HAL_SD_MODULE_ENABLED #endif diff --git a/buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h index 2ad2905023..a5961a488b 100755 --- a/buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h +++ b/buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h @@ -91,11 +91,11 @@ * This value is used by the RCC HAL module to compute the system frequency * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#ifndef HSE_VALUE #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ -#if !defined (HSE_STARTUP_TIMEOUT) +#ifndef HSE_STARTUP_TIMEOUT #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ @@ -104,14 +104,14 @@ * This value is used by the RCC HAL module to compute the system frequency * (when HSI is used as system clock source, directly or through the PLL). */ -#if !defined (HSI_VALUE) +#ifndef HSI_VALUE #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ #endif /* HSI_VALUE */ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#ifndef LSI_VALUE #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -119,11 +119,11 @@ /** * @brief External Low Speed oscillator (LSE) value. */ -#if !defined (LSE_VALUE) +#ifndef LSE_VALUE #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ #endif /* LSE_VALUE */ -#if !defined (LSE_STARTUP_TIMEOUT) +#ifndef LSE_STARTUP_TIMEOUT #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ @@ -132,7 +132,7 @@ * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. */ -#if !defined (EXTERNAL_CLOCK_VALUE) +#ifndef EXTERNAL_CLOCK_VALUE #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ #endif /* EXTERNAL_CLOCK_VALUE */ diff --git a/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp b/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp index 6083664b94..8a4320a664 100644 --- a/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp +++ b/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp @@ -131,74 +131,74 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { {&gpioc, NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */ {&gpioc, NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */ - {&gpiod, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */ - {&gpiod, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */ - {&gpiod, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */ - - {&gpiod, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */ - {&gpiod, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */ - {&gpiod, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */ - {&gpiod, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */ - {&gpiod, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */ - {&gpiod, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */ - {&gpiod, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */ - {&gpiod, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */ - {&gpiod, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */ - {&gpiod, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */ - {&gpiod, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */ - {&gpiod, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */ - {&gpiod, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */ - - {&gpioe, NULL, NULL, 0, 0, ADCx} , /* PE0 */ - {&gpioe, NULL, NULL, 1, 0, ADCx} , /* PE1 */ - {&gpioe, NULL, NULL, 2, 0, ADCx} , /* PE2 */ - {&gpioe, NULL, NULL, 3, 0, ADCx} , /* PE3 */ - {&gpioe, NULL, NULL, 4, 0, ADCx} , /* PE4 */ - {&gpioe, NULL, NULL, 5, 0, ADCx} , /* PE5 */ - {&gpioe, NULL, NULL, 6, 0, ADCx} , /* PE6 */ - {&gpioe, NULL, NULL, 7, 0, ADCx} , /* PE7 */ - {&gpioe, NULL, NULL, 8, 0, ADCx} , /* PE8 */ - {&gpioe, NULL, NULL, 9, 0, ADCx} , /* PE9 */ - {&gpioe, NULL, NULL, 10, 0, ADCx} , /* PE10 */ - {&gpioe, NULL, NULL, 11, 0, ADCx} , /* PE11 */ - {&gpioe, NULL, NULL, 12, 0, ADCx} , /* PE12 */ - {&gpioe, NULL, NULL, 13, 0, ADCx} , /* PE13 */ - {&gpioe, NULL, NULL, 14, 0, ADCx} , /* PE14 */ - {&gpioe, NULL, NULL, 15, 0, ADCx} , /* PE15 */ - - {&gpiof, NULL, NULL, 0, 0, ADCx} , /* PF0 */ - {&gpiof, NULL, NULL, 1, 0, ADCx} , /* PF1 */ - {&gpiof, NULL, NULL, 2, 0, ADCx} , /* PF2 */ - {&gpiof, NULL, NULL, 3, 0, ADCx} , /* PF3 */ - {&gpiof, NULL, NULL, 4, 0, ADCx} , /* PF4 */ - {&gpiof, NULL, NULL, 5, 0, ADCx} , /* PF5 */ - {&gpiof, NULL, NULL, 6, 0, ADCx} , /* PF6 */ - {&gpiof, NULL, NULL, 7, 0, ADCx} , /* PF7 */ - {&gpiof, NULL, NULL, 8, 0, ADCx} , /* PF8 */ - {&gpiof, NULL, NULL, 9, 0, ADCx} , /* PF9 */ - {&gpiof, NULL, NULL, 10, 0, ADCx} , /* PF10 */ - {&gpiof, NULL, NULL, 11, 0, ADCx} , /* PF11 */ - {&gpiof, NULL, NULL, 12, 0, ADCx} , /* PF12 */ - {&gpiof, NULL, NULL, 13, 0, ADCx} , /* PF13 */ - {&gpiof, NULL, NULL, 14, 0, ADCx} , /* PF14 */ - {&gpiof, NULL, NULL, 15, 0, ADCx} , /* PF15 */ - - {&gpiog, NULL, NULL, 0, 0, ADCx} , /* PG0 */ - {&gpiog, NULL, NULL, 1, 0, ADCx} , /* PG1 */ - {&gpiog, NULL, NULL, 2, 0, ADCx} , /* PG2 */ - {&gpiog, NULL, NULL, 3, 0, ADCx} , /* PG3 */ - {&gpiog, NULL, NULL, 4, 0, ADCx} , /* PG4 */ - {&gpiog, NULL, NULL, 5, 0, ADCx} , /* PG5 */ - {&gpiog, NULL, NULL, 6, 0, ADCx} , /* PG6 */ - {&gpiog, NULL, NULL, 7, 0, ADCx} , /* PG7 */ - {&gpiog, NULL, NULL, 8, 0, ADCx} , /* PG8 */ - {&gpiog, NULL, NULL, 9, 0, ADCx} , /* PG9 */ - {&gpiog, NULL, NULL, 10, 0, ADCx} , /* PG10 */ - {&gpiog, NULL, NULL, 11, 0, ADCx} , /* PG11 */ - {&gpiog, NULL, NULL, 12, 0, ADCx} , /* PG12 */ - {&gpiog, NULL, NULL, 13, 0, ADCx} , /* PG13 */ - {&gpiog, NULL, NULL, 14, 0, ADCx} , /* PG14 */ - {&gpiog, NULL, NULL, 15, 0, ADCx} /* PG15 */ + {&gpiod, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */ + {&gpiod, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */ + {&gpiod, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */ + + {&gpiod, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */ + {&gpiod, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */ + {&gpiod, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */ + {&gpiod, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */ + {&gpiod, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */ + {&gpiod, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */ + {&gpiod, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */ + {&gpiod, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */ + {&gpiod, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */ + {&gpiod, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */ + {&gpiod, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */ + {&gpiod, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */ + {&gpiod, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */ + + {&gpioe, NULL, NULL, 0, 0, ADCx} , /* PE0 */ + {&gpioe, NULL, NULL, 1, 0, ADCx} , /* PE1 */ + {&gpioe, NULL, NULL, 2, 0, ADCx} , /* PE2 */ + {&gpioe, NULL, NULL, 3, 0, ADCx} , /* PE3 */ + {&gpioe, NULL, NULL, 4, 0, ADCx} , /* PE4 */ + {&gpioe, NULL, NULL, 5, 0, ADCx} , /* PE5 */ + {&gpioe, NULL, NULL, 6, 0, ADCx} , /* PE6 */ + {&gpioe, NULL, NULL, 7, 0, ADCx} , /* PE7 */ + {&gpioe, NULL, NULL, 8, 0, ADCx} , /* PE8 */ + {&gpioe, NULL, NULL, 9, 0, ADCx} , /* PE9 */ + {&gpioe, NULL, NULL, 10, 0, ADCx} , /* PE10 */ + {&gpioe, NULL, NULL, 11, 0, ADCx} , /* PE11 */ + {&gpioe, NULL, NULL, 12, 0, ADCx} , /* PE12 */ + {&gpioe, NULL, NULL, 13, 0, ADCx} , /* PE13 */ + {&gpioe, NULL, NULL, 14, 0, ADCx} , /* PE14 */ + {&gpioe, NULL, NULL, 15, 0, ADCx} , /* PE15 */ + + {&gpiof, NULL, NULL, 0, 0, ADCx} , /* PF0 */ + {&gpiof, NULL, NULL, 1, 0, ADCx} , /* PF1 */ + {&gpiof, NULL, NULL, 2, 0, ADCx} , /* PF2 */ + {&gpiof, NULL, NULL, 3, 0, ADCx} , /* PF3 */ + {&gpiof, NULL, NULL, 4, 0, ADCx} , /* PF4 */ + {&gpiof, NULL, NULL, 5, 0, ADCx} , /* PF5 */ + {&gpiof, NULL, NULL, 6, 0, ADCx} , /* PF6 */ + {&gpiof, NULL, NULL, 7, 0, ADCx} , /* PF7 */ + {&gpiof, NULL, NULL, 8, 0, ADCx} , /* PF8 */ + {&gpiof, NULL, NULL, 9, 0, ADCx} , /* PF9 */ + {&gpiof, NULL, NULL, 10, 0, ADCx} , /* PF10 */ + {&gpiof, NULL, NULL, 11, 0, ADCx} , /* PF11 */ + {&gpiof, NULL, NULL, 12, 0, ADCx} , /* PF12 */ + {&gpiof, NULL, NULL, 13, 0, ADCx} , /* PF13 */ + {&gpiof, NULL, NULL, 14, 0, ADCx} , /* PF14 */ + {&gpiof, NULL, NULL, 15, 0, ADCx} , /* PF15 */ + + {&gpiog, NULL, NULL, 0, 0, ADCx} , /* PG0 */ + {&gpiog, NULL, NULL, 1, 0, ADCx} , /* PG1 */ + {&gpiog, NULL, NULL, 2, 0, ADCx} , /* PG2 */ + {&gpiog, NULL, NULL, 3, 0, ADCx} , /* PG3 */ + {&gpiog, NULL, NULL, 4, 0, ADCx} , /* PG4 */ + {&gpiog, NULL, NULL, 5, 0, ADCx} , /* PG5 */ + {&gpiog, NULL, NULL, 6, 0, ADCx} , /* PG6 */ + {&gpiog, NULL, NULL, 7, 0, ADCx} , /* PG7 */ + {&gpiog, NULL, NULL, 8, 0, ADCx} , /* PG8 */ + {&gpiog, NULL, NULL, 9, 0, ADCx} , /* PG9 */ + {&gpiog, NULL, NULL, 10, 0, ADCx} , /* PG10 */ + {&gpiog, NULL, NULL, 11, 0, ADCx} , /* PG11 */ + {&gpiog, NULL, NULL, 12, 0, ADCx} , /* PG12 */ + {&gpiog, NULL, NULL, 13, 0, ADCx} , /* PG13 */ + {&gpiog, NULL, NULL, 14, 0, ADCx} , /* PG14 */ + {&gpiog, NULL, NULL, 15, 0, ADCx} /* PG15 */ }; /* Basically everything that is defined as having a timer us PWM */ @@ -219,15 +219,15 @@ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { #ifdef SERIAL_USB - DEFINE_HWSERIAL(Serial1, 1); - DEFINE_HWSERIAL(Serial2, 2); - DEFINE_HWSERIAL(Serial3, 3); - DEFINE_HWSERIAL_UART(Serial4, 4); - DEFINE_HWSERIAL_UART(Serial5, 5); + DEFINE_HWSERIAL(Serial1, 1); + DEFINE_HWSERIAL(Serial2, 2); + DEFINE_HWSERIAL(Serial3, 3); + DEFINE_HWSERIAL_UART(Serial4, 4); + DEFINE_HWSERIAL_UART(Serial5, 5); #else - DEFINE_HWSERIAL(Serial, 1); - DEFINE_HWSERIAL(Serial1, 2); - DEFINE_HWSERIAL(Serial2, 3); - DEFINE_HWSERIAL_UART(Serial3, 4); - DEFINE_HWSERIAL_UART(Serial4, 5); + DEFINE_HWSERIAL(Serial, 1); + DEFINE_HWSERIAL(Serial1, 2); + DEFINE_HWSERIAL(Serial2, 3); + DEFINE_HWSERIAL_UART(Serial3, 4); + DEFINE_HWSERIAL_UART(Serial4, 5); #endif diff --git a/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp b/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp index f22cf354e2..657b92e224 100644 --- a/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp +++ b/buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp @@ -144,10 +144,10 @@ static void setup_clocks(void) { * present. If no bootloader is present, the user NVIC usually starts * at the Flash base address, 0x08000000. */ -#if defined(BOOTLOADER_maple) - #define USER_ADDR_ROM 0x08005000 +#ifdef BOOTLOADER_maple + #define USER_ADDR_ROM 0x08005000 #else - #define USER_ADDR_ROM 0x08000000 + #define USER_ADDR_ROM 0x08000000 #endif #define USER_ADDR_RAM 0x20000C00 extern char __text_start__; diff --git a/buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp b/buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp index 77dcbcf848..1494cec563 100644 --- a/buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp +++ b/buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp @@ -144,7 +144,7 @@ static void setup_clocks(void) { * present. If no bootloader is present, the user NVIC usually starts * at the Flash base address, 0x08000000. */ -#if defined(BOOTLOADER_maple) +#ifdef BOOTLOADER_maple #define USER_ADDR_ROM 0x08002000 #else #define USER_ADDR_ROM 0x08000000