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@ -119,11 +119,12 @@ |
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*/ |
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*/ |
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#define LCD_RESET_PIN PC4 // pin 33
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#define LCD_RESET_PIN PC4 // pin 33
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#define LCD_BACKLIGHT_PIN PD12 // pin 59
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#define TFT_RESET_PIN PC4 // pin 33
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#define TFT_BACKLIGHT_PIN PD12 // pin 59
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#define FSMC_CS_PIN PD7 // pin 88 = FSMC_NE1
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#define FSMC_CS_PIN PD7 // pin 88 = FSMC_NE1
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#define FSMC_RS_PIN PD11 // pin 58 A16 Register. Only one address needed
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#define FSMC_RS_PIN PD11 // pin 58 A16 Register. Only one address needed
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#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT
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//#define LCD_USE_DMA_FSMC // Use DMA transfers to send data to the TFT (broken)
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#define FSMC_DMA_DEV DMA2 |
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#define FSMC_DMA_DEV DMA2 |
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#define FSMC_DMA_CHANNEL DMA_CH5 |
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#define FSMC_DMA_CHANNEL DMA_CH5 |
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@ -136,6 +137,8 @@ |
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#define TFT_PIXEL_OFFSET_X 32 |
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#define TFT_PIXEL_OFFSET_X 32 |
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#define TFT_PIXEL_OFFSET_Y 32 |
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#define TFT_PIXEL_OFFSET_Y 32 |
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//#define TFT_DRIVER ILI9341
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/**
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/**
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* Note: Alfawise U20/U30 boards DON'T use SPI2, as the hardware designer |
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* Note: Alfawise U20/U30 boards DON'T use SPI2, as the hardware designer |
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* mixed up MOSI and MISO pins. SPI is managed in SW, and needs pins |
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* mixed up MOSI and MISO pins. SPI is managed in SW, and needs pins |
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