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/*
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pins_arduino.h - Pin definition functions for Arduino
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Part of Arduino - http://www.arduino.cc/
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Copyright (c) 2007 David A. Mellis
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General
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Public License along with this library; if not, write to the
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Free Software Foundation, Inc., 59 Temple Place, Suite 330,
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Boston, MA 02111-1307 USA
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*/
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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include <avr/pgmspace.h>
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#define NUM_DIGITAL_PINS 86
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#define NUM_ANALOG_INPUTS 16
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#define analogInputToDigitalPin(p) ((p < 16) ? (p) + 54 : -1)
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#define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 13) || ((p) >= 44 && (p)<= 46))
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#define PIN_SPI_SS (53)
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#define PIN_SPI_MOSI (51)
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#define PIN_SPI_MISO (50)
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#define PIN_SPI_SCK (52)
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static const uint8_t SS = PIN_SPI_SS;
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static const uint8_t MOSI = PIN_SPI_MOSI;
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static const uint8_t MISO = PIN_SPI_MISO;
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static const uint8_t SCK = PIN_SPI_SCK;
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#define PIN_WIRE_SDA (20)
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#define PIN_WIRE_SCL (21)
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static const uint8_t SDA = PIN_WIRE_SDA;
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static const uint8_t SCL = PIN_WIRE_SCL;
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#define LED_BUILTIN 13
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#define PIN_A0 (54)
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#define PIN_A1 (55)
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#define PIN_A2 (56)
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#define PIN_A3 (57)
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#define PIN_A4 (58)
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#define PIN_A5 (59)
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#define PIN_A6 (60)
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#define PIN_A7 (61)
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#define PIN_A8 (62)
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#define PIN_A9 (63)
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#define PIN_A10 (64)
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#define PIN_A11 (65)
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#define PIN_A12 (66)
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#define PIN_A13 (67)
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#define PIN_A14 (68)
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#define PIN_A15 (69)
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static const uint8_t A0 = PIN_A0;
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static const uint8_t A1 = PIN_A1;
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static const uint8_t A2 = PIN_A2;
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static const uint8_t A3 = PIN_A3;
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static const uint8_t A4 = PIN_A4;
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static const uint8_t A5 = PIN_A5;
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static const uint8_t A6 = PIN_A6;
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static const uint8_t A7 = PIN_A7;
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static const uint8_t A8 = PIN_A8;
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static const uint8_t A9 = PIN_A9;
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static const uint8_t A10 = PIN_A10;
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static const uint8_t A11 = PIN_A11;
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static const uint8_t A12 = PIN_A12;
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static const uint8_t A13 = PIN_A13;
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static const uint8_t A14 = PIN_A14;
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static const uint8_t A15 = PIN_A15;
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// A majority of the pins are NOT PCINTs, SO BE WARNED (i.e. you cannot use them as receive pins)
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// Only pins available for RECEIVE (TRANSMIT can be on any pin):
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// (I've deliberately left out pin mapping to the Hardware USARTs - seems senseless to me)
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// Pins: 10, 11, 12, 13, 50, 51, 52, 53, 62, 63, 64, 65, 66, 67, 68, 69
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#define digitalPinToPCICR(p) ( (((p) >= 10) && ((p) <= 13)) || \
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(((p) >= 50) && ((p) <= 53)) || \
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(((p) >= 62) && ((p) <= 69)) ? (&PCICR) : nullptr )
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#define digitalPinToPCICRbit(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? 0 : \
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( (((p) >= 62) && ((p) <= 69)) ? 2 : \
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0 ) )
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#define digitalPinToPCMSK(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? (&PCMSK0) : \
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( (((p) >= 62) && ((p) <= 69)) ? (&PCMSK2) : \
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nullptr ) )
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#define digitalPinToPCMSKbit(p) ( (((p) >= 10) && ((p) <= 13)) ? ((p) - 6) : \
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( ((p) == 50) ? 3 : \
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( ((p) == 51) ? 2 : \
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( ((p) == 52) ? 1 : \
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( ((p) == 53) ? 0 : \
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( (((p) >= 62) && ((p) <= 69)) ? ((p) - 62) : \
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0 ) ) ) ) ) )
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#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : ((p) >= 18 && (p) <= 21 ? 23 - (p) : NOT_AN_INTERRUPT)))
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#ifdef ARDUINO_MAIN
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const uint16_t PROGMEM port_to_mode_PGM[] = {
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NOT_A_PORT,
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(uint16_t) &DDRA,
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(uint16_t) &DDRB,
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(uint16_t) &DDRC,
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(uint16_t) &DDRD,
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(uint16_t) &DDRE,
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(uint16_t) &DDRF,
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(uint16_t) &DDRG,
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(uint16_t) &DDRH,
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NOT_A_PORT,
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(uint16_t) &DDRJ,
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(uint16_t) &DDRK,
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(uint16_t) &DDRL,
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};
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const uint16_t PROGMEM port_to_output_PGM[] = {
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NOT_A_PORT,
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(uint16_t) &PORTA,
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(uint16_t) &PORTB,
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(uint16_t) &PORTC,
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(uint16_t) &PORTD,
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(uint16_t) &PORTE,
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(uint16_t) &PORTF,
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(uint16_t) &PORTG,
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(uint16_t) &PORTH,
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NOT_A_PORT,
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(uint16_t) &PORTJ,
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(uint16_t) &PORTK,
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(uint16_t) &PORTL,
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};
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const uint16_t PROGMEM port_to_input_PGM[] = {
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NOT_A_PIN,
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(uint16_t) &PINA,
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(uint16_t) &PINB,
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(uint16_t) &PINC,
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(uint16_t) &PIND,
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(uint16_t) &PINE,
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(uint16_t) &PINF,
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(uint16_t) &PING,
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(uint16_t) &PINH,
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NOT_A_PIN,
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(uint16_t) &PINJ,
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(uint16_t) &PINK,
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(uint16_t) &PINL,
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};
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const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
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// PORTLIST
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// -------------------------------------------
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PE , // PE 0 ** 0 ** USART0_RX
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PE , // PE 1 ** 1 ** USART0_TX
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PE , // PE 4 ** 2 ** PWM2
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PE , // PE 5 ** 3 ** PWM3
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PG , // PG 5 ** 4 ** PWM4
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PE , // PE 3 ** 5 ** PWM5
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PH , // PH 3 ** 6 ** PWM6
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PH , // PH 4 ** 7 ** PWM7
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PH , // PH 5 ** 8 ** PWM8
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PH , // PH 6 ** 9 ** PWM9
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PB , // PB 4 ** 10 ** PWM10
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PB , // PB 5 ** 11 ** PWM11
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PB , // PB 6 ** 12 ** PWM12
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PB , // PB 7 ** 13 ** PWM13
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PJ , // PJ 1 ** 14 ** USART3_TX
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PJ , // PJ 0 ** 15 ** USART3_RX
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PH , // PH 1 ** 16 ** USART2_TX
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PH , // PH 0 ** 17 ** USART2_RX
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PD , // PD 3 ** 18 ** USART1_TX
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PD , // PD 2 ** 19 ** USART1_RX
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PD , // PD 1 ** 20 ** I2C_SDA
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PD , // PD 0 ** 21 ** I2C_SCL
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PA , // PA 0 ** 22 ** D22
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PA , // PA 1 ** 23 ** D23
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PA , // PA 2 ** 24 ** D24
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PA , // PA 3 ** 25 ** D25
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PA , // PA 4 ** 26 ** D26
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PA , // PA 5 ** 27 ** D27
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PA , // PA 6 ** 28 ** D28
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PA , // PA 7 ** 29 ** D29
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PC , // PC 7 ** 30 ** D30
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PC , // PC 6 ** 31 ** D31
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PC , // PC 5 ** 32 ** D32
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PC , // PC 4 ** 33 ** D33
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PC , // PC 3 ** 34 ** D34
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PC , // PC 2 ** 35 ** D35
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PC , // PC 1 ** 36 ** D36
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PC , // PC 0 ** 37 ** D37
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PD , // PD 7 ** 38 ** D38
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PG , // PG 2 ** 39 ** D39
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PG , // PG 1 ** 40 ** D40
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PG , // PG 0 ** 41 ** D41
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PL , // PL 7 ** 42 ** D42
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PL , // PL 6 ** 43 ** D43
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PL , // PL 5 ** 44 ** D44
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PL , // PL 4 ** 45 ** D45
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PL , // PL 3 ** 46 ** D46
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PL , // PL 2 ** 47 ** D47
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PL , // PL 1 ** 48 ** D48
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PL , // PL 0 ** 49 ** D49
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PB , // PB 3 ** 50 ** SPI_MISO
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PB , // PB 2 ** 51 ** SPI_MOSI
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PB , // PB 1 ** 52 ** SPI_SCK
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PB , // PB 0 ** 53 ** SPI_SS
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PF , // PF 0 ** 54 ** A0
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PF , // PF 1 ** 55 ** A1
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PF , // PF 2 ** 56 ** A2
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PF , // PF 3 ** 57 ** A3
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PF , // PF 4 ** 58 ** A4
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PF , // PF 5 ** 59 ** A5
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PF , // PF 6 ** 60 ** A6
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PF , // PF 7 ** 61 ** A7
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PK , // PK 0 ** 62 ** A8
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PK , // PK 1 ** 63 ** A9
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PK , // PK 2 ** 64 ** A10
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PK , // PK 3 ** 65 ** A11
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PK , // PK 4 ** 66 ** A12
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PK , // PK 5 ** 67 ** A13
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PK , // PK 6 ** 68 ** A14
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PK , // PK 7 ** 69 ** A15
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PG , // PG 4 ** 70 ** D70
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PG , // PG 3 ** 71 ** D71
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PJ , // PJ 2 ** 72 ** D72
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PJ , // PJ 3 ** 73 ** D73
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PJ , // PJ 7 ** 74 ** D74
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PJ , // PJ 4 ** 75 ** D75
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PJ , // PJ 5 ** 76 ** D76
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PJ , // PJ 6 ** 77 ** D77
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PE , // PE 2 ** 78 ** D78
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PE , // PE 6 ** 79 ** D79
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PE , // PE 7 ** 80 ** D80
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PD , // PD 4 ** 81 ** D81
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PD , // PD 5 ** 82 ** D82
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PD , // PD 6 ** 83 ** D83
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PH , // PH 2 ** 84 ** D84
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PH , // PH 7 ** 85 ** D85
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};
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const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
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// PIN IN PORT
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// -------------------------------------------
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_BV( 0 ) , // PE 0 ** 0 ** USART0_RX
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_BV( 1 ) , // PE 1 ** 1 ** USART0_TX
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_BV( 4 ) , // PE 4 ** 2 ** PWM2
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_BV( 5 ) , // PE 5 ** 3 ** PWM3
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_BV( 5 ) , // PG 5 ** 4 ** PWM4
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_BV( 3 ) , // PE 3 ** 5 ** PWM5
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_BV( 3 ) , // PH 3 ** 6 ** PWM6
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_BV( 4 ) , // PH 4 ** 7 ** PWM7
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_BV( 5 ) , // PH 5 ** 8 ** PWM8
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_BV( 6 ) , // PH 6 ** 9 ** PWM9
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_BV( 4 ) , // PB 4 ** 10 ** PWM10
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_BV( 5 ) , // PB 5 ** 11 ** PWM11
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_BV( 6 ) , // PB 6 ** 12 ** PWM12
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_BV( 7 ) , // PB 7 ** 13 ** PWM13
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_BV( 1 ) , // PJ 1 ** 14 ** USART3_TX
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_BV( 0 ) , // PJ 0 ** 15 ** USART3_RX
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_BV( 1 ) , // PH 1 ** 16 ** USART2_TX
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_BV( 0 ) , // PH 0 ** 17 ** USART2_RX
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_BV( 3 ) , // PD 3 ** 18 ** USART1_TX
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_BV( 2 ) , // PD 2 ** 19 ** USART1_RX
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_BV( 1 ) , // PD 1 ** 20 ** I2C_SDA
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_BV( 0 ) , // PD 0 ** 21 ** I2C_SCL
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_BV( 0 ) , // PA 0 ** 22 ** D22
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_BV( 1 ) , // PA 1 ** 23 ** D23
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_BV( 2 ) , // PA 2 ** 24 ** D24
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_BV( 3 ) , // PA 3 ** 25 ** D25
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_BV( 4 ) , // PA 4 ** 26 ** D26
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_BV( 5 ) , // PA 5 ** 27 ** D27
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_BV( 6 ) , // PA 6 ** 28 ** D28
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_BV( 7 ) , // PA 7 ** 29 ** D29
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_BV( 7 ) , // PC 7 ** 30 ** D30
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_BV( 6 ) , // PC 6 ** 31 ** D31
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_BV( 5 ) , // PC 5 ** 32 ** D32
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_BV( 4 ) , // PC 4 ** 33 ** D33
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_BV( 3 ) , // PC 3 ** 34 ** D34
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_BV( 2 ) , // PC 2 ** 35 ** D35
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_BV( 1 ) , // PC 1 ** 36 ** D36
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_BV( 0 ) , // PC 0 ** 37 ** D37
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_BV( 7 ) , // PD 7 ** 38 ** D38
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_BV( 2 ) , // PG 2 ** 39 ** D39
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_BV( 1 ) , // PG 1 ** 40 ** D40
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_BV( 0 ) , // PG 0 ** 41 ** D41
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_BV( 7 ) , // PL 7 ** 42 ** D42
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_BV( 6 ) , // PL 6 ** 43 ** D43
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_BV( 5 ) , // PL 5 ** 44 ** D44
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_BV( 4 ) , // PL 4 ** 45 ** D45
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_BV( 3 ) , // PL 3 ** 46 ** D46
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_BV( 2 ) , // PL 2 ** 47 ** D47
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_BV( 1 ) , // PL 1 ** 48 ** D48
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_BV( 0 ) , // PL 0 ** 49 ** D49
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_BV( 3 ) , // PB 3 ** 50 ** SPI_MISO
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_BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI
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_BV( 1 ) , // PB 1 ** 52 ** SPI_SCK
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_BV( 0 ) , // PB 0 ** 53 ** SPI_SS
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_BV( 0 ) , // PF 0 ** 54 ** A0
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_BV( 1 ) , // PF 1 ** 55 ** A1
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_BV( 2 ) , // PF 2 ** 56 ** A2
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_BV( 3 ) , // PF 3 ** 57 ** A3
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_BV( 4 ) , // PF 4 ** 58 ** A4
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_BV( 5 ) , // PF 5 ** 59 ** A5
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_BV( 6 ) , // PF 6 ** 60 ** A6
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_BV( 7 ) , // PF 7 ** 61 ** A7
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_BV( 0 ) , // PK 0 ** 62 ** A8
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_BV( 1 ) , // PK 1 ** 63 ** A9
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_BV( 2 ) , // PK 2 ** 64 ** A10
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_BV( 3 ) , // PK 3 ** 65 ** A11
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_BV( 4 ) , // PK 4 ** 66 ** A12
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_BV( 5 ) , // PK 5 ** 67 ** A13
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_BV( 6 ) , // PK 6 ** 68 ** A14
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_BV( 7 ) , // PK 7 ** 69 ** A15
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_BV( 4 ) , // PG 4 ** 70 ** D70
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_BV( 3 ) , // PG 3 ** 71 ** D71
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_BV( 2 ) , // PJ 2 ** 72 ** D72
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_BV( 3 ) , // PJ 3 ** 73 ** D73
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_BV( 7 ) , // PJ 7 ** 74 ** D74
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_BV( 4 ) , // PJ 4 ** 75 ** D75
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_BV( 5 ) , // PJ 5 ** 76 ** D76
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_BV( 6 ) , // PJ 6 ** 77 ** D77
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_BV( 2 ) , // PE 2 ** 78 ** D78
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_BV( 6 ) , // PE 6 ** 79 ** D79
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_BV( 7 ) , // PE 7 ** 80 ** D80
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_BV( 4 ) , // PD 4 ** 81 ** D81
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_BV( 5 ) , // PD 5 ** 82 ** D82
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_BV( 6 ) , // PD 6 ** 83 ** D83
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_BV( 2 ) , // PH 2 ** 84 ** D84
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_BV( 7 ) , // PH 7 ** 85 ** D85
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};
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const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
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// TIMERS
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// -------------------------------------------
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NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX
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NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX
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TIMER3B , // PE 4 ** 2 ** PWM2
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TIMER3C , // PE 5 ** 3 ** PWM3
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TIMER0B , // PG 5 ** 4 ** PWM4
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TIMER3A , // PE 3 ** 5 ** PWM5
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TIMER4A , // PH 3 ** 6 ** PWM6
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TIMER4B , // PH 4 ** 7 ** PWM7
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TIMER4C , // PH 5 ** 8 ** PWM8
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TIMER2B , // PH 6 ** 9 ** PWM9
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TIMER2A , // PB 4 ** 10 ** PWM10
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TIMER1A , // PB 5 ** 11 ** PWM11
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TIMER1B , // PB 6 ** 12 ** PWM12
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TIMER0A , // PB 7 ** 13 ** PWM13
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NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX
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NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX
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NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX
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NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX
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NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX
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NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX
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NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA
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NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL
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NOT_ON_TIMER , // PA 0 ** 22 ** D22
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NOT_ON_TIMER , // PA 1 ** 23 ** D23
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NOT_ON_TIMER , // PA 2 ** 24 ** D24
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NOT_ON_TIMER , // PA 3 ** 25 ** D25
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NOT_ON_TIMER , // PA 4 ** 26 ** D26
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NOT_ON_TIMER , // PA 5 ** 27 ** D27
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NOT_ON_TIMER , // PA 6 ** 28 ** D28
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NOT_ON_TIMER , // PA 7 ** 29 ** D29
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NOT_ON_TIMER , // PC 7 ** 30 ** D30
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NOT_ON_TIMER , // PC 6 ** 31 ** D31
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NOT_ON_TIMER , // PC 5 ** 32 ** D32
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NOT_ON_TIMER , // PC 4 ** 33 ** D33
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NOT_ON_TIMER , // PC 3 ** 34 ** D34
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NOT_ON_TIMER , // PC 2 ** 35 ** D35
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NOT_ON_TIMER , // PC 1 ** 36 ** D36
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NOT_ON_TIMER , // PC 0 ** 37 ** D37
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NOT_ON_TIMER , // PD 7 ** 38 ** D38
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NOT_ON_TIMER , // PG 2 ** 39 ** D39
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NOT_ON_TIMER , // PG 1 ** 40 ** D40
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NOT_ON_TIMER , // PG 0 ** 41 ** D41
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NOT_ON_TIMER , // PL 7 ** 42 ** D42
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NOT_ON_TIMER , // PL 6 ** 43 ** D43
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TIMER5C , // PL 5 ** 44 ** D44
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TIMER5B , // PL 4 ** 45 ** D45
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TIMER5A , // PL 3 ** 46 ** D46
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NOT_ON_TIMER , // PL 2 ** 47 ** D47
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NOT_ON_TIMER , // PL 1 ** 48 ** D48
|
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NOT_ON_TIMER , // PL 0 ** 49 ** D49
|
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|
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NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO
|
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NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI
|
|
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NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK
|
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NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS
|
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NOT_ON_TIMER , // PF 0 ** 54 ** A0
|
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NOT_ON_TIMER , // PF 1 ** 55 ** A1
|
|
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|
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NOT_ON_TIMER , // PF 2 ** 56 ** A2
|
|
|
|
|
NOT_ON_TIMER , // PF 3 ** 57 ** A3
|
|
|
|
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NOT_ON_TIMER , // PF 4 ** 58 ** A4
|
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NOT_ON_TIMER , // PF 5 ** 59 ** A5
|
|
|
|
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NOT_ON_TIMER , // PF 6 ** 60 ** A6
|
|
|
|
|
NOT_ON_TIMER , // PF 7 ** 61 ** A7
|
|
|
|
|
NOT_ON_TIMER , // PK 0 ** 62 ** A8
|
|
|
|
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NOT_ON_TIMER , // PK 1 ** 63 ** A9
|
|
|
|
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NOT_ON_TIMER , // PK 2 ** 64 ** A10
|
|
|
|
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NOT_ON_TIMER , // PK 3 ** 65 ** A11
|
|
|
|
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NOT_ON_TIMER , // PK 4 ** 66 ** A12
|
|
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|
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NOT_ON_TIMER , // PK 5 ** 67 ** A13
|
|
|
|
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NOT_ON_TIMER , // PK 6 ** 68 ** A14
|
|
|
|
|
NOT_ON_TIMER , // PK 7 ** 69 ** A15
|
|
|
|
|
NOT_ON_TIMER , // PG 4 ** 70 ** D70
|
|
|
|
|
NOT_ON_TIMER , // PG 3 ** 71 ** D71
|
|
|
|
|
NOT_ON_TIMER , // PJ 2 ** 72 ** D72
|
|
|
|
|
NOT_ON_TIMER , // PJ 3 ** 73 ** D73
|
|
|
|
|
NOT_ON_TIMER , // PJ 7 ** 74 ** D74
|
|
|
|
|
NOT_ON_TIMER , // PJ 4 ** 75 ** D75
|
|
|
|
|
NOT_ON_TIMER , // PJ 5 ** 76 ** D76
|
|
|
|
|
NOT_ON_TIMER , // PJ 6 ** 77 ** D77
|
|
|
|
|
NOT_ON_TIMER , // PE 2 ** 78 ** D78
|
|
|
|
|
NOT_ON_TIMER , // PE 6 ** 79 ** D79
|
|
|
|
|
NOT_ON_TIMER , // PE 7 ** 80 ** D80
|
|
|
|
|
NOT_ON_TIMER , // PD 4 ** 81 ** D81
|
|
|
|
|
NOT_ON_TIMER , // PD 5 ** 82 ** D82
|
|
|
|
|
NOT_ON_TIMER , // PD 6 ** 83 ** D83
|
|
|
|
|
NOT_ON_TIMER , // PH 2 ** 84 ** D84
|
|
|
|
|
NOT_ON_TIMER , // PH 7 ** 85 ** D85
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// These serial port names are intended to allow libraries and architecture-neutral
|
|
|
|
|
// sketches to automatically default to the correct port name for a particular type
|
|
|
|
|
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
|
|
|
|
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
|
|
|
|
//
|
|
|
|
|
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
|
|
|
|
//
|
|
|
|
|
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
|
|
|
|
//
|
|
|
|
|
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
|
|
|
|
//
|
|
|
|
|
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
|
|
|
|
//
|
|
|
|
|
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
|
|
|
|
// pins are NOT connected to anything by default.
|
|
|
|
|
#define SERIAL_PORT_MONITOR Serial
|
|
|
|
|
#define SERIAL_PORT_HARDWARE Serial
|
|
|
|
|
#define SERIAL_PORT_HARDWARE1 Serial1
|
|
|
|
|
#define SERIAL_PORT_HARDWARE2 Serial2
|
|
|
|
|
#define SERIAL_PORT_HARDWARE3 Serial3
|
|
|
|
|
#define SERIAL_PORT_HARDWARE_OPEN Serial1
|
|
|
|
|
#define SERIAL_PORT_HARDWARE_OPEN1 Serial2
|
|
|
|
|
#define SERIAL_PORT_HARDWARE_OPEN2 Serial3
|
|
|
|
|
|
|
|
|
|
#endif
|
